From 497e938c8ce8233cecd39fcec4201ea9ac3a84a0 Mon Sep 17 00:00:00 2001 From: Pokechu22 Date: Mon, 9 Jan 2023 18:46:25 -0800 Subject: [PATCH 1/2] Jit_LoadStoreFloating: Minor tidying The inst.SIMM_16 change is for readability (though it also fixes a warning about potentially unintended uses of `||`). The fallback change is because `b` is only meaningful for indexed instructions; this could theoretically lead to unintended fallbacks (but it seems unlikely). --- Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp index 0af85a9f26..fd41ff0404 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp @@ -22,7 +22,7 @@ void Jit64::lfXXX(UGeckoInstruction inst) bool indexed = inst.OPCD == 31; bool update = indexed ? !!(inst.SUBOP10 & 0x20) : !!(inst.OPCD & 1); bool single = indexed ? !(inst.SUBOP10 & 0x40) : !(inst.OPCD & 2); - update &= indexed || inst.SIMM_16; + update &= indexed || (inst.SIMM_16 != 0); int d = inst.RD; int a = inst.RA; @@ -93,7 +93,7 @@ void Jit64::stfXXX(UGeckoInstruction inst) bool indexed = inst.OPCD == 31; bool update = indexed ? !!(inst.SUBOP10 & 0x20) : !!(inst.OPCD & 1); bool single = indexed ? !(inst.SUBOP10 & 0x40) : !(inst.OPCD & 2); - update &= indexed || inst.SIMM_16; + update &= indexed || (inst.SIMM_16 != 0); int s = inst.RS; int a = inst.RA; @@ -101,7 +101,7 @@ void Jit64::stfXXX(UGeckoInstruction inst) s32 imm = (s16)inst.SIMM_16; int accessSize = single ? 32 : 64; - FALLBACK_IF(update && jo.memcheck && a == b); + FALLBACK_IF(update && jo.memcheck && indexed && a == b); if (single) { From c55e08ff738d58ce4b49988c6d9a6cf06e45c069 Mon Sep 17 00:00:00 2001 From: Pokechu22 Date: Mon, 9 Jan 2023 18:47:02 -0800 Subject: [PATCH 2/2] Jit64: Attempt to fix updating stores with an immediate value See https://bugs.dolphin-emu.org/issues/13144 --- Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp | 2 +- Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp index 65ac5dab21..1e6019e0e0 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp @@ -510,7 +510,7 @@ void Jit64::stX(UGeckoInstruction inst) } else { - RCOpArg Ra = gpr.UseNoImm(a, RCMode::Write); + RCOpArg Ra = gpr.RevertableBind(a, RCMode::Write); RegCache::Realize(Ra); MemoryExceptionCheck(); MOV(32, Ra, Imm32(addr)); diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp index fd41ff0404..7ac34f5d6e 100644 --- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp +++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp @@ -144,7 +144,7 @@ void Jit64::stfXXX(UGeckoInstruction inst) } else { - RCOpArg Ra = gpr.UseNoImm(a, RCMode::Write); + RCOpArg Ra = gpr.RevertableBind(a, RCMode::Write); RegCache::Realize(Ra); MemoryExceptionCheck(); MOV(32, Ra, Imm32(addr));