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exi ipl: quiet a gcc warning

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This commit is contained in:
Shawn Hoffman 2018-09-30 18:18:28 -07:00
parent 2cd96aa5bb
commit d300f3bbbc
1 changed files with 7 additions and 7 deletions
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14
Source/Core/Core/HW/EXI/EXI_DeviceIPL.cpp
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@ -291,13 +291,13 @@ void CEXIIPL::TransferByte(u8& data)
#define DEV_ADDR(x) (address - x##_BASE) #define DEV_ADDR(x) (address - x##_BASE)
#define DEV_ADDR_CURSOR(x) (DEV_ADDR(x) + m_cursor++) #define DEV_ADDR_CURSOR(x) (DEV_ADDR(x) + m_cursor++)
auto UartFifoAccess = [&](u8* data) { auto UartFifoAccess = [&]() {
if (m_command.is_write()) if (m_command.is_write())
{ {
if (*data != '\0') if (data != '\0')
m_buffer += *data; m_buffer += data;
if (*data == '\r') if (data == '\r')
{ {
NOTICE_LOG(OSREPORT, "%s", SHIFTJISToUTF8(m_buffer).c_str()); NOTICE_LOG(OSREPORT, "%s", SHIFTJISToUTF8(m_buffer).c_str());
m_buffer.clear(); m_buffer.clear();
@ -306,7 +306,7 @@ void CEXIIPL::TransferByte(u8& data)
else else
{ {
// "Queue Length"... return 0 cause we're instant // "Queue Length"... return 0 cause we're instant
*data = 0; data = 0;
} }
}; };
@ -351,7 +351,7 @@ void CEXIIPL::TransferByte(u8& data)
{ {
case 0: case 0:
// Seems to be 16byte fifo // Seems to be 16byte fifo
UartFifoAccess(&data); UartFifoAccess();
break; break;
case 0xc: case 0xc:
// Seen being written to after reading 4 bytes from barnacle // Seen being written to after reading 4 bytes from barnacle
@ -375,7 +375,7 @@ void CEXIIPL::TransferByte(u8& data)
// so we can leave the byte untouched. // so we can leave the byte untouched.
break; break;
case 4: case 4:
UartFifoAccess(&data); UartFifoAccess();
break; break;
} }
} }