Merge pull request #7896 from CrystalGamma/pr-reserve

PowerPC: Move lwarx/stwcxd. reservation into PowerPCState
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Léo Lam 2021-07-21 12:39:42 +02:00 committed by GitHub
commit d1beb9ef70
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6 changed files with 17 additions and 15 deletions

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@ -104,7 +104,6 @@ void Interpreter::RunTable63(UGeckoInstruction inst)
void Interpreter::Init() void Interpreter::Init()
{ {
InitializeInstructionTables(); InitializeInstructionTables();
m_reserve = false;
m_end_block = false; m_end_block = false;
} }

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@ -298,9 +298,4 @@ private:
UGeckoInstruction m_prev_inst{}; UGeckoInstruction m_prev_inst{};
static bool m_end_block; static bool m_end_block;
// TODO: These should really be in the save state, although it's unlikely to matter much.
// They are for lwarx and its friend stwcxd.
static bool m_reserve;
static u32 m_reserve_address;
}; };

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@ -15,9 +15,6 @@
#include "Core/PowerPC/MMU.h" #include "Core/PowerPC/MMU.h"
#include "Core/PowerPC/PowerPC.h" #include "Core/PowerPC/PowerPC.h"
bool Interpreter::m_reserve;
u32 Interpreter::m_reserve_address;
static u32 Helper_Get_EA(const PowerPC::PowerPCState& ppcs, const UGeckoInstruction inst) static u32 Helper_Get_EA(const PowerPC::PowerPCState& ppcs, const UGeckoInstruction inst)
{ {
return inst.RA ? (ppcs.gpr[inst.RA] + inst.SIMM_16) : (u32)inst.SIMM_16; return inst.RA ? (ppcs.gpr[inst.RA] + inst.SIMM_16) : (u32)inst.SIMM_16;
@ -992,8 +989,8 @@ void Interpreter::lwarx(UGeckoInstruction inst)
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI)) if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
{ {
rGPR[inst.RD] = temp; rGPR[inst.RD] = temp;
m_reserve = true; PowerPC::ppcState.reserve = true;
m_reserve_address = address; PowerPC::ppcState.reserve_address = address;
} }
} }
@ -1008,14 +1005,14 @@ void Interpreter::stwcxd(UGeckoInstruction inst)
return; return;
} }
if (m_reserve) if (PowerPC::ppcState.reserve)
{ {
if (address == m_reserve_address) if (address == PowerPC::ppcState.reserve_address)
{ {
PowerPC::Write_U32(rGPR[inst.RS], address); PowerPC::Write_U32(rGPR[inst.RS], address);
if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI)) if (!(PowerPC::ppcState.Exceptions & EXCEPTION_DSI))
{ {
m_reserve = false; PowerPC::ppcState.reserve = false;
PowerPC::ppcState.cr.SetField(0, 2 | PowerPC::GetXER_SO()); PowerPC::ppcState.cr.SetField(0, 2 | PowerPC::GetXER_SO());
return; return;
} }

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@ -125,6 +125,9 @@ void DoState(PointerWrap& p)
p.Do(ppcState.pagetable_base); p.Do(ppcState.pagetable_base);
p.Do(ppcState.pagetable_hashmask); p.Do(ppcState.pagetable_hashmask);
p.Do(ppcState.reserve);
p.Do(ppcState.reserve_address);
ppcState.iCache.DoState(p); ppcState.iCache.DoState(p);
if (p.GetMode() == PointerWrap::MODE_READ) if (p.GetMode() == PointerWrap::MODE_READ)
@ -175,6 +178,10 @@ static void ResetRegisters()
ppcState.pc = 0; ppcState.pc = 0;
ppcState.npc = 0; ppcState.npc = 0;
ppcState.Exceptions = 0; ppcState.Exceptions = 0;
ppcState.reserve = false;
ppcState.reserve_address = 0;
for (auto& v : ppcState.cr.fields) for (auto& v : ppcState.cr.fields)
{ {
v = 0x8000000000000001; v = 0x8000000000000001;

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@ -167,6 +167,10 @@ struct PowerPCState
InstructionCache iCache; InstructionCache iCache;
// Reservation monitor for lwarx and its friend stwcxd.
bool reserve;
u32 reserve_address;
void UpdateCR1() void UpdateCR1()
{ {
cr.SetField(1, (fpscr.FX << 3) | (fpscr.FEX << 2) | (fpscr.VX << 1) | fpscr.OX); cr.SetField(1, (fpscr.FX << 3) | (fpscr.FEX << 2) | (fpscr.VX << 1) | fpscr.OX);

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@ -73,7 +73,7 @@ static Common::Event g_compressAndDumpStateSyncEvent;
static std::thread g_save_thread; static std::thread g_save_thread;
// Don't forget to increase this after doing changes on the savestate system // Don't forget to increase this after doing changes on the savestate system
constexpr u32 STATE_VERSION = 133; // Last changed in PR 9600 constexpr u32 STATE_VERSION = 134; // Last changed in PR 7896
// Maps savestate versions to Dolphin versions. // Maps savestate versions to Dolphin versions.
// Versions after 42 don't need to be added to this list, // Versions after 42 don't need to be added to this list,