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JitArm64: cmp - Optimize general case

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We can merge an SXTW with the SUB, eliminating one instruction. In
addition, it is no longer necessary to allocate a temporary register,
reducing register pressure.

Before:
0x93407f59   sxtw   x25, w26
0x93407ebb   sxtw   x27, w21
0xcb1b033b   sub    x27, x25, x27

After:
0x93407f5b   sxtw   x27, w26
0xcb35c37b   sub    x27, x27, w21, sxtw
This commit is contained in:
Bram Speeckaert 2022-11-01 12:21:24 +01:00
parent ae6ce1df48
commit d0de68c41b
1 changed files with 2 additions and 7 deletions
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9
Source/Core/Core/PowerPC/JitArm64/JitArm64_Integer.cpp
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@ -595,16 +595,11 @@ void JitArm64::cmp(UGeckoInstruction inst)
} }
else else
{ {
ARM64Reg WA = gpr.GetReg();
ARM64Reg XA = EncodeRegTo64(WA);
ARM64Reg RA = gpr.R(a); ARM64Reg RA = gpr.R(a);
ARM64Reg RB = gpr.R(b); ARM64Reg RB = gpr.R(b);
SXTW(XA, RA); SXTW(CR, RA);
SXTW(CR, RB); SUB(CR, CR, RB, ArithOption(RB, ExtendSpecifier::SXTW));
SUB(CR, XA, CR);
gpr.Unlock(WA);
} }
} }