Very slight cleanup in BBA. BBA is getting asked it's device ID twice instead of once, which is throwing everything off, dunno why this is happening at all. Will slow down development a lot

git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3240 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
Sonicadvance1 2009-05-15 10:50:49 +00:00
parent 833154f3d8
commit c684a77394
3 changed files with 28 additions and 24 deletions

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@ -104,7 +104,7 @@ bool CEXIETHERNET::sendPacket(u8 *etherpckt, int size)
DEBUGPRINT( "Packet: 0x"); DEBUGPRINT( "Packet: 0x");
for(int a = 0; a < size; ++a) for(int a = 0; a < size; ++a)
{ {
DEBUGPRINT( "%02X", etherpckt[a]); DEBUGPRINT( "%02X ", etherpckt[a]);
} }
DEBUGPRINT( " : Size: %d\n", size); DEBUGPRINT( " : Size: %d\n", size);
int numBytesWrit = write(fd, etherpckt, size); int numBytesWrit = write(fd, etherpckt, size);

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@ -38,25 +38,6 @@ void DEBUGPRINT (const char * format, ...)
#endif #endif
va_end (args); va_end (args);
} }
inline u8 makemaskb(int start, int end) {
return (u8)_rotl((2 << (end - start)) - 1, 7 - end);
}
inline u32 makemaskh(int start, int end) {
return (u32)_rotl((2 << (end - start)) - 1, 15 - end);
}
inline u32 makemaskw(int start, int end) {
return _rotl((2 << (end - start)) - 1, 31 - end);
}
inline u8 getbitsb(u8 byte, int start, int end) {
return (byte & makemaskb(start, end)) >> u8(7 - end);
}
inline u32 getbitsh(u32 hword, int start, int end) {
return (hword & makemaskh(start, end)) >> u32(15 - end);
}
inline u32 getbitsw(u32 dword, int start, int end) {
return (dword & makemaskw(start, end)) >> (31 - end);
}
#define MAKE(type, arg) (*(type *)&(arg)) #define MAKE(type, arg) (*(type *)&(arg))
@ -99,15 +80,15 @@ CEXIETHERNET::CEXIETHERNET() :
void CEXIETHERNET::SetCS(int cs) void CEXIETHERNET::SetCS(int cs)
{ {
if (cs) if (!cs)
{ {
if (mExpectVariableLengthImmWrite) if (mExpectVariableLengthImmWrite)
{ {
mExpectVariableLengthImmWrite = false; mExpectVariableLengthImmWrite = false;
mReadyToSend = true; mReadyToSend = true;
} }
mWriteP = mReadP = INVALID_P;
mExpectSpecialImmRead = false; mExpectSpecialImmRead = false;
mWriteP = mReadP = INVALID_P;
m_uPosition = 0; m_uPosition = 0;
Expecting = EXPECT_NONE; Expecting = EXPECT_NONE;
} }
@ -130,7 +111,7 @@ bool CEXIETHERNET::IsInterruptSet()
void CEXIETHERNET::recordSendComplete() void CEXIETHERNET::recordSendComplete()
{ {
mBbaMem[BBA_NCRA] &= ~0x06; mBbaMem[BBA_NCRA] &= ~0x06;
if(mBbaMem[0x08] & BBA_INTERRUPT_SENT) if(mBbaMem[BBA_IMR] & BBA_INTERRUPT_SENT)
{ {
mBbaMem[BBA_IR] |= BBA_INTERRUPT_SENT; mBbaMem[BBA_IR] |= BBA_INTERRUPT_SENT;
DEBUGPRINT( "\t\tBBA Send interrupt raised\n"); DEBUGPRINT( "\t\tBBA Send interrupt raised\n");
@ -154,7 +135,6 @@ void CEXIETHERNET::ImmWrite(u32 _uData, u32 _uSize)
//DEBUGPRINT( "IMM Write, size 0x%x, data 0x%x mWriteP 0x%x\n", _uSize, _uData, mWriteP); //DEBUGPRINT( "IMM Write, size 0x%x, data 0x%x mWriteP 0x%x\n", _uSize, _uData, mWriteP);
if (mExpectVariableLengthImmWrite) if (mExpectVariableLengthImmWrite)
{ {
DEBUGPRINT("Variable Length IMM Write: Size: %d _uData: 0x%08X swapped: 0x%08X\n", _uSize, _uData, Common::swap32(_uData));
// TODO: Use Swapped or unswapped? // TODO: Use Swapped or unswapped?
if(_uSize == 4) if(_uSize == 4)
{ {
@ -399,6 +379,7 @@ u32 CEXIETHERNET::ImmRead(u32 _uSize)
else else
{ {
DEBUGPRINT( "\t[EEE]Unhandled IMM read of %d bytes\n", _uSize); DEBUGPRINT( "\t[EEE]Unhandled IMM read of %d bytes\n", _uSize);
exit(0);
} }
DEBUGPRINT( "[EEE]Not Expecting IMMRead of size %d!\n", _uSize); DEBUGPRINT( "[EEE]Not Expecting IMMRead of size %d!\n", _uSize);
exit(0); exit(0);

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@ -18,6 +18,26 @@
#ifndef _EXIDEVICE_ETHERNET_H #ifndef _EXIDEVICE_ETHERNET_H
#define _EXIDEVICE_ETHERNET_H #define _EXIDEVICE_ETHERNET_H
inline u8 makemaskb(int start, int end) {
return (u8)_rotl((2 << (end - start)) - 1, 7 - end);
}
inline u32 makemaskh(int start, int end) {
return (u32)_rotl((2 << (end - start)) - 1, 15 - end);
}
inline u32 makemaskw(int start, int end) {
return _rotl((2 << (end - start)) - 1, 31 - end);
}
inline u8 getbitsb(u8 byte, int start, int end) {
return (byte & makemaskb(start, end)) >> u8(7 - end);
}
inline u32 getbitsh(u32 hword, int start, int end) {
return (hword & makemaskh(start, end)) >> u32(15 - end);
}
inline u32 getbitsw(u32 dword, int start, int end) {
return (dword & makemaskw(start, end)) >> (31 - end);
}
void DEBUGPRINT (const char * format, ...); void DEBUGPRINT (const char * format, ...);
class WriteBuffer { class WriteBuffer {
public: public:
@ -150,6 +170,7 @@ enum{
BBA_NCRA_ST0 = (1<<1), /* ST0, Start transmit command/status */ BBA_NCRA_ST0 = (1<<1), /* ST0, Start transmit command/status */
BBA_NCRA_ST1 = (1<<2), /* ST1, " */ BBA_NCRA_ST1 = (1<<2), /* ST1, " */
BBA_NCRA_SR = (1<<3), /* SR, Start Receive */ BBA_NCRA_SR = (1<<3), /* SR, Start Receive */
BBA_NCRB = 0x01, /* Network Control Register B, RW */ BBA_NCRB = 0x01, /* Network Control Register B, RW */
BBA_NCRB_PR = (1<<0), /* PR, Promiscuous Mode */ BBA_NCRB_PR = (1<<0), /* PR, Promiscuous Mode */
BBA_NCRB_CA = (1<<1), /* CA, Capture Effect Mode */ BBA_NCRB_CA = (1<<1), /* CA, Capture Effect Mode */
@ -163,6 +184,8 @@ enum{
BBA_NCRB_2_PACKETS_PER_INT = (1<<6), /* 0 1 */ BBA_NCRB_2_PACKETS_PER_INT = (1<<6), /* 0 1 */
BBA_NCRB_4_PACKETS_PER_INT = (2<<6), /* 1 0 */ BBA_NCRB_4_PACKETS_PER_INT = (2<<6), /* 1 0 */
BBA_NCRB_8_PACKETS_PER_INT = (3<<6), /* 1 1 */ BBA_NCRB_8_PACKETS_PER_INT = (3<<6), /* 1 1 */
BBA_IMR = 0x08, /* Interrupt Mask Register, RW, 00h */
BBA_IR = 0x09, /* Interrupt Register, RW, 00h */ BBA_IR = 0x09, /* Interrupt Register, RW, 00h */
BBA_IR_FRAGI = (1<<0), /* FRAGI, Fragment Counter Interrupt */ BBA_IR_FRAGI = (1<<0), /* FRAGI, Fragment Counter Interrupt */