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DSP: minor shift instruction tweaks. that stuff about negated shift amount in the comments is spooky though. gonna have to run some test code.
git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@2906 8ced0084-cf51-0410-be5f-012b33b47a6e
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@ -1091,7 +1091,7 @@ void asr16(const UDSPInstruction& opc)
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void lsl(const UDSPInstruction& opc)
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{
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u16 shift = opc.ushift;
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s64 acc = dsp_get_long_acc(opc.areg);
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u64 acc = dsp_get_long_acc(opc.areg);
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acc <<= shift;
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dsp_set_long_acc(opc.areg, acc);
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@ -1106,10 +1106,11 @@ void lsl(const UDSPInstruction& opc)
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void lsr(const UDSPInstruction& opc)
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{
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u16 shift = -opc.ushift;
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s64 acc = dsp_get_long_acc(opc.areg);
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u64 acc = dsp_get_long_acc(opc.areg);
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// Lop off the extraneous sign extension our 64-bit fake accum causes
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acc &= 0x000000FFFFFFFFFF;
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acc >>= shift;
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dsp_set_long_acc(opc.areg, acc);
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dsp_set_long_acc(opc.areg, (s64)acc);
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Update_SR_Register64(acc);
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}
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@ -1122,7 +1123,7 @@ void asl(const UDSPInstruction& opc)
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u16 shift = opc.ushift;
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// arithmetic shift
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s64 acc = dsp_get_long_acc(opc.areg);
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u64 acc = dsp_get_long_acc(opc.areg);
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acc <<= shift;
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dsp_set_long_acc(opc.areg, acc);
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@ -1132,7 +1133,7 @@ void asl(const UDSPInstruction& opc)
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// ASR $acR, #I
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// 0001 010r 11ii iiii
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// Arithmetically shifts left accumulator $acR by number specified by
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// Arithmetically shifts right accumulator $acR by number specified by
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// value calculated by negating sign extended bits 0-6.
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void asr(const UDSPInstruction& opc)
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