From 6ea10dfa22aaad71ee1f1ac0367414c107179488 Mon Sep 17 00:00:00 2001 From: "XTra.KrazzY" Date: Thu, 4 Dec 2008 19:17:37 +0000 Subject: [PATCH] PPCTables Housekeeping... git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@1399 8ced0084-cf51-0410-be5f-012b33b47a6e --- .../Interpreter/Interpreter_LoadStore.cpp | 42 +++++++++---------- Source/Core/Core/Src/PowerPC/PPCTables.cpp | 7 ++-- 2 files changed, 22 insertions(+), 27 deletions(-) diff --git a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_LoadStore.cpp b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_LoadStore.cpp index ffd87f6b08..1aa639dd9c 100644 --- a/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_LoadStore.cpp +++ b/Source/Core/Core/Src/PowerPC/Interpreter/Interpreter_LoadStore.cpp @@ -579,42 +579,38 @@ void stwbrx(UGeckoInstruction _inst) } -// The following two instructions are for inter-cpu communications. On a single -// CPU, they cannot -// fail unless an interrupt happens in between, which usually won't happen with -// the JIT. +// The following two instructions are for SMP communications. On a single +// CPU, they cannot fail unless an interrupt happens in between, which usually +// won't happen with the JIT. bool g_bReserve = false; u32 g_reserveAddr; void lwarx(UGeckoInstruction _inst) { - u32 uAddress = Helper_Get_EA_X(_inst); + u32 uAddress = Helper_Get_EA_X(_inst); m_GPR[_inst.RD] = Memory::Read_U32(uAddress); - g_bReserve = true; - g_reserveAddr = uAddress; + g_bReserve = true; + g_reserveAddr = uAddress; } void stwcxd(UGeckoInstruction _inst) { - // This instruction, too - //PanicAlert("stwcxd - suspicious instruction"); + // Stores Word Conditional indeXed - // Stores Word Conditional indeXed - - u32 uAddress; + u32 uAddress; - if(g_bReserve) { - uAddress = Helper_Get_EA_X(_inst); - if(uAddress == g_reserveAddr) { - Memory::Write_U32(m_GPR[_inst.RS], uAddress); - g_bReserve = false; - SetCRField(0, 2 | XER.SO); - return; - } - - } - SetCRField(0, XER.SO); + if(g_bReserve) { + uAddress = Helper_Get_EA_X(_inst); + if(uAddress == g_reserveAddr) { + Memory::Write_U32(m_GPR[_inst.RS], uAddress); + g_bReserve = false; + SetCRField(0, 2 | XER.SO); + return; + } + } + + SetCRField(0, XER.SO); } void stwux(UGeckoInstruction _inst) diff --git a/Source/Core/Core/Src/PowerPC/PPCTables.cpp b/Source/Core/Core/Src/PowerPC/PPCTables.cpp index d82d671158..2392a64898 100644 --- a/Source/Core/Core/Src/PowerPC/PPCTables.cpp +++ b/Source/Core/Core/Src/PowerPC/PPCTables.cpp @@ -320,7 +320,9 @@ GekkoOPTemplate table31[] = {534, Interpreter::lwbrx, Jit64::Default, {"lwbrx", OPTYPE_LOAD, FL_OUT_D | FL_IN_A0 | FL_IN_B}}, {790, Interpreter::lhbrx, Jit64::Default, {"lhbrx", OPTYPE_LOAD, FL_OUT_D | FL_IN_A0 | FL_IN_B}}, - {20, Interpreter::lwarx, Jit64::Default, {"lwarx", OPTYPE_LOAD, FL_OUT_D | FL_IN_A0B}}, + // Conditional load/store (Wii SMP) + {150, Interpreter::stwcxd, Jit64::Default, {"stwcxd", OPTYPE_STORE, 0}}, + {20, Interpreter::lwarx, Jit64::Default, {"lwarx", OPTYPE_LOAD, FL_OUT_D | FL_IN_A0B}}, //load string (interpret these) {533, Interpreter::lswx, Jit64::Default, {"lswx", OPTYPE_LOAD, FL_IN_A | FL_OUT_D}}, @@ -381,9 +383,6 @@ GekkoOPTemplate table31[] = {306, Interpreter::tlbie, Jit64::Default, {"tlbie", OPTYPE_SYSTEM, 0}}, {370, Interpreter::tlbia, Jit64::Default, {"tlbia", OPTYPE_SYSTEM, 0}}, {566, Interpreter::tlbsync, Jit64::Default, {"tlbsync", OPTYPE_SYSTEM, 0}}, - - // Instructions used on Wii and thought not to be used by a Gekko - {150, Interpreter::stwcxd, Jit64::Default, {"stwcxd", OPTYPE_STORE, 0}}, }; GekkoOPTemplate table31_2[] =