From 599c9fd15c5d151ca30bb7e972f2c1eadf111027 Mon Sep 17 00:00:00 2001 From: Shawn Hoffman Date: Wed, 1 Jul 2009 22:47:01 +0000 Subject: [PATCH] revert r3521 - r3523 git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@3639 8ced0084-cf51-0410-be5f-012b33b47a6e --- Source/Core/DSPCore/Src/DSPAccelerator.cpp | 10 +++++----- Source/Core/DSPCore/Src/DSPCore.cpp | 20 ++++++++++++-------- Source/Core/DSPCore/Src/DSPCore.h | 10 +--------- Source/Core/DSPCore/Src/DSPHWInterface.cpp | 14 ++------------ Source/Core/DSPCore/Src/DSPInterpreter.h | 1 + Source/Core/DSPCore/Src/DspIntBranch.cpp | 7 +++++-- 6 files changed, 26 insertions(+), 36 deletions(-) diff --git a/Source/Core/DSPCore/Src/DSPAccelerator.cpp b/Source/Core/DSPCore/Src/DSPAccelerator.cpp index 61faef389f..5a3441c420 100644 --- a/Source/Core/DSPCore/Src/DSPAccelerator.cpp +++ b/Source/Core/DSPCore/Src/DSPAccelerator.cpp @@ -143,12 +143,12 @@ u16 dsp_read_accelerator() Address = (gdsp_ifx_regs[DSP_ACSAH] << 16) | gdsp_ifx_regs[DSP_ACSAL]; // Do we really need both? - DSPCore_SetException(EXP_4); - DSPCore_SetException(EXP_ACCOV); + DSPCore_SetException(3); + DSPCore_SetException(5); - // Somehow, YN1 and YN2 must be initialized with their "loop" values, - // so yeah, it seems likely that we should raise an exception to let - // the DSP program do that, at least if DSP_FORMAT == 0x0A. + // Somehow, YN1 and YN2 must be initialized with their "loop" values, so yeah, + // it seems likely that we should raise an exception to let the DSP program do that, + // at least if DSP_FORMAT == 0x0A. } gdsp_ifx_regs[DSP_ACCAH] = Address >> 16; diff --git a/Source/Core/DSPCore/Src/DSPCore.cpp b/Source/Core/DSPCore/Src/DSPCore.cpp index 437f24fac9..565e2e6b1a 100644 --- a/Source/Core/DSPCore/Src/DSPCore.cpp +++ b/Source/Core/DSPCore/Src/DSPCore.cpp @@ -137,8 +137,10 @@ void DSPCore_Shutdown() void DSPCore_Reset() { + _assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "reset while exception"); g_dsp.pc = DSP_RESET_VECTOR; - g_dsp.r[DSP_REG_SR] |= SR_INT_ENABLE; + g_dsp.exception_in_progress_hack = false; + g_dsp.r[DSP_REG_WR0] = 0xffff; g_dsp.r[DSP_REG_WR1] = 0xffff; g_dsp.r[DSP_REG_WR2] = 0xffff; @@ -155,10 +157,11 @@ void DSPCore_CheckExternalInterrupt() // check if there is an external interrupt if (g_dsp.cr & CR_EXTERNAL_INT) { - if (dsp_SR_is_flag_set(SR_800) && dsp_SR_is_flag_set(SR_INT_ENABLE)) + if (dsp_SR_is_flag_set(FLAG_ENABLE_INTERUPT) && (g_dsp.exception_in_progress_hack == false)) { - // level 7 is the interrupt exception. is it? - DSPCore_SetException(EXP_INT); + // level 7 is the interrupt exception + DSPCore_SetException(7); + g_dsp.cr &= ~CR_EXTERNAL_INT; } } @@ -167,20 +170,21 @@ void DSPCore_CheckExternalInterrupt() void DSPCore_CheckExceptions() { // check exceptions - if (g_dsp.exceptions != 0) + if ((g_dsp.exceptions != 0) && (!g_dsp.exception_in_progress_hack)) { for (int i = 0; i < 8; i++) { - if (g_dsp.exceptions & (1 << i) && dsp_SR_is_flag_set(SR_INT_ENABLE)) + if (g_dsp.exceptions & (1 << i)) { - + _assert_msg_(MASTER_LOG, !g_dsp.exception_in_progress_hack, "assert while exception"); + dsp_reg_store_stack(DSP_STACK_C, g_dsp.pc); dsp_reg_store_stack(DSP_STACK_D, g_dsp.r[DSP_REG_SR]); - g_dsp.r[DSP_REG_SR] &= ~ SR_INT_ENABLE; g_dsp.pc = i * 2; g_dsp.exceptions &= ~(1 << i); + g_dsp.exception_in_progress_hack = true; break; } } diff --git a/Source/Core/DSPCore/Src/DSPCore.h b/Source/Core/DSPCore/Src/DSPCore.h index 462dbc1a05..eab5773c03 100644 --- a/Source/Core/DSPCore/Src/DSPCore.h +++ b/Source/Core/DSPCore/Src/DSPCore.h @@ -161,15 +161,6 @@ // This should be the bits affected by CMP. Does not include logic zero. #define SR_CMP_MASK 0x3f -// exceptions vector -#define EXP_RESET 0 // 0x0000 -#define EXP_STOVF 1 // 0x0002 stack under/over flow -#define EXP_4 2 // 0x0004 -#define EXP_6 3 // 0x0006 -#define EXP_8 4 // 0x0008 -#define EXP_ACCOV 5 // 0x000a accelerator address overflow -#define EXP_c 6 // 0x000c -#define EXP_INT 7 // 0x000e external int? (mail?) struct SDSP { @@ -187,6 +178,7 @@ struct SDSP u8 reg_stack_ptr[4]; u8 exceptions; // pending exceptions? + bool exception_in_progress_hack; // is this the same as "exception enabled"? // Let's make stack depth 32 for now. The real DSP has different depths // for the different stacks, but it would be strange if any ucode relied on stack diff --git a/Source/Core/DSPCore/Src/DSPHWInterface.cpp b/Source/Core/DSPCore/Src/DSPHWInterface.cpp index 93399d83c1..9c0d631aeb 100644 --- a/Source/Core/DSPCore/Src/DSPHWInterface.cpp +++ b/Source/Core/DSPCore/Src/DSPHWInterface.cpp @@ -75,15 +75,6 @@ void gdsp_mbox_write_h(u8 mbx, u16 val) gdsp_mbox[mbx][0] = val & 0x7fff; if (DSPHost_OnThread()) g_CriticalSection.Leave(); - - if (mbx == GDSP_MBOX_DSP) - { - DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc); - } else { - // mailbox - // DSPCore_SetException(EXP_INT); - } - } @@ -100,8 +91,7 @@ void gdsp_mbox_write_l(u8 mbx, u16 val) { DEBUG_LOG(DSPLLE, " - DSP writes mail to mbx %i: 0x%08x (pc=0x%04x)", mbx, gdsp_mbox_peek(GDSP_MBOX_DSP), g_dsp.pc); } else { - // mailbox - DSPCore_SetException(EXP_INT); + // Trigger exception? } } @@ -152,7 +142,7 @@ void gdsp_ifx_write(u16 addr, u16 val) break; case 0xd3: // ZeldaUnk (accelerator WRITE) - DEBUG_LOG(DSPLLE, "Write To ZeldaUnk pc=%04x (%04x)\n", g_dsp.pc, val); + ERROR_LOG(DSPLLE, "Write To ZeldaUnk pc=%04x (%04x)\n", g_dsp.pc, val); dsp_write_aram_d3(val); break; diff --git a/Source/Core/DSPCore/Src/DSPInterpreter.h b/Source/Core/DSPCore/Src/DSPInterpreter.h index d8f4d84f58..4fc879c1c7 100644 --- a/Source/Core/DSPCore/Src/DSPInterpreter.h +++ b/Source/Core/DSPCore/Src/DSPInterpreter.h @@ -21,6 +21,7 @@ #include "DSPTables.h" #define DSP_REG_MASK 0x1f +#define FLAG_ENABLE_INTERUPT 11 namespace DSPInterpreter { diff --git a/Source/Core/DSPCore/Src/DspIntBranch.cpp b/Source/Core/DSPCore/Src/DspIntBranch.cpp index 94e9d5d37b..b843526906 100644 --- a/Source/Core/DSPCore/Src/DspIntBranch.cpp +++ b/Source/Core/DSPCore/Src/DspIntBranch.cpp @@ -48,8 +48,8 @@ void call(const UDSPInstruction& opc) // Generic callr implementation // CALLRcc $R // 0001 0111 rrr1 cccc -// Call function if condition cc has been met.Push program counter of -// instruction following "call" to call stack $st0. Set program counter to +// Call functionif condition cc has been met.Push program counter of +// instruction following "call" tocall stack $st0. Set program counter to // register $R. void callr(const UDSPInstruction& opc) { @@ -121,10 +121,13 @@ void ret(const UDSPInstruction& opc) // Return from exception. Pops stored status register $sr from data stack // $st1 and program counter PC from call stack $st0 and sets $pc to this // location. +// FIXME: is it also conditional? unknown opcodes 0x02fx void rti(const UDSPInstruction& opc) { g_dsp.r[DSP_REG_SR] = dsp_reg_load_stack(DSP_STACK_D); g_dsp.pc = dsp_reg_load_stack(DSP_STACK_C); + + g_dsp.exception_in_progress_hack = false; } // HALT