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JitArm64: implement dcbx
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parent
8f75594de7
commit
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@ -124,6 +124,7 @@ public:
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void stX(UGeckoInstruction inst);
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void stX(UGeckoInstruction inst);
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void lmw(UGeckoInstruction inst);
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void lmw(UGeckoInstruction inst);
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void stmw(UGeckoInstruction inst);
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void stmw(UGeckoInstruction inst);
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void dcbx(UGeckoInstruction inst);
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void dcbt(UGeckoInstruction inst);
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void dcbt(UGeckoInstruction inst);
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void dcbz(UGeckoInstruction inst);
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void dcbz(UGeckoInstruction inst);
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@ -9,9 +9,11 @@
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#include "Core/ConfigManager.h"
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#include "Core/ConfigManager.h"
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#include "Core/Core.h"
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#include "Core/Core.h"
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#include "Core/CoreTiming.h"
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#include "Core/CoreTiming.h"
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#include "Core/HW/DSP.h"
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#include "Core/HW/GPFifo.h"
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#include "Core/HW/GPFifo.h"
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#include "Core/HW/Memmap.h"
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#include "Core/HW/Memmap.h"
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#include "Core/HW/MMIO.h"
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#include "Core/HW/MMIO.h"
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#include "Core/PowerPC/JitInterface.h"
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#include "Core/PowerPC/PowerPC.h"
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#include "Core/PowerPC/PowerPC.h"
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#include "Core/PowerPC/PPCTables.h"
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#include "Core/PowerPC/PPCTables.h"
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#include "Core/PowerPC/JitArm64/Jit.h"
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#include "Core/PowerPC/JitArm64/Jit.h"
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@ -694,6 +696,90 @@ void JitArm64::stmw(UGeckoInstruction inst)
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gpr.Unlock(WA, WB);
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gpr.Unlock(WA, WB);
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}
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}
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void JitArm64::dcbx(UGeckoInstruction inst)
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{
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INSTRUCTION_START
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JITDISABLE(bJITLoadStoreOff);
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gpr.Lock(W30);
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ARM64Reg addr = gpr.GetReg();
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ARM64Reg value = gpr.GetReg();
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ARM64Reg WA = W30;
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u32 a = inst.RA, b = inst.RB;
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if (a)
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ADD(addr, gpr.R(a), gpr.R(b));
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else
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MOV(addr, gpr.R(b));
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// Check whether a JIT cache line needs to be invalidated.
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AND(value, addr, 32 - 10, 28 - 10); // upper three bits and last 10 bit are masked for the bitset of cachelines, 0x1ffffc00
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LSR(value, value, 5 + 5); // >> 5 for cache line size, >> 5 for width of bitset
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MOVI2R(EncodeRegTo64(WA), (u64)jit->GetBlockCache()->GetBlockBitSet());
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LDR(value, EncodeRegTo64(WA), ArithOption(EncodeRegTo64(value), true));
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LSR(addr, addr, 5); // mask sizeof cacheline, & 0x1f is the position within the bitset
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LSR(value, value, addr); // move current bit to bit 0
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FixupBranch bit_not_set = TBZ(value, 0);
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FixupBranch far = B();
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SwitchToFarCode();
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SetJumpTarget(far);
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BitSet32 gprs_to_push = gpr.GetCallerSavedUsed();
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BitSet32 fprs_to_push = fpr.GetCallerSavedUsed();
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ABI_PushRegisters(gprs_to_push);
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m_float_emit.ABI_PushRegisters(fprs_to_push, X30);
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LSL(W0, addr, 5);
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MOVI2R(X1, 32);
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MOVI2R(X2, 0);
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MOVI2R(X3, (u64)(void*)JitInterface::InvalidateICache);
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BLR(X3);
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m_float_emit.ABI_PopRegisters(fprs_to_push, X30);
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ABI_PopRegisters(gprs_to_push);
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FixupBranch near = B();
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SwitchToNearCode();
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SetJumpTarget(bit_not_set);
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SetJumpTarget(near);
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// dcbi
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if (inst.SUBOP10 == 470)
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{
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// Flush DSP DMA if DMAState bit is set
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MOVI2R(EncodeRegTo64(WA), (u64)&DSP::g_dspState);
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LDRH(INDEX_UNSIGNED, WA, EncodeRegTo64(WA), 0);
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bit_not_set = TBZ(WA, 9);
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far = B();
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SwitchToFarCode();
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SetJumpTarget(far);
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ABI_PushRegisters(gprs_to_push);
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m_float_emit.ABI_PushRegisters(fprs_to_push, X30);
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LSL(W0, addr, 5);
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MOVI2R(X1, (u64)DSP::FlushInstantDMA);
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BLR(X1);
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m_float_emit.ABI_PopRegisters(fprs_to_push, X30);
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ABI_PopRegisters(gprs_to_push);
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near = B();
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SwitchToNearCode();
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SetJumpTarget(near);
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SetJumpTarget(bit_not_set);
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}
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gpr.Unlock(addr, value, W30);
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}
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void JitArm64::dcbt(UGeckoInstruction inst)
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void JitArm64::dcbt(UGeckoInstruction inst)
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{
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{
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INSTRUCTION_START
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INSTRUCTION_START
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@ -219,11 +219,11 @@ static GekkoOPTemplate table31[] =
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{824, &JitArm64::srawix}, // srawix
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{824, &JitArm64::srawix}, // srawix
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{24, &JitArm64::slwx}, // slwx
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{24, &JitArm64::slwx}, // slwx
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{54, &JitArm64::FallBackToInterpreter}, // dcbst
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{54, &JitArm64::dcbx}, // dcbst
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{86, &JitArm64::FallBackToInterpreter}, // dcbf
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{86, &JitArm64::dcbx}, // dcbf
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{246, &JitArm64::dcbt}, // dcbtst
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{246, &JitArm64::dcbt}, // dcbtst
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{278, &JitArm64::dcbt}, // dcbt
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{278, &JitArm64::dcbt}, // dcbt
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{470, &JitArm64::FallBackToInterpreter}, // dcbi
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{470, &JitArm64::dcbx}, // dcbi
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{758, &JitArm64::DoNothing}, // dcba
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{758, &JitArm64::DoNothing}, // dcba
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{1014, &JitArm64::dcbz}, // dcbz
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{1014, &JitArm64::dcbz}, // dcbz
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