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https://github.com/dolphin-emu/dolphin.git
synced 2025-01-18 19:28:36 +00:00
Add the mixer change from issue 1479 (use sleep(1) instead of cpu yield)
Fix aram handling in wii mode - was doing strange things with aram AND mem2 space - only mem2 exists on wii. Let me know if this breaks anything... Fix Wii BS2 HLE - don't zero out bytes 6 and 7 Thanks to skidau for finding the ssbb error cause :) Fixes issue 303 Fixes issue 1479 git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4687 8ced0084-cf51-0410-be5f-012b33b47a6e
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5f47aa7bb1
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@ -108,7 +108,7 @@ void CMixer::PushSamples(short *samples, int num_stereo_samples, int core_sample
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return;
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}
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soundStream->Update();
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Common::YieldCPU();
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SLEEP(1);
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}
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// -----------------------------------------------------------------------
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@ -272,8 +272,6 @@ bool CBoot::SetupWiiMemory(unsigned int _CountryCode)
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Memory::Write_U32(0x00000000, 0x00003160); // Init semaphore (sysmenu waits for this to clear)
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Memory::Write_U8(0x80, 0x0000315c); // OSInit
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Memory::Write_U8(0x00, 0x00000006); // DVDInit
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Memory::Write_U8(0x00, 0x00000007); // DVDInit
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Memory::Write_U16(0x0000, 0x000030e0); // PADInit
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Memory::Write_U32(0x80000000, 0x00003184); // GameID Address
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@ -167,9 +167,25 @@ struct ARDMA
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}
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};
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// So we may abstract gc/wii differences a little
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struct ARAMInfo
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{
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bool wii_mode; // wii EXRAM is managed in Memory:: so we need to skip statesaving, etc
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u32 size;
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u32 mask;
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u8* ptr; // aka audio ram, auxiliary ram, MEM2, EXRAM, etc...
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// Default to GC mode
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ARAMInfo() {
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wii_mode = false;
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size = ARAM_SIZE;
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mask = ARAM_MASK;
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ptr = NULL;
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}
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};
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// STATE_TO_SAVE
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u8 *g_ARAM = NULL, *g_MEM2 = NULL;
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static ARAMInfo g_ARAM;
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DSPState g_dspState;
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AudioDMA g_audioDMA;
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ARDMA g_arDMA;
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@ -181,10 +197,11 @@ u16 g_AR_MODE = 0x43; // 0x23 -> Zelda standard mode (standard ARAM access ??)
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Common::PluginDSP *dsp_plugin;
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void DoState(PointerWrap &p)
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{
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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p.DoArray(g_ARAM, ARAM_SIZE);
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if (!g_ARAM.wii_mode)
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p.DoArray(g_ARAM.ptr, g_ARAM.size);
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p.Do(g_dspState);
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p.Do(g_audioDMA);
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p.Do(g_arDMA);
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@ -213,12 +230,14 @@ void Init()
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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{
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// On the Wii, ARAM is simply mapped to EXRAM.
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g_ARAM = Memory::GetPointer(0x00000000);
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g_MEM2 = Memory::GetPointer(0x10000000);
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g_ARAM.wii_mode = true;
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g_ARAM.size = Memory::EXRAM_SIZE;
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g_ARAM.mask = Memory::EXRAM_MASK;
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g_ARAM.ptr = Memory::GetPointer(0x10000000);
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}
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else
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{
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g_ARAM = (u8 *)AllocateMemoryPages(ARAM_SIZE);
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g_ARAM.ptr = (u8 *)AllocateMemoryPages(g_ARAM.size);
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}
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g_audioDMA.AudioDMAControl.Hex = 0;
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g_dspState.DSPControl.Hex = 0;
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@ -228,9 +247,10 @@ void Init()
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void Shutdown()
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{
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if (!SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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FreeMemoryPages(g_ARAM, ARAM_SIZE);
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g_ARAM = NULL;
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if (!g_ARAM.wii_mode)
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FreeMemoryPages(g_ARAM.ptr, g_ARAM.size);
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g_ARAM.ptr = NULL;
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dsp_plugin = NULL;
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}
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@ -466,24 +486,37 @@ void UpdateAudioDMA()
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void Read32(u32& _uReturnValue, const u32 _iAddress)
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{
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INFO_LOG(DSPINTERFACE, "DSPInterface(r) 0x%08x", _iAddress);
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INFO_LOG(DSPINTERFACE, "DSPInterface(r32) 0x%08x", _iAddress);
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switch (_iAddress & 0xFFFF)
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{
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default:
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_dbg_assert_(DSPINTERFACE,0);
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break;
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case DSP_MAIL_TO_DSP_HI:
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_uReturnValue = (dsp_plugin->DSP_ReadMailboxHigh(true) << 16) | dsp_plugin->DSP_ReadMailboxLow(true);
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break;
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default:
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_dbg_assert_(DSPINTERFACE,0);
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break;
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}
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_uReturnValue = 0;
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}
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void Write32(const u32 _iValue, const u32 _iAddress)
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{
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INFO_LOG(DSPINTERFACE, "DSPInterface(w) 0x%08x 0x%08x", _iValue, _iAddress);
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INFO_LOG(DSPINTERFACE, "DSPInterface(w32) 0x%08x 0x%08x", _iValue, _iAddress);
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switch (_iAddress & 0xFFFF)
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{
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case DSP_MAIL_TO_DSP_HI:
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dsp_plugin->DSP_WriteMailboxHigh(true, _iValue >> 16);
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dsp_plugin->DSP_WriteMailboxLow(true, (u16)_iValue);
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break;
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case AUDIO_DMA_START_HI:
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g_audioDMA.SourceAddress = _iValue;
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break;
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// AR_REGS - i dont know why they are accessed 32 bit too ...
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// Answer: simply because they can be
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case AR_DMA_MMADDR_H:
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g_arDMA.MMAddr = _iValue;
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break;
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@ -559,7 +592,7 @@ void Update_ARAM_DMA()
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// TODO(??): sanity check instead of writing bogus data?
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for (u32 i = 0; i < g_arDMA.Cnt.count; i++)
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{
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u32 tmp = (iARAMAddress < ARAM_SIZE) ? g_ARAM[iARAMAddress] : 0x05050505;
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u32 tmp = (iARAMAddress < g_ARAM.size) ? g_ARAM.ptr[iARAMAddress] : 0x05050505;
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Memory::Write_U8(tmp, iMemAddress);
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iMemAddress++;
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@ -576,8 +609,8 @@ void Update_ARAM_DMA()
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g_arDMA.Cnt.count, g_arDMA.MMAddr, g_arDMA.ARAddr);
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for (u32 i = 0; i < g_arDMA.Cnt.count; i++)
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{
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if (iARAMAddress < ARAM_SIZE)
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g_ARAM[iARAMAddress] = Memory::Read_U8(iMemAddress);
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if (iARAMAddress < g_ARAM.size)
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g_ARAM.ptr[iARAMAddress] = Memory::Read_U8(iMemAddress);
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iMemAddress++;
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iARAMAddress++;
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@ -591,74 +624,27 @@ void Update_ARAM_DMA()
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// This is how it works: The game has written sound to RAM, the DSP will read
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// it with this function. SamplePos in the plugin is double the value given
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// here because it works on a nibble level. In Wii addresses can eather be for
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// here because it works on a nibble level. In Wii addresses can either be for
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// MEM1 or MEM2, when it wants to read from MEM2 it adds 0x2000000 (in nibble
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// terms) to get up to the MEM2 hardware address. But in our case we use a
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// second pointer and adjust the value down to 0x00...
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// ^^^^Old comment, if it still applies, the R/W ARAM funcs below need to be changed
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u8 ReadARAM(u32 _iAddress)
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{
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (r) 0x%08x", _iAddress);
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// _dbg_assert_(DSPINTERFACE,(_iAddress) < ARAM_SIZE);
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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{
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (r) 0x%08x 0x%08x 0x%08x", WII_MASK, _iAddress, (_iAddress & WII_MASK));
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// Does this make any sense?
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if (_iAddress > WII_MASK)
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{
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if (_iAddress > WII_MEM2)
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_iAddress = (_iAddress & WII_MEM2);
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return g_MEM2[_iAddress];
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}
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else
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{
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return g_ARAM[_iAddress];
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}
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}
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else
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return g_ARAM[_iAddress & ARAM_MASK];
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//_dbg_assert_(DSPINTERFACE,(_iAddress) < ARAM_SIZE);
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return g_ARAM.ptr[_iAddress & g_ARAM.mask];
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}
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void WriteARAM(u8 value, u32 _uAddress)
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{
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if (SConfig::GetInstance().m_LocalCoreStartupParameter.bWii)
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{
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//DEBUG_LOG(DSPINTERFACE, 0, "ARAM (w) 0x%08x 0x%08x 0x%08x", WII_MASK, _iAddress, (_iAddress & WII_MASK));
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// Does this make any sense?
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if (_uAddress > WII_MASK)
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{
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if (_uAddress > WII_MEM2)
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_uAddress = (_uAddress & WII_MEM2);
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g_MEM2[_uAddress] = value;
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}
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else
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{
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g_ARAM[_uAddress] = value;
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}
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}
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else
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g_ARAM[_uAddress & ARAM_MASK] = value;
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g_ARAM.ptr[_uAddress & g_ARAM.mask] = value;
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}
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u8 *GetARAMPtr()
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{
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return g_ARAM;
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return g_ARAM.ptr;
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}
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/*
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// Should this really be a function? The hardware only supports block DMA.
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void WriteARAM(u8 _iValue, u32 _iAddress)
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{
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// LOGV(DSPINTERFACE, 0, "ARAM (w) 0x%08x = 0x%08x", _iAddress, (_iAddress & ARAM_MASK));
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// _dbg_assert_(DSPINTERFACE,(_iAddress) < ARAM_SIZE);
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// rouge leader writes WAY outside
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// not really surprising since it uses a totally different memory model :P
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g_ARAM[_iAddress & ARAM_MASK] = _iValue;
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}*/
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} // end of namespace DSP
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@ -34,10 +34,8 @@ enum DSPInterruptType
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// aram size and mask
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enum
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{
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ARAM_SIZE = 0x01000000, // 16 MB
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ARAM_SIZE = 0x01000000, // 16 MB
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ARAM_MASK = 0x00FFFFFF,
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WII_MASK = 0x017FFFFF, // 24 MB
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WII_MEM2 = 0x03FFFFFF // 64 MB
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};
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void Init();
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