mirror of
https://github.com/dolphin-emu/dolphin.git
synced 2025-03-14 04:19:29 +00:00
Fixed Issue 1711 (a bug that prevents some games from booting)
Thanks to chuvit's help Added safety check for CFrame::Update git-svn-id: https://dolphin-emu.googlecode.com/svn/trunk@4759 8ced0084-cf51-0410-be5f-012b33b47a6e
This commit is contained in:
ayuanx
parent
d4a1b97ac9
commit
40f4dd30c2
@ -309,6 +309,8 @@ CFrame::CFrame(wxFrame* parent,
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#endif
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{
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m_bControlsCreated = false;
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if (ShowLogWindow) SConfig::GetInstance().m_InterfaceLogWindow = true;
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// Give it a console early to show potential messages from this onward
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@ -461,6 +463,7 @@ CFrame::CFrame(wxFrame* parent,
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// ----------
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// Update controls
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m_bControlsCreated = true;
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UpdateGUI();
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//if we are ever going back to optional iso caching:
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@ -477,6 +480,8 @@ CFrame::CFrame(wxFrame* parent,
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// Destructor
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CFrame::~CFrame()
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{
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m_bControlsCreated = false;
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cdio_free_device_list(drives);
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/* The statbar sample has this so I add this to, but I guess timer will be deleted after
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this anyway */
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@ -195,6 +195,7 @@ class CFrame : public wxFrame
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bool m_bTabSplit;
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bool m_bNoDocking;
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bool m_bModalDialogOpen;
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bool m_bControlsCreated;
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char **drives;
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@ -915,6 +915,9 @@ void CFrame::OnFrameSkip(wxCommandEvent& event)
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// Update the enabled/disabled status
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void CFrame::UpdateGUI()
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{
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if (!m_bControlsCreated)
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return;
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// Save status
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bool Initialized = Core::isRunning();
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bool Running = Core::GetState() == Core::CORE_RUN;
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@ -83,6 +83,11 @@ namespace CommandProcessor
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int et_UpdateInterrupts;
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void UpdateInterrupts_Wrapper(u64 userdata, int cyclesLate)
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{
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UpdateInterrupts((userdata) ? true : false);
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}
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// look for 1002 verts, breakpoint there, see why next draw is flushed
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// TODO(ector): Warn on bbox read/write
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@ -151,12 +156,12 @@ void Init()
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fake_GPWatchdogLastToken = 0;
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memset(&fifo,0,sizeof(fifo));
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//fifo.CPCmdIdle = 1 ;
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fifo.CPCmdIdle = 1 ;
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fifo.CPReadIdle = 1;
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s_fifoIdleEvent.Init();
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// et_UpdateInterrupts = g_VideoInitialize.pRegisterEvent("UpdateInterrupts", UpdateInterrupts_Wrapper);
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et_UpdateInterrupts = g_VideoInitialize.pRegisterEvent("UpdateInterrupts", UpdateInterrupts_Wrapper);
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}
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void Shutdown()
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@ -179,14 +184,14 @@ void Read16(u16& _rReturnValue, const u32 _Address)
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//m_CPStatusReg.ReadIdle = 1;
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//m_CPStatusReg.CommandIdle = 1;
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m_CPStatusReg.ReadIdle = fifo.CPReadIdle; // This seems not necessary though
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//m_CPStatusReg.ReadIdle = fifo.CPReadIdle; // This seems not necessary though
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m_CPStatusReg.Breakpoint = fifo.bFF_Breakpoint;
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// Clear on Read
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UpdateInterrupts(false);
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_rReturnValue = m_CPStatusReg.Hex;
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DEBUG_LOG(COMMANDPROCESSOR, "\t iBP %s | fREADIDLE %s | fCMDIDLE %s | iOvF %s | iUndF %s"
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// Clear on read
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UpdateInterrupts(false);
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DEBUG_LOG(COMMANDPROCESSOR, "(r) status: iBP %s | fReadIdle %s | fCmdIdle %s | iOvF %s | iUndF %s"
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, m_CPStatusReg.Breakpoint ? "ON" : "OFF"
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, m_CPStatusReg.ReadIdle ? "ON" : "OFF"
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, m_CPStatusReg.CommandIdle ? "ON" : "OFF"
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@ -196,7 +201,10 @@ void Read16(u16& _rReturnValue, const u32 _Address)
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return;
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case CTRL_REGISTER: _rReturnValue = m_CPCtrlReg.Hex; return;
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case CLEAR_REGISTER: _rReturnValue = m_CPClearReg.Hex; return;
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case CLEAR_REGISTER:
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_rReturnValue = m_CPClearReg.Hex;
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DEBUG_LOG(COMMANDPROCESSOR, "(r) clear: 0x%04x", _rReturnValue);
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return;
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case FIFO_TOKEN_REGISTER: _rReturnValue = m_tokenReg; return;
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case FIFO_BOUNDING_BOX_LEFT: _rReturnValue = m_bboxleft; return;
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@ -256,32 +264,86 @@ void Read16(u16& _rReturnValue, const u32 _Address)
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case FIFO_BP_LO: _rReturnValue = ReadLow (fifo.CPBreakpoint); return;
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case FIFO_BP_HI: _rReturnValue = ReadHigh(fifo.CPBreakpoint); return;
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case CP_PERF0_L: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF0_L: %04x", _rReturnValue); break; // XF counters
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case CP_PERF0_H: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF0_H: %04x", _rReturnValue); break;
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// AyuanX: Lots of games read the followings (e.g. Mario Power Tennis)
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case XF_RASBUSY_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_RASBUSY_L: %04x", _rReturnValue);
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return;
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case XF_RASBUSY_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_RASBUSY_H: %04x", _rReturnValue);
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return;
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case CP_PERF1_L: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF1_L: %04x", _rReturnValue); break;
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case CP_PERF1_H: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF1_H: %04x", _rReturnValue); break;
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case XF_CLKS_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_CLKS_L: %04x", _rReturnValue);
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return;
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case XF_CLKS_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_CLKS_H: %04x", _rReturnValue);
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return;
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case CP_PERF2_L: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF2_L: %04x", _rReturnValue); break;
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case CP_PERF2_H: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF2_H: %04x", _rReturnValue); break;
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case XF_WAIT_IN_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_IN_L: %04x", _rReturnValue);
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return;
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case XF_WAIT_IN_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_IN_H: %04x", _rReturnValue);
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return;
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case CP_PERF3_L: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF3_L: %04x", _rReturnValue); break;
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case CP_PERF3_H: _rReturnValue = 0; WARN_LOG(COMMANDPROCESSOR, "Read from PERF3_H: %04x", _rReturnValue); break;
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case XF_WAIT_OUT_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_OUT_L: %04x", _rReturnValue);
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return;
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case XF_WAIT_OUT_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from XF_WAIT_OUT_H: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_CHECK_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_CHECK_L: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_CHECK_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_CHECK_H: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_MISS_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_MISS_L: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_MISS_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_MISS_H: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_STALL_L:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_STALL_L: %04x", _rReturnValue);
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return;
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case VCACHE_METRIC_STALL_H:
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_rReturnValue = 0; // TODO: Figure out the true value
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DEBUG_LOG(COMMANDPROCESSOR, "Read from VCACHE_METRIC_STALL_H: %04x", _rReturnValue);
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return;
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case CLKS_PER_VTX_OUT:
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_rReturnValue = 4; //Number of clocks per vertex.. TODO: Calculate properly
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WARN_LOG(COMMANDPROCESSOR, "Read from CLKS_PER_VTX_OUT: %04x", _rReturnValue);
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break;
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return;
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//add all the other regs here? are they ever read?
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default:
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_rReturnValue = 0;
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WARN_LOG(COMMANDPROCESSOR, "(r16) unknown CP reg @ %08x", _Address);
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return;
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}
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return;
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}
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void Write16(const u16 _Value, const u32 _Address)
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{
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bool bUpdate = false;
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INFO_LOG(COMMANDPROCESSOR, "(write16): 0x%04x @ 0x%08x",_Value,_Address);
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//Spin until queue is empty - it WILL become empty because this is the only thread
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@ -335,41 +397,17 @@ void Write16(const u16 _Value, const u32 _Address)
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case CTRL_REGISTER:
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{
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// TOCHECK (mb2): could BP irq be cleared with w16 to STATUS_REGISTER?
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// funny hack: eg in MP1 if we disable the clear breakpoint ability by commenting this block
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// the game is of course faster but looks stable too.
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// Well, the hack is more stable than the "proper" way actualy :p ... it breaks MP2 when ship lands
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// So I let the hack for now.
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// Checkmate re-enabled it, so please test
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// TODO (mb2): fix this!
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UCPCtrlReg tmpCtrl(_Value);
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m_CPCtrlReg.Hex = tmpCtrl.Hex;
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Common::AtomicStore(fifo.bFF_GPLinkEnable, tmpCtrl.GPLinkEnable);
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Common::AtomicStore(fifo.bFF_GPReadEnable, tmpCtrl.GPReadEnable);
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Common::AtomicStore(fifo.bFF_BPEnable, tmpCtrl.BPEnable);
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if (g_VideoInitialize.bOnThread)
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if (tmpCtrl.BPInit && tmpCtrl.BPEnable && tmpCtrl.GPReadEnable)
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{
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// Instant Breakpoint and Interrupt, since we haven't implemented accurate BP on dual core
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// Most likely the Read thread has already exceeded BP here, but it seems we are still cool
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if (tmpCtrl.BPEnable && tmpCtrl.CPIntEnable && tmpCtrl.GPReadEnable && tmpCtrl.GPLinkEnable)
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{
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Common::AtomicStore(fifo.bFF_Breakpoint, 1);
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UpdateInterrupts(true);
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}
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else
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{
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Common::AtomicStore(fifo.bFF_Breakpoint, 0);
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}
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}
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else
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{
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// fifo.bFF_BPEnable is only used in single core
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Common::AtomicStore(fifo.bFF_BPEnable, tmpCtrl.BPEnable && tmpCtrl.CPIntEnable && tmpCtrl.GPReadEnable && tmpCtrl.GPLinkEnable);
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if (!tmpCtrl.BPEnable || !tmpCtrl.CPIntEnable || !tmpCtrl.GPReadEnable || !tmpCtrl.GPLinkEnable)
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Common::AtomicStore(fifo.bFF_Breakpoint, 0);
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// Clear old BP and initiate new BP
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Common::AtomicStore(fifo.bFF_Breakpoint, 0);
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}
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to CTRL_REGISTER : %04x", _Value);
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@ -385,8 +423,8 @@ void Write16(const u16 _Value, const u32 _Address)
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break;
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case PERF_SELECT:
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// Seems to select which set of perf counters should be exposed.
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WARN_LOG(COMMANDPROCESSOR, "write to PERF_SELECT: %04x", _Value);
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// Seems to select which set of perf registers should be exposed.
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DEBUG_LOG(COMMANDPROCESSOR, "write to PERF_SELECT: %04x", _Value);
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break;
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case CLEAR_REGISTER:
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@ -404,38 +442,46 @@ void Write16(const u16 _Value, const u32 _Address)
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break;
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case FIFO_BASE_LO:
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// Oh hell, somtimes this value is not aligned with 32B, like New Super Mario Bros. Wii
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bUpdate = true;
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WriteLow ((u32 &)fifo.CPBase, _Value & 0xFFE0);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_BASE_LO : %04x", _Value);
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break;
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case FIFO_BASE_HI:
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bUpdate = true;
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WriteHigh((u32 &)fifo.CPBase, _Value);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_BASE_HI : %04x", _Value);
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break;
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case FIFO_END_LO:
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bUpdate = true;
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// Somtimes this value is not aligned with 32B, e.g. New Super Mario Bros. Wii
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WriteLow ((u32 &)fifo.CPEnd, _Value & 0xFFE0);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_END_LO : %04x", _Value);
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break;
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case FIFO_END_HI:
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bUpdate = true;
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WriteHigh((u32 &)fifo.CPEnd, _Value);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_END_HI : %04x", _Value);
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break;
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case FIFO_WRITE_POINTER_LO:
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bUpdate = true;
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WriteLow ((u32 &)fifo.CPWritePointer, _Value & 0xFFE0);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_WRITE_POINTER_LO : %04x", _Value);
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break;
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case FIFO_WRITE_POINTER_HI:
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bUpdate = true;
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WriteHigh((u32 &)fifo.CPWritePointer, _Value);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_WRITE_POINTER_HI : %04x", _Value);
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break;
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case FIFO_READ_POINTER_LO:
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bUpdate = true;
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WriteLow ((u32 &)fifo.CPReadPointer, _Value & 0xFFE0);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_READ_POINTER_LO : %04x", _Value);
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break;
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case FIFO_READ_POINTER_HI:
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bUpdate = true;
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WriteHigh((u32 &)fifo.CPReadPointer, _Value);
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DEBUG_LOG(COMMANDPROCESSOR,"\t write to FIFO_READ_POINTER_HI : %04x", _Value);
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break;
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@ -484,14 +530,11 @@ void Write16(const u16 _Value, const u32 _Address)
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WARN_LOG(COMMANDPROCESSOR, "(w16) unknown CP reg write %04x @ %08x", _Value, _Address);
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}
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// TODO(mb2): better. Check if it help: avoid CPReadPointer overwrites when stupidly done like in Super Monkey Ball
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if ((!fifo.bFF_GPReadEnable && fifo.CPReadIdle) || !g_VideoInitialize.bOnThread) // TOCHECK(mb2): check again if thread safe?
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if (bUpdate || !g_VideoInitialize.bOnThread) // TOCHECK(mb2): check again if thread safe?
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{
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// Disabling this thread synchronization check does boost the speed
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// Hope it is safe to skip this check
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// if (g_VideoInitialize.bOnThread) FifoCriticalEnter(); // This may not be necessary, just for safety
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if (g_VideoInitialize.bOnThread) FifoCriticalEnter(); // This may not be necessary, just for safety
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UpdateFifoRegister();
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// if (g_VideoInitialize.bOnThread) FifoCriticalLeave();
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if (g_VideoInitialize.bOnThread) FifoCriticalLeave();
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}
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}
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@ -514,7 +557,7 @@ void IncrementGPWDToken()
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bool AllowIdleSkipping()
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{
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return !g_VideoInitialize.bOnThread || (!m_CPCtrlReg.CPIntEnable && !m_CPCtrlReg.BPEnable);
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return !g_VideoInitialize.bOnThread || !m_CPCtrlReg.BPEnable;
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}
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// Check every FAKE_GP_WATCHDOG_PERIOD if a PE-frame-finish occured
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@ -562,7 +605,7 @@ void STACKALIGN GatherPipeBursted()
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// - CPU can write to fifo
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// - disable Underflow interrupt
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INFO_LOG(COMMANDPROCESSOR, "(GatherPipeBursted): CPHiWatermark reached");
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INFO_LOG(COMMANDPROCESSOR, "(GatherPipeBursted): CPHiWatermark reached, 0x%04X, 0x%04X", fifo.CPReadWriteDistance, fifo.CPLoWatermark);
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// Wait for GPU to catch up
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while (fifo.CPReadWriteDistance > fifo.CPLoWatermark && !fifo.bFF_Breakpoint)
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s_fifoIdleEvent.MsgWait();
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@ -591,7 +634,7 @@ void STACKALIGN GatherPipeBursted()
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void CatchUpGPU()
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{
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// check if we are able to run this buffer
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if (fifo.bFF_GPReadEnable && !fifo.bFF_Breakpoint)
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if (fifo.bFF_GPReadEnable && !(fifo.bFF_BPEnable && fifo.bFF_Breakpoint))
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{
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// HyperIris: Memory_GetPtr is an expensive call, call it less, run faster
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u8 *ptr = Memory_GetPtr(fifo.CPReadPointer);
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@ -678,18 +721,11 @@ void UpdateInterrupts(bool active)
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g_VideoInitialize.pSetInterrupt(INT_CAUSE_CP, active);
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}
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/*
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void UpdateInterruptsFromVideoPlugin()
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void UpdateInterruptsFromVideoPlugin(bool active)
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{
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g_VideoInitialize.pScheduleEvent_Threadsafe(0, et_UpdateInterrupts, 0);
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g_VideoInitialize.pScheduleEvent_Threadsafe(0, et_UpdateInterrupts, active);
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}
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void UpdateInterrupts_Wrapper(u64 userdata, int cyclesLate)
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{
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UpdateInterrupts();
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}
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*/
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void SetFifoIdleFromVideoPlugin()
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{
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s_fifoIdleEvent.Set();
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@ -36,7 +36,7 @@ enum
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STATUS_REGISTER = 0x00,
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CTRL_REGISTER = 0x02,
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CLEAR_REGISTER = 0x04,
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PERF_SELECT = 0x06,
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PERF_SELECT = 0x06,
|
||||
FIFO_TOKEN_REGISTER = 0x0E,
|
||||
FIFO_BOUNDING_BOX_LEFT = 0x10,
|
||||
FIFO_BOUNDING_BOX_RIGHT = 0x12,
|
||||
@ -58,23 +58,23 @@ enum
|
||||
FIFO_READ_POINTER_HI = 0x3A,
|
||||
FIFO_BP_LO = 0x3C,
|
||||
FIFO_BP_HI = 0x3E,
|
||||
CP_PERF0_L = 0x40,
|
||||
CP_PERF0_H = 0x42,
|
||||
CP_PERF1_L = 0x44,
|
||||
CP_PERF1_H = 0x46,
|
||||
CP_PERF2_L = 0x48,
|
||||
CP_PERF2_H = 0x4a,
|
||||
CP_PERF3_L = 0x4c,
|
||||
CP_PERF3_H = 0x4e,
|
||||
VCACHE_METRIC_CHECK_LO = 0x50,
|
||||
VCACHE_METRIC_CHECK_HI = 0x52,
|
||||
VCACHE_METRIC_MISS_LO = 0x54,
|
||||
VCACHE_METRIC_MISS_HI = 0x56,
|
||||
VCACHE_METRIC_STALL_LO = 0x58,
|
||||
VCACHE_METRIC_STALL_HI = 0x5A,
|
||||
CLKS_PER_VTX_IN0 = 0x60,
|
||||
CLKS_PER_VTX_IN1 = 0x62,
|
||||
CLKS_PER_VTX_OUT = 0x64,
|
||||
XF_RASBUSY_L = 0x40,
|
||||
XF_RASBUSY_H = 0x42,
|
||||
XF_CLKS_L = 0x44,
|
||||
XF_CLKS_H = 0x46,
|
||||
XF_WAIT_IN_L = 0x48,
|
||||
XF_WAIT_IN_H = 0x4a,
|
||||
XF_WAIT_OUT_L = 0x4c,
|
||||
XF_WAIT_OUT_H = 0x4e,
|
||||
VCACHE_METRIC_CHECK_L = 0x50,
|
||||
VCACHE_METRIC_CHECK_H = 0x52,
|
||||
VCACHE_METRIC_MISS_L = 0x54,
|
||||
VCACHE_METRIC_MISS_H = 0x56,
|
||||
VCACHE_METRIC_STALL_L = 0x58,
|
||||
VCACHE_METRIC_STALL_H = 0x5A,
|
||||
CLKS_PER_VTX_IN_L = 0x60,
|
||||
CLKS_PER_VTX_IN_H = 0x62,
|
||||
CLKS_PER_VTX_OUT = 0x64,
|
||||
};
|
||||
|
||||
enum
|
||||
@ -106,11 +106,11 @@ union UCPCtrlReg
|
||||
struct
|
||||
{
|
||||
unsigned GPReadEnable : 1;
|
||||
unsigned CPIntEnable : 1;
|
||||
unsigned BPEnable : 1;
|
||||
unsigned FifoOverflowIntEnable : 1;
|
||||
unsigned FifoUnderflowIntEnable : 1;
|
||||
unsigned GPLinkEnable : 1;
|
||||
unsigned BPEnable : 1;
|
||||
unsigned BPInit : 1;
|
||||
unsigned : 10;
|
||||
};
|
||||
u16 Hex;
|
||||
@ -149,7 +149,7 @@ void CatchUpGPU();
|
||||
void GatherPipeBursted();
|
||||
void UpdateFifoRegister();
|
||||
void UpdateInterrupts(bool active);
|
||||
//void UpdateInterruptsFromVideoPlugin();
|
||||
void UpdateInterruptsFromVideoPlugin(bool active);
|
||||
void SetFifoIdleFromVideoPlugin();
|
||||
|
||||
bool AllowIdleSkipping();
|
||||
|
||||
@ -138,78 +138,73 @@ void Fifo_EnterLoop(const SVideoInitialize &video_initialize)
|
||||
VideoFifo_CheckSwapRequest();
|
||||
|
||||
// check if we are able to run this buffer
|
||||
if (_fifo.bFF_GPReadEnable && _fifo.CPReadWriteDistance && !_fifo.bFF_Breakpoint)
|
||||
while (_fifo.bFF_GPReadEnable && _fifo.CPReadWriteDistance && !(_fifo.bFF_BPEnable && _fifo.bFF_Breakpoint))
|
||||
{
|
||||
Common::AtomicStore(_fifo.CPReadIdle, 0);
|
||||
if (!fifoStateRun)
|
||||
break;
|
||||
|
||||
while (_fifo.bFF_GPReadEnable && _fifo.CPReadWriteDistance)
|
||||
CommandProcessor::FifoCriticalEnter();
|
||||
|
||||
// Create pointer to video data and send it to the VideoPlugin
|
||||
u32 readPtr = _fifo.CPReadPointer;
|
||||
u8 *uData = video_initialize.pGetMemoryPointer(readPtr);
|
||||
|
||||
// If we are in BP mode we only send 32B chunks to Video plugin for BP checking
|
||||
if (_fifo.bFF_BPEnable)
|
||||
{
|
||||
if (!fifoStateRun)
|
||||
break;
|
||||
|
||||
// Create pointer to video data and send it to the VideoPlugin
|
||||
u32 readPtr = _fifo.CPReadPointer;
|
||||
u8 *uData = video_initialize.pGetMemoryPointer(readPtr);
|
||||
|
||||
CommandProcessor::FifoCriticalEnter();
|
||||
|
||||
// It looks like even in BP mode, we still can send all the chunks we have
|
||||
/*
|
||||
// if we are on BP mode we must send 32B chunks to Video plugin for BP checking
|
||||
// TODO (mb2): test & check if MP1/MP2 realy need this now.
|
||||
if (_fifo.bFF_BPEnable)
|
||||
// Sometimes we have already exceeded the BP even before it is set
|
||||
// so careful check is required
|
||||
if (
|
||||
(readPtr == _fifo.CPBreakpoint) ||
|
||||
(readPtr == _fifo.CPWritePointer) ||
|
||||
(_fifo.CPWritePointer < _fifo.CPBreakpoint)
|
||||
)
|
||||
{
|
||||
if (readPtr == _fifo.CPBreakpoint)
|
||||
{
|
||||
Common::AtomicStore(_fifo.bFF_Breakpoint, 1);
|
||||
CommandProcessor::UpdateInterruptsFromVideoPlugin();
|
||||
break;
|
||||
}
|
||||
Common::AtomicStore(_fifo.bFF_Breakpoint, 1);
|
||||
CommandProcessor::UpdateInterruptsFromVideoPlugin(true);
|
||||
break;
|
||||
}
|
||||
|
||||
distToSend = 32;
|
||||
|
||||
if ( readPtr >= _fifo.CPEnd)
|
||||
readPtr = _fifo.CPBase;
|
||||
else
|
||||
readPtr += 32;
|
||||
distToSend = 32;
|
||||
|
||||
if ( readPtr >= _fifo.CPEnd)
|
||||
readPtr = _fifo.CPBase;
|
||||
else
|
||||
readPtr += 32;
|
||||
}
|
||||
else
|
||||
{
|
||||
distToSend = _fifo.CPReadWriteDistance;
|
||||
// send 1024B chunk max length to have better control over PeekMessages' period
|
||||
distToSend = distToSend > 1024 ? 1024 : distToSend;
|
||||
// add 32 bytes because the cp end points to the start of the last 32 byte chunk
|
||||
if ((distToSend + readPtr) >= (_fifo.CPEnd + 32)) // TODO: better?
|
||||
{
|
||||
distToSend =(_fifo.CPEnd + 32) - readPtr;
|
||||
readPtr = _fifo.CPBase;
|
||||
}
|
||||
else
|
||||
*/
|
||||
{
|
||||
distToSend = _fifo.CPReadWriteDistance;
|
||||
// send 1024B chunk max length to have better control over PeekMessages' period
|
||||
distToSend = distToSend > 1024 ? 1024 : distToSend;
|
||||
// add 32 bytes because the cp end points to the start of the last 32 byte chunk
|
||||
if ((distToSend + readPtr) >= (_fifo.CPEnd + 32)) // TODO: better?
|
||||
{
|
||||
distToSend =(_fifo.CPEnd + 32) - readPtr;
|
||||
readPtr = _fifo.CPBase;
|
||||
}
|
||||
else
|
||||
readPtr += distToSend;
|
||||
}
|
||||
|
||||
// Execute new instructions found in uData
|
||||
Fifo_SendFifoData(uData, distToSend);
|
||||
|
||||
Common::AtomicStore(_fifo.CPReadPointer, readPtr);
|
||||
Common::AtomicAdd(_fifo.CPReadWriteDistance, -distToSend);
|
||||
|
||||
CommandProcessor::FifoCriticalLeave();
|
||||
|
||||
// Those two are pretty important and must be called in the FIFO Loop.
|
||||
// If we don't, s_swapRequested (OGL only) or s_efbAccessRequested won't be set to false
|
||||
// leading the CPU thread to wait in Video_BeginField or Video_AccessEFB thus slowing things down.
|
||||
VideoFifo_CheckEFBAccess();
|
||||
VideoFifo_CheckSwapRequest();
|
||||
readPtr += distToSend;
|
||||
}
|
||||
Common::AtomicStore(_fifo.CPReadIdle, 1);
|
||||
CommandProcessor::SetFifoIdleFromVideoPlugin();
|
||||
|
||||
// Execute new instructions found in uData
|
||||
Fifo_SendFifoData(uData, distToSend);
|
||||
|
||||
Common::AtomicStore(_fifo.CPReadPointer, readPtr);
|
||||
Common::AtomicAdd(_fifo.CPReadWriteDistance, -distToSend);
|
||||
|
||||
CommandProcessor::FifoCriticalLeave();
|
||||
|
||||
// Those two are pretty important and must be called in the FIFO Loop.
|
||||
// If we don't, s_swapRequested (OGL only) or s_efbAccessRequested won't be set to false
|
||||
// leading the CPU thread to wait in Video_BeginField or Video_AccessEFB thus slowing things down.
|
||||
VideoFifo_CheckEFBAccess();
|
||||
VideoFifo_CheckSwapRequest();
|
||||
|
||||
CommandProcessor::SetFifoIdleFromVideoPlugin();
|
||||
}
|
||||
else
|
||||
{
|
||||
Common::YieldCPU();
|
||||
}
|
||||
|
||||
Common::YieldCPU();
|
||||
}
|
||||
fifo_exit_event.Set();
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user