diff --git a/Source/Core/Core/CMakeLists.txt b/Source/Core/Core/CMakeLists.txt
index aeb3c4be16..0072c57254 100644
--- a/Source/Core/Core/CMakeLists.txt
+++ b/Source/Core/Core/CMakeLists.txt
@@ -206,10 +206,11 @@ if(_M_X86)
PowerPC/Jit64/Jit_Paired.cpp
PowerPC/Jit64/JitRegCache.cpp
PowerPC/Jit64/Jit_SystemRegisters.cpp
+ PowerPC/Jit64Common/BlockCache.cpp
PowerPC/Jit64Common/Jit64AsmCommon.cpp
- PowerPC/JitCommon/JitBackpatch.cpp
- PowerPC/JitCommon/Jit_Util.cpp
- PowerPC/JitCommon/TrampolineCache.cpp)
+ PowerPC/Jit64Common/Jit64Base.cpp
+ PowerPC/Jit64Common/Jit64Util.cpp
+ PowerPC/Jit64Common/TrampolineCache.cpp)
elseif(_M_ARM_64)
set(SRCS ${SRCS}
PowerPC/JitArm64/Jit.cpp
diff --git a/Source/Core/Core/Core.vcxproj b/Source/Core/Core/Core.vcxproj
index 7b1745536d..c851e266d4 100644
--- a/Source/Core/Core/Core.vcxproj
+++ b/Source/Core/Core/Core.vcxproj
@@ -237,13 +237,14 @@
+
+
+
+
-
-
-
@@ -429,12 +430,14 @@
+
+
+
+
-
-
diff --git a/Source/Core/Core/Core.vcxproj.filters b/Source/Core/Core/Core.vcxproj.filters
index 4a696ec05c..a42cc100c7 100644
--- a/Source/Core/Core/Core.vcxproj.filters
+++ b/Source/Core/Core/Core.vcxproj.filters
@@ -651,9 +651,6 @@
PowerPC
-
- PowerPC\JitCommon
-
PowerPC\JitCommon
@@ -663,9 +660,6 @@
PowerPC\JitCommon
-
- PowerPC\JitCommon
-
PowerPC\JitIL
@@ -741,12 +735,21 @@
PowerPC
-
- PowerPC\JitCommon
+
+ PowerPC\Jit64Common
PowerPC\Jit64Common
+
+ PowerPC\Jit64Common
+
+
+ PowerPC\Jit64Common
+
+
+ PowerPC\Jit64Common
+
IPC HLE %28IOS/Starlet%29\USB
@@ -1238,9 +1241,6 @@
PowerPC
-
- PowerPC\JitCommon
-
PowerPC\JitCommon
@@ -1250,9 +1250,6 @@
PowerPC\JitCommon
-
- PowerPC\JitCommon
-
PowerPC\JitIL
@@ -1278,9 +1275,21 @@
HW %28Flipper/Hollywood%29\GCKeyboard
+
+ PowerPC\Jit64Common
+
PowerPC\Jit64Common
+
+ PowerPC\Jit64Common
+
+
+ PowerPC\Jit64Common
+
+
+ PowerPC\Jit64Common
+
IPC HLE %28IOS/Starlet%29\USB
diff --git a/Source/Core/Core/PowerPC/CachedInterpreter.cpp b/Source/Core/Core/PowerPC/CachedInterpreter.cpp
index c57ab1e8d8..0173822147 100644
--- a/Source/Core/Core/PowerPC/CachedInterpreter.cpp
+++ b/Source/Core/Core/PowerPC/CachedInterpreter.cpp
@@ -10,6 +10,7 @@
#include "Core/HLE/HLE.h"
#include "Core/HW/CPU.h"
#include "Core/PowerPC/Gekko.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/PPCAnalyst.h"
#include "Core/PowerPC/PowerPC.h"
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.cpp b/Source/Core/Core/PowerPC/Jit64/Jit.cpp
index a24ad301cb..6b88e5ecb2 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit.cpp
@@ -26,7 +26,7 @@
#include "Core/PowerPC/Jit64/Jit64_Tables.h"
#include "Core/PowerPC/Jit64/JitAsm.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/JitInterface.h"
#include "Core/PowerPC/PowerPC.h"
#include "Core/PowerPC/Profiler.h"
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit.h b/Source/Core/Core/PowerPC/Jit64/Jit.h
index 9ff580d1a2..588d776fab 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit.h
+++ b/Source/Core/Core/PowerPC/Jit64/Jit.h
@@ -23,7 +23,7 @@
#include "Common/x64Emitter.h"
#include "Core/PowerPC/Jit64/JitAsm.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
+#include "Core/PowerPC/Jit64Common/Jit64Base.h"
#include "Core/PowerPC/JitCommon/JitCache.h"
#include "Core/PowerPC/PPCAnalyst.h"
diff --git a/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp b/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp
index 67baa2f485..c3dc984c5d 100644
--- a/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/JitRegCache.cpp
@@ -14,7 +14,7 @@
#include "Common/x64Emitter.h"
#include "Core/PowerPC/Jit64/Jit.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Gen;
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
index 4b6f262226..a8cd8a24d4 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_Integer.cpp
@@ -11,7 +11,7 @@
#include "Common/x64Emitter.h"
#include "Core/PowerPC/Jit64/Jit.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/PPCAnalyst.h"
#include "Core/PowerPC/PowerPC.h"
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
index c3af9345bf..973cc856cd 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStore.cpp
@@ -17,7 +17,7 @@
#include "Core/HW/DSP.h"
#include "Core/HW/Memmap.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/JitInterface.h"
#include "Core/PowerPC/PowerPC.h"
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp
index 2b334d2680..2c6d29003f 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStoreFloating.cpp
@@ -4,11 +4,10 @@
#include "Core/PowerPC/Jit64/Jit.h"
#include "Common/BitSet.h"
-#include "Common/CPUDetect.h"
#include "Common/CommonTypes.h"
#include "Common/x64Emitter.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
using namespace Gen;
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp
index 374da15668..c3f18e8a85 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_LoadStorePaired.cpp
@@ -6,13 +6,12 @@
// Should give a very noticeable speed boost to paired single heavy code.
#include "Core/PowerPC/Jit64/Jit.h"
-#include "Common/BitSet.h"
-#include "Common/CPUDetect.h"
+
#include "Common/CommonTypes.h"
#include "Common/x64Emitter.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/JitCommon/JitAsmCommon.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Gen;
diff --git a/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp b/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
index abc93dbca4..2f262540bd 100644
--- a/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
+++ b/Source/Core/Core/PowerPC/Jit64/Jit_SystemRegisters.cpp
@@ -9,7 +9,7 @@
#include "Core/CoreTiming.h"
#include "Core/HW/ProcessorInterface.h"
#include "Core/PowerPC/Jit64/JitRegCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Gen;
diff --git a/Source/Core/Core/PowerPC/Jit64Common/BlockCache.cpp b/Source/Core/Core/PowerPC/Jit64Common/BlockCache.cpp
new file mode 100644
index 0000000000..c19f471d19
--- /dev/null
+++ b/Source/Core/Core/PowerPC/Jit64Common/BlockCache.cpp
@@ -0,0 +1,40 @@
+// Copyright 2016 Dolphin Emulator Project
+// Licensed under GPLv2+
+// Refer to the license.txt file included.
+
+#include "Core/PowerPC/Jit64Common/BlockCache.h"
+
+#include "Common/CommonTypes.h"
+#include "Common/x64Emitter.h"
+#include "Core/PowerPC/JitCommon/JitBase.h"
+
+void JitBlockCache::WriteLinkBlock(const JitBlock::LinkData& source, const JitBlock* dest)
+{
+ u8* location = source.exitPtrs;
+ const u8* address = dest ? dest->checkedEntry : jit->GetAsmRoutines()->dispatcher;
+ Gen::XEmitter emit(location);
+ if (*location == 0xE8)
+ {
+ emit.CALL(address);
+ }
+ else
+ {
+ // If we're going to link with the next block, there is no need
+ // to emit JMP. So just NOP out the gap to the next block.
+ // Support up to 3 additional bytes because of alignment.
+ s64 offset = address - emit.GetCodePtr();
+ if (offset > 0 && offset <= 5 + 3)
+ emit.NOP(offset);
+ else
+ emit.JMP(address, true);
+ }
+}
+
+void JitBlockCache::WriteDestroyBlock(const JitBlock& block)
+{
+ // Only clear the entry points as we might still be within this block.
+ Gen::XEmitter emit((u8*)block.checkedEntry);
+ emit.INT3();
+ Gen::XEmitter emit2((u8*)block.normalEntry);
+ emit2.INT3();
+}
diff --git a/Source/Core/Core/PowerPC/Jit64Common/BlockCache.h b/Source/Core/Core/PowerPC/Jit64Common/BlockCache.h
new file mode 100644
index 0000000000..3d3f884e26
--- /dev/null
+++ b/Source/Core/Core/PowerPC/Jit64Common/BlockCache.h
@@ -0,0 +1,14 @@
+// Copyright 2016 Dolphin Emulator Project
+// Licensed under GPLv2+
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include "Core/PowerPC/JitCommon/JitCache.h"
+
+class JitBlockCache : public JitBaseBlockCache
+{
+private:
+ void WriteLinkBlock(const JitBlock::LinkData& source, const JitBlock* dest) override;
+ void WriteDestroyBlock(const JitBlock& block) override;
+};
diff --git a/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.cpp b/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.cpp
index 2ac5bfb750..e1ab7425ab 100644
--- a/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.cpp
+++ b/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.cpp
@@ -11,8 +11,8 @@
#include "Common/x64Emitter.h"
#include "Core/HW/GPFifo.h"
#include "Core/PowerPC/Gekko.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Base.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/PowerPC.h"
#define QUANTIZED_REGS_TO_SAVE \
diff --git a/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.h b/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.h
index fc9f1d8bea..e4cdad983a 100644
--- a/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.h
+++ b/Source/Core/Core/PowerPC/Jit64Common/Jit64AsmCommon.h
@@ -4,8 +4,9 @@
#pragma once
+#include "Common/CommonTypes.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/JitCommon/JitAsmCommon.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
enum EQuantizeType : u32;
diff --git a/Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp b/Source/Core/Core/PowerPC/Jit64Common/Jit64Base.cpp
similarity index 69%
rename from Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp
rename to Source/Core/Core/PowerPC/Jit64Common/Jit64Base.cpp
index 83119d2189..f4b0fc86b9 100644
--- a/Source/Core/Core/PowerPC/JitCommon/JitBackpatch.cpp
+++ b/Source/Core/Core/PowerPC/Jit64Common/Jit64Base.cpp
@@ -1,22 +1,24 @@
-// Copyright 2008 Dolphin Emulator Project
+// Copyright 2016 Dolphin Emulator Project
// Licensed under GPLv2+
// Refer to the license.txt file included.
-#include
+#include "Core/PowerPC/Jit64Common/Jit64Base.h"
+
+#include
+#include
#include
-#include "disasm.h"
-
#include "Common/Assert.h"
-#include "Common/BitSet.h"
#include "Common/CommonFuncs.h"
#include "Common/CommonTypes.h"
+#include "Common/GekkoDisassembler.h"
+#include "Common/Logging/Log.h"
#include "Common/MsgHandler.h"
-#include "Common/x64Emitter.h"
+#include "Common/StringUtil.h"
+#include "Common/x64Reg.h"
#include "Core/HW/Memmap.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
-
-using namespace Gen;
+#include "Core/MachineContext.h"
+#include "Core/PowerPC/PPCAnalyst.h"
// This generates some fairly heavy trampolines, but it doesn't really hurt.
// Only instructions that access I/O will get these, and there won't be that
@@ -25,10 +27,10 @@ bool Jitx86Base::HandleFault(uintptr_t access_address, SContext* ctx)
{
// TODO: do we properly handle off-the-end?
if (access_address >= (uintptr_t)Memory::physical_base &&
- access_address < (uintptr_t)Memory::physical_base + 0x100010000)
+ access_address < (uintptr_t)Memory::physical_base + 0x100010000)
return BackPatch((u32)(access_address - (uintptr_t)Memory::physical_base), ctx);
if (access_address >= (uintptr_t)Memory::logical_base &&
- access_address < (uintptr_t)Memory::logical_base + 0x100010000)
+ access_address < (uintptr_t)Memory::logical_base + 0x100010000)
return BackPatch((u32)(access_address - (uintptr_t)Memory::logical_base), ctx);
return false;
@@ -87,7 +89,7 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
// before faulting (eg: the store+swap was not an atomic op like MOVBE), let's
// swap it back so that the swap can happen again (this double swap isn't ideal but
// only happens the first time we fault).
- if (info.nonAtomicSwapStoreSrc != INVALID_REG)
+ if (info.nonAtomicSwapStoreSrc != Gen::INVALID_REG)
{
u64* ptr = ContextRN(ctx, info.nonAtomicSwapStoreSrc);
switch (info.accessSize << 3)
@@ -122,3 +124,41 @@ bool Jitx86Base::BackPatch(u32 emAddress, SContext* ctx)
return true;
}
+
+void LogGeneratedX86(int size, PPCAnalyst::CodeBuffer* code_buffer, const u8* normalEntry,
+ JitBlock* b)
+{
+ for (int i = 0; i < size; i++)
+ {
+ const PPCAnalyst::CodeOp& op = code_buffer->codebuffer[i];
+ std::string temp = StringFromFormat(
+ "%08x %s", op.address, GekkoDisassembler::Disassemble(op.inst.hex, op.address).c_str());
+ DEBUG_LOG(DYNA_REC, "IR_X86 PPC: %s\n", temp.c_str());
+ }
+
+ disassembler x64disasm;
+ x64disasm.set_syntax_intel();
+
+ u64 disasmPtr = (u64)normalEntry;
+ const u8* end = normalEntry + b->codeSize;
+
+ while ((u8*)disasmPtr < end)
+ {
+ char sptr[1000] = "";
+ disasmPtr += x64disasm.disasm64(disasmPtr, disasmPtr, (u8*)disasmPtr, sptr);
+ DEBUG_LOG(DYNA_REC, "IR_X86 x86: %s", sptr);
+ }
+
+ if (b->codeSize <= 250)
+ {
+ std::stringstream ss;
+ ss << std::hex;
+ for (u8 i = 0; i <= b->codeSize; i++)
+ {
+ ss.width(2);
+ ss.fill('0');
+ ss << (u32) * (normalEntry + i);
+ }
+ DEBUG_LOG(DYNA_REC, "IR_X86 bin: %s\n\n\n", ss.str().c_str());
+ }
+}
diff --git a/Source/Core/Core/PowerPC/Jit64Common/Jit64Base.h b/Source/Core/Core/PowerPC/Jit64Common/Jit64Base.h
new file mode 100644
index 0000000000..8a21f47cdb
--- /dev/null
+++ b/Source/Core/Core/PowerPC/Jit64Common/Jit64Base.h
@@ -0,0 +1,48 @@
+// Copyright 2016 Dolphin Emulator Project
+// Licensed under GPLv2+
+// Refer to the license.txt file included.
+
+#pragma once
+
+#include
+
+#include "Common/CommonTypes.h"
+#include "Common/x64Reg.h"
+#include "Core/PowerPC/Jit64Common/BlockCache.h"
+#include "Core/PowerPC/Jit64Common/Jit64AsmCommon.h"
+#include "Core/PowerPC/Jit64Common/TrampolineCache.h"
+#include "Core/PowerPC/JitCommon/JitBase.h"
+
+namespace PPCAnalyst
+{
+class CodeBuffer;
+}
+
+// The following register assignments are common to Jit64 and Jit64IL:
+// RSCRATCH and RSCRATCH2 are always scratch registers and can be used without
+// limitation.
+#define RSCRATCH RAX
+#define RSCRATCH2 RDX
+// RSCRATCH_EXTRA may be in the allocation order, so it has to be flushed
+// before use.
+#define RSCRATCH_EXTRA RCX
+// RMEM points to the start of emulated memory.
+#define RMEM RBX
+// RPPCSTATE points to ppcState + 0x80. It's offset because we want to be able
+// to address as much as possible in a one-byte offset form.
+#define RPPCSTATE RBP
+
+class Jitx86Base : public JitBase, public QuantizedMemoryRoutines
+{
+protected:
+ bool BackPatch(u32 emAddress, SContext* ctx);
+ JitBlockCache blocks;
+ TrampolineCache trampolines;
+
+public:
+ JitBlockCache* GetBlockCache() override { return &blocks; }
+ bool HandleFault(uintptr_t access_address, SContext* ctx) override;
+};
+
+void LogGeneratedX86(int size, PPCAnalyst::CodeBuffer* code_buffer, const u8* normalEntry,
+ JitBlock* b);
diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp b/Source/Core/Core/PowerPC/Jit64Common/Jit64Util.cpp
similarity index 99%
rename from Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
rename to Source/Core/Core/PowerPC/Jit64Common/Jit64Util.cpp
index 1f44650ef4..9db6e5b919 100644
--- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.cpp
+++ b/Source/Core/Core/PowerPC/Jit64Common/Jit64Util.cpp
@@ -2,7 +2,7 @@
// Licensed under GPLv2+
// Refer to the license.txt file included.
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Common/BitSet.h"
#include "Common/CommonTypes.h"
#include "Common/Intrinsics.h"
@@ -11,7 +11,8 @@
#include "Common/x64Emitter.h"
#include "Core/HW/MMIO.h"
#include "Core/HW/Memmap.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
+#include "Core/PowerPC/Jit64Common/Jit64Base.h"
+#include "Core/PowerPC/Jit64Common/TrampolineCache.h"
#include "Core/PowerPC/PowerPC.h"
using namespace Gen;
@@ -79,7 +80,7 @@ bool EmuCodeBlock::UnsafeLoadToReg(X64Reg reg_value, OpArg opAddress, int access
{
// This method can potentially clobber the address if it shares a register
// with the load target. In this case we can just subtract offset from the
- // register (see JitBackpatch for this implementation).
+ // register (see Jit64Base for this implementation).
offsetAddedToAddress = (reg_value == opAddress.GetSimpleReg());
LEA(32, reg_value, MDisp(opAddress.GetSimpleReg(), offset));
diff --git a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h b/Source/Core/Core/PowerPC/Jit64Common/Jit64Util.h
similarity index 99%
rename from Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
rename to Source/Core/Core/PowerPC/Jit64Common/Jit64Util.h
index 2be1233cc4..6c506d1bf2 100644
--- a/Source/Core/Core/PowerPC/JitCommon/Jit_Util.h
+++ b/Source/Core/Core/PowerPC/Jit64Common/Jit64Util.h
@@ -8,6 +8,7 @@
#include "Common/BitSet.h"
#include "Common/CPUDetect.h"
+#include "Common/CommonTypes.h"
#include "Common/x64Emitter.h"
#include "Core/PowerPC/PowerPC.h"
diff --git a/Source/Core/Core/PowerPC/JitCommon/TrampolineCache.cpp b/Source/Core/Core/PowerPC/Jit64Common/TrampolineCache.cpp
similarity index 91%
rename from Source/Core/Core/PowerPC/JitCommon/TrampolineCache.cpp
rename to Source/Core/Core/PowerPC/Jit64Common/TrampolineCache.cpp
index 79c0a5abee..67a2e4a9e5 100644
--- a/Source/Core/Core/PowerPC/JitCommon/TrampolineCache.cpp
+++ b/Source/Core/Core/PowerPC/Jit64Common/TrampolineCache.cpp
@@ -2,17 +2,18 @@
// Licensed under GPLv2+
// Refer to the license.txt file included.
+#include "Core/PowerPC/Jit64Common/TrampolineCache.h"
+
#include
#include
-#include "Common/CommonFuncs.h"
#include "Common/CommonTypes.h"
#include "Common/JitRegister.h"
-#include "Common/x64ABI.h"
+#include "Common/MsgHandler.h"
#include "Common/x64Emitter.h"
+#include "Core/PowerPC/Jit64Common/Jit64Base.h"
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
#include "Core/PowerPC/JitCommon/JitBase.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
-#include "Core/PowerPC/JitCommon/TrampolineCache.h"
#include "Core/PowerPC/PowerPC.h"
#ifdef _WIN32
diff --git a/Source/Core/Core/PowerPC/JitCommon/TrampolineCache.h b/Source/Core/Core/PowerPC/Jit64Common/TrampolineCache.h
similarity index 81%
rename from Source/Core/Core/PowerPC/JitCommon/TrampolineCache.h
rename to Source/Core/Core/PowerPC/Jit64Common/TrampolineCache.h
index c43668dc8d..7e4cac8b2f 100644
--- a/Source/Core/Core/PowerPC/JitCommon/TrampolineCache.h
+++ b/Source/Core/Core/PowerPC/Jit64Common/TrampolineCache.h
@@ -4,12 +4,8 @@
#pragma once
-#include "Common/BitSet.h"
#include "Common/CommonTypes.h"
-#include "Common/x64Emitter.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
-
-struct InstructionInfo;
+#include "Core/PowerPC/Jit64Common/Jit64Util.h"
// We need at least this many bytes for backpatching.
const int BACKPATCH_SIZE = 5;
diff --git a/Source/Core/Core/PowerPC/Jit64IL/JitIL.h b/Source/Core/Core/PowerPC/Jit64IL/JitIL.h
index 90f0f95a49..5dd943aa02 100644
--- a/Source/Core/Core/PowerPC/Jit64IL/JitIL.h
+++ b/Source/Core/Core/PowerPC/Jit64IL/JitIL.h
@@ -21,7 +21,6 @@
#include "Common/x64Emitter.h"
#include "Core/PowerPC/Gekko.h"
#include "Core/PowerPC/Jit64/JitAsm.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Core/PowerPC/JitCommon/JitCache.h"
#include "Core/PowerPC/JitILCommon/JitILBase.h"
#include "Core/PowerPC/PPCAnalyst.h"
diff --git a/Source/Core/Core/PowerPC/JitArm64/Jit.h b/Source/Core/Core/PowerPC/JitArm64/Jit.h
index 3393d12b0d..bb8482aece 100644
--- a/Source/Core/Core/PowerPC/JitArm64/Jit.h
+++ b/Source/Core/Core/PowerPC/JitArm64/Jit.h
@@ -17,6 +17,9 @@
#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Core/PowerPC/PPCAnalyst.h"
+constexpr int CODE_SIZE = 1024 * 1024 * 32;
+constexpr int FARCODE_SIZE_MMU = 1024 * 1024 * 48;
+
class JitArm64 : public JitBase, public Arm64Gen::ARM64CodeBlock, public CommonAsmRoutinesBase
{
public:
diff --git a/Source/Core/Core/PowerPC/JitCommon/JitBase.cpp b/Source/Core/Core/PowerPC/JitCommon/JitBase.cpp
index 231087bf21..2b0e98aaed 100644
--- a/Source/Core/Core/PowerPC/JitCommon/JitBase.cpp
+++ b/Source/Core/Core/PowerPC/JitCommon/JitBase.cpp
@@ -2,18 +2,11 @@
// Licensed under GPLv2+
// Refer to the license.txt file included.
-#include
-#include
-
-#include "disasm.h"
+#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Common/CommonTypes.h"
-#include "Common/GekkoDisassembler.h"
-#include "Common/Logging/Log.h"
-#include "Common/StringUtil.h"
#include "Core/ConfigManager.h"
#include "Core/HW/CPU.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
#include "Core/PowerPC/PPCAnalyst.h"
#include "Core/PowerPC/PowerPC.h"
@@ -30,44 +23,6 @@ u32 Helper_Mask(u8 mb, u8 me)
return mb > me ? ~mask : mask;
}
-void LogGeneratedX86(int size, PPCAnalyst::CodeBuffer* code_buffer, const u8* normalEntry,
- JitBlock* b)
-{
- for (int i = 0; i < size; i++)
- {
- const PPCAnalyst::CodeOp& op = code_buffer->codebuffer[i];
- std::string temp = StringFromFormat(
- "%08x %s", op.address, GekkoDisassembler::Disassemble(op.inst.hex, op.address).c_str());
- DEBUG_LOG(DYNA_REC, "IR_X86 PPC: %s\n", temp.c_str());
- }
-
- disassembler x64disasm;
- x64disasm.set_syntax_intel();
-
- u64 disasmPtr = (u64)normalEntry;
- const u8* end = normalEntry + b->codeSize;
-
- while ((u8*)disasmPtr < end)
- {
- char sptr[1000] = "";
- disasmPtr += x64disasm.disasm64(disasmPtr, disasmPtr, (u8*)disasmPtr, sptr);
- DEBUG_LOG(DYNA_REC, "IR_X86 x86: %s", sptr);
- }
-
- if (b->codeSize <= 250)
- {
- std::stringstream ss;
- ss << std::hex;
- for (u8 i = 0; i <= b->codeSize; i++)
- {
- ss.width(2);
- ss.fill('0');
- ss << (u32) * (normalEntry + i);
- }
- DEBUG_LOG(DYNA_REC, "IR_X86 bin: %s\n\n\n", ss.str().c_str());
- }
-}
-
bool JitBase::MergeAllowedNextInstructions(int count)
{
if (CPU::GetState() == CPU::CPU_STEPPING || js.instructionsLeft < count)
diff --git a/Source/Core/Core/PowerPC/JitCommon/JitBase.h b/Source/Core/Core/PowerPC/JitCommon/JitBase.h
index 611395e3b8..bd7bf2c2ae 100644
--- a/Source/Core/Core/PowerPC/JitCommon/JitBase.h
+++ b/Source/Core/Core/PowerPC/JitCommon/JitBase.h
@@ -16,27 +16,10 @@
#include "Core/ConfigManager.h"
#include "Core/MachineContext.h"
#include "Core/PowerPC/CPUCoreBase.h"
-#include "Core/PowerPC/Jit64Common/Jit64AsmCommon.h"
+#include "Core/PowerPC/JitCommon/JitAsmCommon.h"
#include "Core/PowerPC/JitCommon/JitCache.h"
-#include "Core/PowerPC/JitCommon/Jit_Util.h"
-#include "Core/PowerPC/JitCommon/TrampolineCache.h"
#include "Core/PowerPC/PPCAnalyst.h"
-// TODO: find a better place for x86-specific stuff
-// The following register assignments are common to Jit64 and Jit64IL:
-// RSCRATCH and RSCRATCH2 are always scratch registers and can be used without
-// limitation.
-#define RSCRATCH RAX
-#define RSCRATCH2 RDX
-// RSCRATCH_EXTRA may be in the allocation order, so it has to be flushed
-// before use.
-#define RSCRATCH_EXTRA RCX
-// RMEM points to the start of emulated memory.
-#define RMEM RBX
-// RPPCSTATE points to ppcState + 0x80. It's offset because we want to be able
-// to address as much as possible in a one-byte offset form.
-#define RPPCSTATE RBP
-
// Use these to control the instruction selection
// #define INSTRUCTION_START FallBackToInterpreter(inst); return;
// #define INSTRUCTION_START PPCTables::CountInstruction(inst);
@@ -142,21 +125,7 @@ public:
virtual bool HandleStackFault() { return false; }
};
-class Jitx86Base : public JitBase, public QuantizedMemoryRoutines
-{
-protected:
- bool BackPatch(u32 emAddress, SContext* ctx);
- JitBlockCache blocks;
- TrampolineCache trampolines;
-
-public:
- JitBlockCache* GetBlockCache() override { return &blocks; }
- bool HandleFault(uintptr_t access_address, SContext* ctx) override;
-};
-
void Jit(u32 em_address);
// Merged routines that should be moved somewhere better
u32 Helper_Mask(u8 mb, u8 me);
-void LogGeneratedX86(int size, PPCAnalyst::CodeBuffer* code_buffer, const u8* normalEntry,
- JitBlock* b);
diff --git a/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp b/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp
index 1d601b3a64..29fd7f2769 100644
--- a/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp
+++ b/Source/Core/Core/PowerPC/JitCommon/JitCache.cpp
@@ -352,34 +352,3 @@ void JitBaseBlockCache::InvalidateICache(u32 address, const u32 length, bool for
}
}
}
-
-void JitBlockCache::WriteLinkBlock(const JitBlock::LinkData& source, const JitBlock* dest)
-{
- u8* location = source.exitPtrs;
- const u8* address = dest ? dest->checkedEntry : jit->GetAsmRoutines()->dispatcher;
- XEmitter emit(location);
- if (*location == 0xE8)
- {
- emit.CALL(address);
- }
- else
- {
- // If we're going to link with the next block, there is no need
- // to emit JMP. So just NOP out the gap to the next block.
- // Support up to 3 additional bytes because of alignment.
- s64 offset = address - emit.GetCodePtr();
- if (offset > 0 && offset <= 5 + 3)
- emit.NOP(offset);
- else
- emit.JMP(address, true);
- }
-}
-
-void JitBlockCache::WriteDestroyBlock(const JitBlock& block)
-{
- // Only clear the entry points as we might still be within this block.
- XEmitter emit((u8*)block.checkedEntry);
- emit.INT3();
- XEmitter emit2((u8*)block.normalEntry);
- emit2.INT3();
-}
diff --git a/Source/Core/Core/PowerPC/JitCommon/JitCache.h b/Source/Core/Core/PowerPC/JitCommon/JitCache.h
index f3a3c8b4a3..0694400177 100644
--- a/Source/Core/Core/PowerPC/JitCommon/JitCache.h
+++ b/Source/Core/Core/PowerPC/JitCommon/JitCache.h
@@ -186,11 +186,3 @@ public:
u32* GetBlockBitSet() const { return valid_block.m_valid_block.get(); }
};
-
-// x86 BlockCache
-class JitBlockCache : public JitBaseBlockCache
-{
-private:
- void WriteLinkBlock(const JitBlock::LinkData& source, const JitBlock* dest) override;
- void WriteDestroyBlock(const JitBlock& block) override;
-};
diff --git a/Source/Core/Core/PowerPC/JitILCommon/JitILBase.h b/Source/Core/Core/PowerPC/JitILCommon/JitILBase.h
index fec6631a40..228ccd269d 100644
--- a/Source/Core/Core/PowerPC/JitILCommon/JitILBase.h
+++ b/Source/Core/Core/PowerPC/JitILCommon/JitILBase.h
@@ -6,7 +6,7 @@
#include "Common/CommonTypes.h"
#include "Core/PowerPC/Gekko.h"
-#include "Core/PowerPC/JitCommon/JitBase.h"
+#include "Core/PowerPC/Jit64Common/Jit64Base.h"
#include "Core/PowerPC/JitILCommon/IR.h"
#include "Core/PowerPC/PPCAnalyst.h"