From 25929789c1e80d7a22d6acdb14082bc44e4fb0e9 Mon Sep 17 00:00:00 2001 From: TellowKrinkle Date: Sun, 12 Jun 2022 21:31:16 -0500 Subject: [PATCH] VideoCommon: Don't pass State by inout Spirv-cross's MSL codegen makes the amazing choice of compiling calls to inout functions as `State temp = s; call_function(temp); s = temp`. Not all Metal backends handle this mess well. In particular, it causes register spills on Intel, losing about 5% in performance. --- Source/Core/VideoCommon/UberShaderPixel.cpp | 23 +++++++-------------- 1 file changed, 7 insertions(+), 16 deletions(-) diff --git a/Source/Core/VideoCommon/UberShaderPixel.cpp b/Source/Core/VideoCommon/UberShaderPixel.cpp index 161f40146a..29d52655b2 100644 --- a/Source/Core/VideoCommon/UberShaderPixel.cpp +++ b/Source/Core/VideoCommon/UberShaderPixel.cpp @@ -502,14 +502,6 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config, "\n" "int4 getTevReg(in State s, uint index) {{\n"); WriteSwitch(out, api_type, "index", tev_regs_lookup_table, 2, false); - out.Write("}}\n" - "\n" - "void setRegColor(inout State s, uint index, int3 color) {{\n"); - WriteSwitch(out, api_type, "index", tev_c_set_table, 2, true); - out.Write("}}\n" - "\n" - "void setRegAlpha(inout State s, uint index, int alpha) {{\n"); - WriteSwitch(out, api_type, "index", tev_a_set_table, 2, true); out.Write("}}\n" "\n"); @@ -861,9 +853,9 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config, " else\n" " color = clamp(color, -1024, 1023);\n" "\n" - " // Write result to the correct input register of the next stage\n" - " setRegColor(s, color_dest, color);\n" - "\n"); + " // Write result to the correct input register of the next stage\n"); + WriteSwitch(out, api_type, "color_dest", tev_c_set_table, 6, true); + out.Write("\n"); // Alpha combiner out.Write(" // Alpha Combiner\n"); @@ -927,11 +919,10 @@ ShaderCode GenPixelShader(APIType api_type, const ShaderHostConfig& host_config, " else\n" " alpha = clamp(alpha, -1024, 1023);\n" "\n" - " // Write result to the correct input register of the next stage\n" - " setRegAlpha(s, alpha_dest, alpha);\n" - " }}\n"); - - out.Write(" }} // Main TEV loop\n" + " // Write result to the correct input register of the next stage\n"); + WriteSwitch(out, api_type, "alpha_dest", tev_a_set_table, 6, true); + out.Write(" }}\n" + " }} // Main TEV loop\n" "\n"); // Select the output color and alpha registers from the last stage.