mirror of
https://github.com/bluekitchen/btstack.git
synced 2025-02-04 15:39:59 +00:00
508 lines
13 KiB
C
Executable File
508 lines
13 KiB
C
Executable File
/*
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******************************************************************************/
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/* DriverLib Includes */
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#include "driverlib.h"
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/* Standard Includes */
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <stdio.h>
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#include "btstack_config.h"
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#include "btstack_chipset_cc256x.h"
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#include "btstack_defines.h"
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#include "btstack_debug.h"
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#include "btstack_memory.h"
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#include "btstack_tlv.h"
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#include "btstack_run_loop.h"
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#include "btstack_run_loop_embedded.h"
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#include "hci_dump.h"
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#include "btstack_tlv_flash_bank.h"
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#include "hal_flash_bank_msp432.h"
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#include "classic/btstack_link_key_db_tlv.h"
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#include "ble/le_device_db_tlv.h"
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static hci_transport_config_uart_t config = {
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HCI_TRANSPORT_CONFIG_UART,
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115200,
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460800, // main baudrate
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1, // flow control
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NULL,
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};
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static hal_flash_bank_msp432_t hal_flash_bank_context;
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static btstack_tlv_flash_bank_t btstack_tlv_flash_bank_context;
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#ifndef ENABLE_SEGGER_RTT
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/**
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* Use USART_CONSOLE as a console.
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* This is a syscall for newlib
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* @param file
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* @param ptr
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* @param len
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* @return
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*/
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#include <stdio.h>
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#include <unistd.h>
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#include <errno.h>
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int _write(int file, char *ptr, int len);
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int _write(int file, char *ptr, int len){
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#if 1
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uint8_t cr = '\r';
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int i;
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if (file == STDOUT_FILENO || file == STDERR_FILENO) {
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for (i = 0; i < len; i++) {
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if (ptr[i] == '\n') {
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HAL_UART_Transmit( &huart2, &cr, 1, HAL_MAX_DELAY );
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}
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HAL_UART_Transmit( &huart2, (uint8_t *) &ptr[i], 1, HAL_MAX_DELAY );
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}
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return i;
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}
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errno = EIO;
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return -1;
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#else
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return len;
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#endif
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}
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#endif
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#if 1
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int _read(int file, char * ptr, int len){
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UNUSED(file);
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UNUSED(ptr);
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UNUSED(len);
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return -1;
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}
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int _close(int file){
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UNUSED(file);
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return -1;
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}
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int _isatty(int file){
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UNUSED(file);
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return -1;
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}
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int _lseek(int file){
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UNUSED(file);
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return -1;
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}
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int _fstat(int file){
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UNUSED(file);
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return -1;
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}
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void * _sbrk(int incr){
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UNUSED(incr);
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return NULL;
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}
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#endif
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#if 1
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// with current Makefile, compiler, and linker flags, printf will call malloc -> sbrk
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// for now, use SEGGER's printf
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#include "SEGGER_RTT.h"
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int SEGGER_RTT_vprintf(unsigned BufferIndex, const char * sFormat, va_list * pParamList);
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int printf(const char * format, ...){
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va_list argptr;
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va_start(argptr, format);
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SEGGER_RTT_vprintf(0, format, &argptr);
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va_end(argptr);
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}
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int vprintf(const char * format, va_list argptr){
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SEGGER_RTT_vprintf(0, format, &argptr);
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}
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#endif
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// hal_cpu.h implementation
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#include "hal_cpu.h"
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void hal_cpu_disable_irqs(void){
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__disable_irq();
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}
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void hal_cpu_enable_irqs(void){
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__enable_irq();
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}
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void hal_cpu_enable_irqs_and_sleep(void){
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__enable_irq();
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__asm__("wfe"); // go to sleep if event flag isn't set. if set, just clear it. IRQs set event flag
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}
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// HAL TIME Implementation
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static volatile uint32_t systick;
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void SysTick_Handler(void)
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{
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systick++;
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}
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static void init_systick(void){
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// Configuring SysTick to trigger every ms (48 Mhz / 48000 = 1 ms)
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MAP_SysTick_enableModule();
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MAP_SysTick_setPeriod(48000);
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// MAP_Interrupt_enableSleepOnIsrExit();
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MAP_SysTick_enableInterrupt();
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}
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static void delay_ms(uint32_t ms){
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uint32_t delay_until = systick + ms;
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while (systick < delay_until);
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}
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uint32_t hal_time_ms(void){
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return systick;
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}
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// HAL UART DMA
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// rx state
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static uint16_t bytes_to_read = 0;
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static uint8_t * rx_buffer_ptr = 0;
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// tx state
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static uint16_t bytes_to_write = 0;
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static uint8_t * tx_buffer_ptr = 0;
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// handlers
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static void (*rx_done_handler)(void);
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static void (*tx_done_handler)(void);
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/*
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Pin 3: BTTX=UCA2RXD-P3.2
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Pin 4: BTRX=UCA2TXD-P3.3
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Pin 19: BTSHUTDN=GPIO-P2.5
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Pin 36: BTRTS=GPIO-P6.6
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Pin 37: BTCTS=GPIO-P5.6
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*/
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/* UART Configuration Parameter. These are the configuration parameters to
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* make the eUSCI A UART module to operate with a 115200 baud rate. These
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* values were calculated using the online calculator that TI provides
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* at:
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* http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSP430BaudRateConverter/index.html
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*/
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static eUSCI_UART_Config uartConfig =
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{
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EUSCI_A_UART_CLOCKSOURCE_SMCLK, // SMCLK Clock Source
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13, // BRDIV = 13
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0, // UCxBRF = 0
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37, // UCxBRS = 37
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EUSCI_A_UART_NO_PARITY, // No Parity
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EUSCI_A_UART_LSB_FIRST, // MSB First
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EUSCI_A_UART_ONE_STOP_BIT, // One stop bit
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EUSCI_A_UART_MODE, // UART mode
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EUSCI_A_UART_OVERSAMPLING_BAUDRATE_GENERATION // Oversampling
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};
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// table
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static struct baudrate_config {
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uint32_t baudrate;
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uint8_t clock_prescalar;
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uint8_t first_mod_reg;
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uint8_t second_mod_reg;
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uint8_t oversampling;
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} baudrate_configs[] = {
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#if 0
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// Config for 24 Mhz
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{ 115200, 13, 0, 37, 1},
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{ 230400, 6, 8, 32, 1},
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{ 460800, 3, 4, 2, 1},
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{ 921600, 1, 10, 0, 1},
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{ 1000000, 1, 8, 0, 1},
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{ 2000000, 12, 0, 0, 0},
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{ 3000000, 8, 0, 0, 0},
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{ 3000000, 6, 0, 0, 0},
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#else
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// Config for 48 Mhz
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{ 115200, 26, 1, 111, 1},
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{ 230400, 13, 0, 37, 1},
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{ 460800, 6, 8, 32, 1},
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{ 921600, 3, 4, 2, 1},
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{ 1000000, 3, 0, 0, 1},
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{ 2000000, 1, 8, 0, 1},
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{ 3000000, 16, 0, 0, 0},
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{ 3000000, 12, 0, 0, 0},
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#endif
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};
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// copy from gpio.c
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#define OFS_LIB_PAOUT ((uint32_t)&P1->OUT - (uint32_t)P1)
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static uint32_t GPIO_PORT_TO_BASE[] =
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{ 0x00,
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(uint32_t)P1,
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(uint32_t)P1+1,
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(uint32_t)P3,
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(uint32_t)P3+1,
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(uint32_t)P5,
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(uint32_t)P5+1,
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(uint32_t)P7,
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(uint32_t)P7+1,
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(uint32_t)P9,
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(uint32_t)P9+1,
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(uint32_t)PJ
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};
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static inline void hal_uart_dma_enable_rx(void){
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MAP_GPIO_setOutputLowOnPin(GPIO_PORT_P5, GPIO_PIN6);
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}
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static inline void hal_uart_dma_disable_rx(void){
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MAP_GPIO_setOutputHighOnPin(GPIO_PORT_P5, GPIO_PIN6);
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}
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// tries to optimize path to RTS high
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void EUSCIA2_IRQHandler(void){
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// raise RTS prophylactically
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// GPIO_setOutputHighOnPin(GPIO_PORT_P5, GPIO_PIN6);
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uint32_t baseAddress = GPIO_PORT_TO_BASE[5];
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HWREG16(baseAddress + OFS_LIB_PAOUT) |= GPIO_PIN6;
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// regular IRQ handler
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uint_fast8_t status = MAP_UART_getEnabledInterruptStatus(EUSCI_A2_BASE);
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MAP_UART_clearInterruptFlag(EUSCI_A2_BASE, status);
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// RX Complete
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if (status & EUSCI_A_UART_RECEIVE_INTERRUPT_FLAG){
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if (bytes_to_read) {
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*rx_buffer_ptr = UART_receiveData(EUSCI_A2_BASE);
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++rx_buffer_ptr;
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--bytes_to_read;
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}
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if (bytes_to_read == 0){
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// disable RXIE
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UART_disableInterrupt(EUSCI_A2_BASE, EUSCI_A_UART_RECEIVE_INTERRUPT);
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// done
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(*rx_done_handler)();
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}
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}
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// TX IDLE
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if (status & EUSCI_A_UART_TRANSMIT_INTERRUPT_FLAG){
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if (bytes_to_write){
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// start TX
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MAP_UART_transmitData(EUSCI_A2_BASE, *tx_buffer_ptr);
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++tx_buffer_ptr;
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--bytes_to_write;
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}
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if (bytes_to_write == 0){
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// disable TXIE interrupt
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UART_disableInterrupt(EUSCI_A2_BASE, EUSCI_A_UART_TRANSMIT_INTERRUPT);
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// done
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(*tx_done_handler)();
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}
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}
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// lower RTS again if waiting for data
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if (bytes_to_read) {
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hal_uart_dma_enable_rx();
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}
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}
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void hal_uart_dma_init(void){
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// nShutdown
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MAP_GPIO_setAsOutputPin(GPIO_PORT_P2, GPIO_PIN5);
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// BT-CTS
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MAP_GPIO_setAsOutputPin(GPIO_PORT_P5, GPIO_PIN6);
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// BT-RTS
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MAP_GPIO_setAsInputPinWithPullDownResistor(GPIO_PORT_P6, GPIO_PIN6);
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// UART pins
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MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P3,
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GPIO_PIN2 | GPIO_PIN3, GPIO_PRIMARY_MODULE_FUNCTION);
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// configure UART
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/* Configuring UART Module */
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MAP_UART_initModule(EUSCI_A2_BASE, &uartConfig);
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/* Enable UART module */
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MAP_UART_enableModule(EUSCI_A2_BASE);
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/* Enable UART interrupts in general */
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Interrupt_enableInterrupt(INT_EUSCIA2);
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// power cycle
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MAP_GPIO_setOutputLowOnPin(GPIO_PORT_P2, GPIO_PIN5);
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delay_ms(10);
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MAP_GPIO_setOutputHighOnPin(GPIO_PORT_P2, GPIO_PIN5);
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delay_ms(200);
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}
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int hal_uart_dma_set_baud(uint32_t baud){
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int index = -1;
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int i;
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for (i=0;i<sizeof(baudrate_configs)/sizeof(struct baudrate_config);i++){
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if (baudrate_configs[i].baudrate == baud){
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index = i;
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}
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}
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if (index < 0) return -1;
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MAP_UART_disableModule(EUSCI_A2_BASE);
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uartConfig.clockPrescalar = baudrate_configs[index].clock_prescalar;
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uartConfig.firstModReg = baudrate_configs[index].first_mod_reg;
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uartConfig.secondModReg = baudrate_configs[index].second_mod_reg;
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uartConfig.overSampling = baudrate_configs[index].oversampling;
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MAP_UART_initModule(EUSCI_A2_BASE, &uartConfig);
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MAP_UART_enableModule(EUSCI_A2_BASE);
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UNUSED(baud);
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return 0;
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}
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void hal_uart_dma_set_sleep(uint8_t sleep){
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UNUSED(sleep);
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}
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void hal_uart_dma_set_csr_irq_handler( void (*the_irq_handler)(void)){
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UNUSED(the_irq_handler);
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#ifdef HAVE_CTS_IRQ
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#endif
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}
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void hal_uart_dma_set_block_received( void (*the_block_handler)(void)){
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rx_done_handler = the_block_handler;
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}
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void hal_uart_dma_set_block_sent( void (*the_block_handler)(void)){
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tx_done_handler = the_block_handler;
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}
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void hal_uart_dma_send_block(const uint8_t * data, uint16_t len){
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tx_buffer_ptr = (uint8_t *) data;
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bytes_to_write = len;
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// start sending
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if (!bytes_to_write) return;
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// enable TX interrupt -> starts transmission
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UART_enableInterrupt(EUSCI_A2_BASE, EUSCI_A_UART_TRANSMIT_INTERRUPT);
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}
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// int used to indicate a request for more new data
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void hal_uart_dma_receive_block(uint8_t *buffer, uint16_t len){
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rx_buffer_ptr = buffer;
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bytes_to_read = len;
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UART_enableInterrupt(EUSCI_A2_BASE, EUSCI_A_UART_RECEIVE_INTERRUPT);
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hal_uart_dma_enable_rx(); // RTS low
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}
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// End of HAL UART DMA
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#include "SEGGER_RTT.h"
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// HAL FLASH MSP432 Configuration - use two last 4kB sectors
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#define HAL_FLASH_BANK_SIZE 4096
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#define HAL_FLASH_BANK_0_SECTOR FLASH_SECTOR30
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#define HAL_FLASH_BANK_1_SECTOR FLASH_SECTOR31
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#define HAL_FLASH_BANK_0_ADDR 0x3E000
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#define HAL_FLASH_BANK_1_ADDR 0x3F000
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int btstack_main(const int argc, const char * argvp[]);
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int main(void)
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{
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/* Halting the Watchdog */
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MAP_WDT_A_holdTimer();
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/* Setting our MCLK to 48MHz - directly setting it in system_msp432p401r didn't work */
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MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);
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FlashCtl_setWaitState(FLASH_BANK0, 2);
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FlashCtl_setWaitState(FLASH_BANK1, 2);
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MAP_CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_48);
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init_systick();
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// start with BTstack init - especially configure HCI Transport
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btstack_memory_init();
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btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
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hci_dump_open( NULL, HCI_DUMP_STDOUT );
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// init HCI
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hci_init(hci_transport_h4_instance(btstack_uart_block_embedded_instance()), (void*) &config);
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hci_set_chipset(btstack_chipset_cc256x_instance());
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// setup TLV Flash Sector implementation
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const hal_flash_bank_t * hal_flash_bank_impl = hal_flash_bank_msp432_init_instance(
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&hal_flash_bank_context,
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HAL_FLASH_BANK_SIZE,
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HAL_FLASH_BANK_0_SECTOR,
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HAL_FLASH_BANK_1_SECTOR,
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HAL_FLASH_BANK_0_ADDR,
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HAL_FLASH_BANK_1_ADDR);
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const btstack_tlv_t * btstack_tlv_impl = btstack_tlv_flash_bank_init_instance(
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&btstack_tlv_flash_bank_context,
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hal_flash_bank_impl,
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&hal_flash_bank_context);
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// setup global tlv
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btstack_tlv_set_instance(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
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// setup Link Key DB using TLV
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const btstack_link_key_db_t * btstack_link_key_db = btstack_link_key_db_tlv_get_instance(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
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hci_set_link_key_db(btstack_link_key_db);
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// setup LE Device DB using TLV
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le_device_db_tlv_configure(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
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#if 0
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// inform about BTstack state
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hci_event_callback_registration.callback = &packet_handler;
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hci_add_event_handler(&hci_event_callback_registration);
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#endif
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// hand over to btstack embedded code
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btstack_main(0, NULL);
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hci_power_control(HCI_POWER_ON);
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// go
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btstack_run_loop_execute();
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#if 0
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tx_done_handler = &tc_callback;
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rx_done_handler = &rc_callback;
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while (1){
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// depends on systick
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hal_uart_dma_init();
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w4_tc = 1;
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w4_rc = 1;
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memset(rx_buffer, 0, sizeof(rx_buffer));
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hal_uart_dma_receive_block(&rx_buffer[0], 7);
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hal_uart_dma_send_block(hci_reset, sizeof(hci_reset));
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while (w4_tc);
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while (w4_rc);
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delay_ms(10);
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}
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#endif
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}
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