Matthias Ringwald e52893ef8a ports: configure 4 SDP records for a2dp_source_demo

2020-10-05 12:42:39 +02:00

..

.settings

renesas-tb-s1ja: initial port

2020-02-24 17:03:52 +01:00

script

renesas-tb-s1ja: initial port

2020-02-24 17:03:52 +01:00

src

ports: configure 4 SDP records for a2dp_source_demo

2020-10-05 12:42:39 +02:00

synergy

renesas-tb-s1ja: implement hal_flash_bank_synergy

2020-02-25 14:04:31 +01:00

synergy_cfg/ssp_cfg

renesas-tb-s1ja: implement hal_flash_bank_synergy

2020-02-25 13:06:20 +01:00

.cproject

renesas-tb-s1ja: disable HCI dump, fix .cproject, disable a2dp/hsp/hfp/audio demos, add to main readme

2020-04-20 12:23:49 +02:00

.project

renesas-tb-s1ja: initial port

2020-02-24 17:03:52 +01:00

btstack_example Debug.jlink

renesas-tb-s1ja: update config, use 2 mbps, exclude unused files, update create_example.py

2020-04-17 09:53:50 +02:00

btstack_example Debug.launch

renesas-tb-s1ja: update config, use 2 mbps, exclude unused files, update create_example.py

2020-04-17 09:53:50 +02:00

btstack_example.jdebug

renesas-tb-s1ja: update config, use 2 mbps, exclude unused files, update create_example.py

2020-04-17 09:53:50 +02:00

btstack_port.jdebug.user

renesas-tb-s1ja: initial port

2020-02-24 17:03:52 +01:00

configuration.xml

renesas-tb-s1ja: implement hal_flash_bank_synergy

2020-02-25 14:04:31 +01:00

R7FS1JA783A01CFM.pincfg

renesas-tb-s1ja: initial port

2020-02-24 17:03:52 +01:00

synergy_cfg.txt

renesas-tb-s1ja: implement hal_flash_bank_synergy

2020-02-25 14:04:31 +01:00

TB_S1JA.pincfg

renesas-tb-s1ja: implement hal_flash_bank_synergy

2020-02-25 14:04:31 +01:00