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262 lines
13 KiB
C
262 lines
13 KiB
C
/*
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* -------------------------------------------
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* MSP432 DriverLib - v3_10_00_09
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* -------------------------------------------
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*
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* --COPYRIGHT--,BSD,BSD
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* Copyright (c) 2014, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* --/COPYRIGHT--*/
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//*****************************************************************************
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//
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// Copyright (C) 2012 - 2015 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// MSP432 Family Interrupt Vector Table for GCC
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//
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//****************************************************************************
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#include <stdint.h>
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/* Forward declaration of the default fault handlers. */
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void resetISR(void);
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static void nmiISR(void);
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static void faultISR(void);
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static void defaultISR(void);
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#ifndef HWREG
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#define HWREG(x) (*((volatile uint32_t *)(x)))
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#endif
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/* system initialization funtion */
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extern void SystemInit(void);
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/* Entry point for the application. */
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extern int main(void);
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/* External declarations for the interrupt handlers used by the application. */
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/* To be added by the user */
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extern void EUSCIA2_IRQHandler(void);
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extern void DMA_INT1_IRQHandler(void);
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extern void DMA_INT2_IRQHandler(void);
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/* To be added by the user */
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extern void SysTick_Handler(void);
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/* Interrupt vector table. Note that the proper constructs must be placed on this to */
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/* ensure that it ends up at physical address 0x0000.0000 or at the start of */
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/* the program if located at a start address other than 0. */
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void (* const interruptVectors[])(void) __attribute__ ((section (".intvecs"))) =
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{
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(void (*)(void))((uint32_t)0x20010000),
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/* The initial stack pointer */
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resetISR, /* The reset handler */
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nmiISR, /* The NMI handler */
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faultISR, /* The hard fault handler */
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defaultISR, /* The MPU fault handler */
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defaultISR, /* The bus fault handler */
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defaultISR, /* The usage fault handler */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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0, /* Reserved */
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defaultISR, /* SVCall handler */
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defaultISR, /* Debug monitor handler */
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0, /* Reserved */
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defaultISR, /* The PendSV handler */
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SysTick_Handler, /* The SysTick handler */
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defaultISR, /* PSS ISR */
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defaultISR, /* CS ISR */
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defaultISR, /* PCM ISR */
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defaultISR, /* WDT ISR */
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defaultISR, /* FPU ISR */
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defaultISR, /* FLCTL ISR */
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defaultISR, /* COMP0 ISR */
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defaultISR, /* COMP1 ISR */
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defaultISR, /* TA0_0 ISR */
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defaultISR, /* TA0_N ISR */
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defaultISR, /* TA1_0 ISR */
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defaultISR, /* TA1_N ISR */
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defaultISR, /* TA2_0 ISR */
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defaultISR, /* TA2_N ISR */
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defaultISR, /* TA3_0 ISR */
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defaultISR, /* TA3_N ISR */
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defaultISR, /* EUSCIA0 ISR */
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defaultISR, /* EUSCIA1 ISR */
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defaultISR, /* EUSCIA2 ISR */
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defaultISR, /* EUSCIA3 ISR */
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defaultISR, /* EUSCIB0 ISR */
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defaultISR, /* EUSCIB1 ISR */
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defaultISR, /* EUSCIB2 ISR */
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defaultISR, /* EUSCIB3 ISR */
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defaultISR, /* ADC14 ISR */
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defaultISR, /* T32_INT1 ISR */
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defaultISR, /* T32_INT2 ISR */
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defaultISR, /* T32_INTC ISR */
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defaultISR, /* AES ISR */
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defaultISR, /* RTC ISR */
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defaultISR, /* DMA_ERR ISR */
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defaultISR, /* DMA_INT3 ISR */
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DMA_INT2_IRQHandler, /* DMA_INT2 ISR */
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DMA_INT1_IRQHandler, /* DMA_INT1 ISR */
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defaultISR, /* DMA_INT0 ISR */
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defaultISR, /* PORT1 ISR */
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defaultISR, /* PORT2 ISR */
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defaultISR, /* PORT3 ISR */
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defaultISR, /* PORT4 ISR */
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defaultISR, /* PORT5 ISR */
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defaultISR, /* PORT6 ISR */
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defaultISR, /* Reserved 41 */
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defaultISR, /* Reserved 42 */
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defaultISR, /* Reserved 43 */
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defaultISR, /* Reserved 44 */
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defaultISR, /* Reserved 45 */
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defaultISR, /* Reserved 46 */
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defaultISR, /* Reserved 47 */
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defaultISR, /* Reserved 48 */
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defaultISR, /* Reserved 49 */
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defaultISR, /* Reserved 50 */
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defaultISR, /* Reserved 51 */
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defaultISR, /* Reserved 52 */
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defaultISR, /* Reserved 53 */
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defaultISR, /* Reserved 54 */
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defaultISR, /* Reserved 55 */
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defaultISR, /* Reserved 56 */
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defaultISR, /* Reserved 57 */
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defaultISR, /* Reserved 58 */
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defaultISR, /* Reserved 59 */
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defaultISR, /* Reserved 60 */
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defaultISR, /* Reserved 61 */
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defaultISR, /* Reserved 62 */
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defaultISR /* Reserved 63 */
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};
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/* This is the code that gets called when the processor first starts execution */
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/* following a reset event. Only the absolutely necessary set is performed, */
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/* after which the application supplied entry() routine is called. Any fancy */
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/* actions (such as making decisions based on the reset cause register, and */
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/* resetting the bits in that register) are left solely in the hands of the */
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/* application. */
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extern uint32_t __data_load__;
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extern uint32_t __data_start__;
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extern uint32_t __data_end__;
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void resetISR(void)
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{
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/* Copy the data segment initializers from flash to SRAM. */
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uint32_t *pui32Src, *pui32Dest;
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pui32Src = &__data_load__;
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for(pui32Dest = &__data_start__; pui32Dest < &__data_end__; )
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{
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*pui32Dest++ = *pui32Src++;
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}
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/* Zero fill the bss segment. */
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__asm(" ldr r0, =__bss_start__\n"
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" ldr r1, =__bss_end__\n"
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" mov r2, #0\n"
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" .thumb_func\n"
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"zero_loop:\n"
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" cmp r0, r1\n"
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" it lt\n"
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" strlt r2, [r0], #4\n"
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" blt zero_loop");
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/* Call system initialization routine */
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SystemInit();
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/* Call the application's entry point. */
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main();
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}
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/* This is the code that gets called when the processor receives a NMI. This */
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/* simply enters an infinite loop, preserving the system state for examination */
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/* by a debugger. */
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static void nmiISR(void)
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{
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/* Enter an infinite loop. */
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while(1)
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{
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}
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}
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/* This is the code that gets called when the processor receives a fault */
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/* interrupt. This simply enters an infinite loop, preserving the system state */
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/* for examination by a debugger. */
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static void faultISR(void)
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{
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/* Enter an infinite loop. */
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while(1)
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{
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}
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}
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/* This is the code that gets called when the processor receives an unexpected */
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/* interrupt. This simply enters an infinite loop, preserving the system state */
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/* for examination by a debugger. */
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static void defaultISR(void)
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{
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/* Enter an infinite loop. */
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while(1)
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{
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}
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}
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