mirror of
https://github.com/bluekitchen/btstack.git
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294 lines
8.9 KiB
C
294 lines
8.9 KiB
C
/*
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* Copyright (C) 2014 BlueKitchen GmbH
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the copyright holders nor the names of
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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* 4. Any redistribution, use, or modification is done solely for
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* personal benefit and not for any commercial purpose or for
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* monetary gain.
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*
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* THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
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* RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Please inquire about commercial licensing options at
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* contact@bluekitchen-gmbh.com
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*
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*/
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#define __BTSTACK_FILE__ "btstack_chipset_em9301.c"
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/*
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* btstack_chipset_em9301.c
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*
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* Adapter to use em9301-based chipsets with BTstack
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*
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* Allows to set public BD ADDR
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*/
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#include "btstack_config.h"
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#include "btstack_chipset_em9301.h"
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#include "btstack_debug.h"
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#include <stddef.h> /* NULL */
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#include <string.h> /* memcpy */
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#include "hci.h"
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// should go to some common place
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#define OPCODE(ogf, ocf) (ocf | ogf << 10)
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#define HCI_OPCODE_EM_WRITE_PATCH_START (0xFC27)
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#define HCI_OPCODE_EM_WRITE_PATCH_CONTINUE (0xFC28)
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#define HCI_OPCODE_EM_WRITE_PATCH_ABORT (0xFC29)
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#define HCI_OPCODE_EM_CPU_RESET (0xFC32)
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/**
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* @param bd_addr
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*/
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const hci_cmd_t hci_vendor_em_set_public_address = {
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0xFC02, "B"
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};
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/**
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* @param baud_rate_index
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*/
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const hci_cmd_t hci_vendor_em_set_uart_baudrate = {
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0xFC07, "1"
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};
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/**
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* @param transmitter_test_mode
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* @param channel_number
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* @param packet_length
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* @param packet_payload_type
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*/
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const hci_cmd_t hci_vendor_em_transmitter_test = {
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0xFC11, "1111"
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};
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/**
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*/
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const hci_cmd_t hci_vendor_em_transmitter_test_end = {
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0xFC12, ""
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};
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/**
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* @param patch_index
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*/
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const hci_cmd_t hci_vendor_em_patch_query = {
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0xFC34, "2"
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};
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/**
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* Change the state of the selected memory.
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* @param memory_attribute
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*/
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const hci_cmd_t hci_vendor_em_set_memory_mode = {
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0xFC2B, "1"
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};
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/**
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* @param sleep_option_settings
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*/
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const hci_cmd_t hci_vendor_em_set_sleep_options = {
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0xFC2D, "1"
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};
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// baudrate to index for hci_vendor_em_set_uart_baudrate
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static const uint32_t baudrates[] = {
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0,
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0,
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0,
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9600,
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14400,
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19200,
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28800,
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38400,
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57600,
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76800,
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115200,
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230400,
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460800,
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921600,
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1843200,
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};
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#ifdef HAVE_EM9304_PATCH_CONTAINER
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extern const uint8_t container_blob_data[];
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extern const uint32_t container_blob_size;
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static uint32_t container_blob_offset = 0;
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static uint32_t container_end; // current container
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static uint16_t patch_sequence_number;
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static int em_cpu_reset_sent;
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static enum {
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UPLOAD_IDLE,
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UPLOAD_ACTIVE,
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} upload_state;
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#endif
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// CRC32 implementation using 4-bit lookup table created by pycrc v0.9.1, https://pycrc.org
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// ./pycrc.py --model crc-32 --algorithm table-driven --table-idx-width=4 --generate c
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static const uint32_t crc32_table[16] = {
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0x00000000, 0x1db71064, 0x3b6e20c8, 0x26d930ac, 0x76dc4190, 0x6b6b51f4, 0x4db26158, 0x5005713c,
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0xedb88320, 0xf00f9344, 0xd6d6a3e8, 0xcb61b38c, 0x9b64c2b0, 0x86d3d2d4, 0xa00ae278, 0xbdbdf21c
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};
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uint32_t btstack_crc32(const uint8_t *buf, uint16_t size){
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uint16_t pos;
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uint32_t crc = 0xffffffff;
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for (pos=0 ; pos<size ; pos++){
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int tbl_idx = crc ^ buf[pos];
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crc = crc32_table[tbl_idx & 0x0f] ^ (crc >> 4);
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tbl_idx = crc ^ (buf[pos] >> 4);
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crc = crc32_table[tbl_idx & 0x0f] ^ (crc >> 4);
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}
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return ~crc;
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}
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static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
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little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02));
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hci_cmd_buffer[2] = 0x06;
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reverse_bd_addr(addr, &hci_cmd_buffer[3]);
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}
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static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
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// lookup baudrates
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int i;
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int found = 0;
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for (i=0 ; i < sizeof(baudrates)/sizeof(uint32_t) ; i++){
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if (baudrates[i] == baudrate){
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found = i;
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break;
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}
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}
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if (!found){
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log_error("Baudrate %u not found in table", baudrate);
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return;
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}
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little_endian_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x07));
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hci_cmd_buffer[2] = 0x01;
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hci_cmd_buffer[3] = i;
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}
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#ifdef HAVE_EM9304_PATCH_CONTAINER
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static void chipset_init(const void * config){
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UNUSED(config);
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container_blob_offset = 0;
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em_cpu_reset_sent = 0;
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upload_state = UPLOAD_IDLE;
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}
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static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
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log_info("pos %u, container end %u, blob size %u", container_blob_offset, container_end, container_blob_size);
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if (container_blob_offset >= container_blob_size) {
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if (0 == em_cpu_reset_sent){
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// send EM CPU Reset
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little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_CPU_RESET);
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hci_cmd_buffer[2] = 0;
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em_cpu_reset_sent = 1;
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return BTSTACK_CHIPSET_VALID_COMMAND;
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} else {
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return BTSTACK_CHIPSET_DONE;
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}
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}
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uint32_t tag;
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uint16_t bytes_to_upload;
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uint32_t crc;
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uint32_t container_size;
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switch (upload_state){
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case UPLOAD_IDLE:
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// check for 'em93' tag
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tag = little_endian_read_32(container_blob_data, container_blob_offset);
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if (0x656d3933 != tag) {
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log_error("Expected 0x656d3933 ('em934') but got %08x", (int) tag);
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return BTSTACK_CHIPSET_DONE;
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}
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// fetch info for current container
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container_size = little_endian_read_32(container_blob_data, container_blob_offset + 4);
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container_end = container_blob_offset + container_size;
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// start uploading (<= 59 bytes)
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patch_sequence_number = 1;
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bytes_to_upload = btstack_min(59, container_end - container_blob_offset);
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crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload);
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log_info("Container type 0x%02x, id %u, build nr %u, user build nr %u, size %u",
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(int) container_blob_data[container_blob_offset+9],
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(int) container_blob_data[container_blob_offset+10],
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(int) little_endian_read_16(container_blob_data, container_blob_offset+12),
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(int) little_endian_read_16(container_blob_data, container_blob_offset+14),
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(int) container_size);
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// build command
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little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_START);
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hci_cmd_buffer[2] = 5 + bytes_to_upload;
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hci_cmd_buffer[3] = 0; // upload to iRAM1
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little_endian_store_32(hci_cmd_buffer, 4, crc);
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memcpy(&hci_cmd_buffer[8], &container_blob_data[container_blob_offset], bytes_to_upload);
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container_blob_offset += bytes_to_upload;
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if (container_blob_offset < container_end){
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upload_state = UPLOAD_ACTIVE;
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}
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return BTSTACK_CHIPSET_VALID_COMMAND;
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case UPLOAD_ACTIVE:
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// Upload next segement
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bytes_to_upload = btstack_min(58, container_end - container_blob_offset);
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crc = btstack_crc32(&container_blob_data[container_blob_offset], bytes_to_upload);
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// build command
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little_endian_store_16(hci_cmd_buffer, 0, HCI_OPCODE_EM_WRITE_PATCH_CONTINUE);
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hci_cmd_buffer[2] = 6 + bytes_to_upload;
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little_endian_store_16(hci_cmd_buffer, 3, patch_sequence_number++);
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little_endian_store_32(hci_cmd_buffer, 5, crc);
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memcpy(&hci_cmd_buffer[9], &container_blob_data[container_blob_offset], bytes_to_upload);
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container_blob_offset += bytes_to_upload;
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if (container_blob_offset >= container_end){
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log_info("container done maybe another one");
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upload_state = UPLOAD_IDLE;
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}
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return BTSTACK_CHIPSET_VALID_COMMAND;
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}
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return BTSTACK_CHIPSET_DONE;
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}
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#endif
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static const btstack_chipset_t btstack_chipset_em9301 = {
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"EM9301",
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#ifdef HAVE_EM9304_PATCH_CONTAINER
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chipset_init,
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chipset_next_command,
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#else
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NULL,
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NULL,
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#endif
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chipset_set_baudrate_command,
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chipset_set_bd_addr_command,
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};
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// MARK: public API
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const btstack_chipset_t * btstack_chipset_em9301_instance(void){
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return &btstack_chipset_em9301;
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}
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