mirror of
https://github.com/bluekitchen/btstack.git
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236 lines
9.1 KiB
C
236 lines
9.1 KiB
C
/* generated HAL source file - do not edit */
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#include "hal_data.h"
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flash_hp_instance_ctrl_t g_flash0_ctrl;
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const flash_cfg_t g_flash0_cfg =
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{ .data_flash_bgo = false, .p_callback = NULL, .p_context = NULL,
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#if defined(VECTOR_NUMBER_FCU_FRDYI)
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.irq = VECTOR_NUMBER_FCU_FRDYI,
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#else
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.irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_FCU_FIFERR)
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.err_irq = VECTOR_NUMBER_FCU_FIFERR,
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#else
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.err_irq = FSP_INVALID_VECTOR,
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#endif
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.err_ipl = (BSP_IRQ_DISABLED),
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.ipl = (BSP_IRQ_DISABLED), };
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/* Instance structure to use this module. */
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const flash_instance_t g_flash0 =
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{ .p_ctrl = &g_flash0_ctrl, .p_cfg = &g_flash0_cfg, .p_api = &g_flash_on_flash_hp };
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gpt_instance_ctrl_t g_timer0_ctrl;
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#if 0
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const gpt_extended_pwm_cfg_t g_timer0_pwm_extend =
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{
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.trough_ipl = (BSP_IRQ_DISABLED),
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#if defined(VECTOR_NUMBER_GPT0_COUNTER_UNDERFLOW)
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.trough_irq = VECTOR_NUMBER_GPT0_COUNTER_UNDERFLOW,
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#else
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.trough_irq = FSP_INVALID_VECTOR,
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#endif
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.poeg_link = GPT_POEG_LINK_POEG0,
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.output_disable = GPT_OUTPUT_DISABLE_NONE,
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.adc_trigger = GPT_ADC_TRIGGER_NONE,
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.dead_time_count_up = 0,
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.dead_time_count_down = 0,
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.adc_a_compare_match = 0,
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.adc_b_compare_match = 0,
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.interrupt_skip_source = GPT_INTERRUPT_SKIP_SOURCE_NONE,
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.interrupt_skip_count = GPT_INTERRUPT_SKIP_COUNT_0,
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.interrupt_skip_adc = GPT_INTERRUPT_SKIP_ADC_NONE,
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.gtioca_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
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.gtiocb_disable_setting = GPT_GTIOC_DISABLE_PROHIBITED,
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};
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#endif
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const gpt_extended_cfg_t g_timer0_extend =
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{ .gtioca =
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{ .output_enabled = false, .stop_level = GPT_PIN_LEVEL_LOW },
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.gtiocb =
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{ .output_enabled = false, .stop_level = GPT_PIN_LEVEL_LOW },
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.start_source = (gpt_source_t) (GPT_SOURCE_NONE), .stop_source = (gpt_source_t) (GPT_SOURCE_NONE), .clear_source =
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(gpt_source_t) (GPT_SOURCE_NONE),
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.count_up_source = (gpt_source_t) (GPT_SOURCE_NONE), .count_down_source = (gpt_source_t) (GPT_SOURCE_NONE), .capture_a_source =
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(gpt_source_t) (GPT_SOURCE_NONE),
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.capture_b_source = (gpt_source_t) (GPT_SOURCE_NONE), .capture_a_ipl = (BSP_IRQ_DISABLED), .capture_b_ipl =
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(BSP_IRQ_DISABLED),
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#if defined(VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_A)
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.capture_a_irq = VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_A,
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#else
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.capture_a_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_B)
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.capture_b_irq = VECTOR_NUMBER_GPT0_CAPTURE_COMPARE_B,
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#else
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.capture_b_irq = FSP_INVALID_VECTOR,
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#endif
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.capture_filter_gtioca = GPT_CAPTURE_FILTER_NONE,
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.capture_filter_gtiocb = GPT_CAPTURE_FILTER_NONE,
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#if 0
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.p_pwm_cfg = &g_timer0_pwm_extend,
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#else
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.p_pwm_cfg = NULL,
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#endif
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#if 0
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.gtior_setting.gtior_b.gtioa = (0U << 4U) | (0U << 2U) | (0U << 0U),
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.gtior_setting.gtior_b.oadflt = (uint32_t) GPT_PIN_LEVEL_LOW,
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.gtior_setting.gtior_b.oahld = 0U,
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.gtior_setting.gtior_b.oae = (uint32_t) false,
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.gtior_setting.gtior_b.oadf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
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.gtior_setting.gtior_b.nfaen = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
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.gtior_setting.gtior_b.nfcsa = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
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.gtior_setting.gtior_b.gtiob = (0U << 4U) | (0U << 2U) | (0U << 0U),
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.gtior_setting.gtior_b.obdflt = (uint32_t) GPT_PIN_LEVEL_LOW,
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.gtior_setting.gtior_b.obhld = 0U,
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.gtior_setting.gtior_b.obe = (uint32_t) false,
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.gtior_setting.gtior_b.obdf = (uint32_t) GPT_GTIOC_DISABLE_PROHIBITED,
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.gtior_setting.gtior_b.nfben = ((uint32_t) GPT_CAPTURE_FILTER_NONE & 1U),
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.gtior_setting.gtior_b.nfcsb = ((uint32_t) GPT_CAPTURE_FILTER_NONE >> 1U),
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#else
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.gtior_setting.gtior = 0U,
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#endif
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};
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const timer_cfg_t g_timer0_cfg =
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{ .mode = TIMER_MODE_PERIODIC,
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/* Actual period: 0.001 seconds. Actual duty: 50%. */.period_counts = (uint32_t) 0x186a0,
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.duty_cycle_counts = 0xc350, .source_div = (timer_source_div_t) 0, .channel = 0, .p_callback = timer_1ms,
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/** If NULL then do not add & */
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#if defined(NULL)
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.p_context = NULL,
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#else
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.p_context = &NULL,
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#endif
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.p_extend = &g_timer0_extend,
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.cycle_end_ipl = (15),
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#if defined(VECTOR_NUMBER_GPT0_COUNTER_OVERFLOW)
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.cycle_end_irq = VECTOR_NUMBER_GPT0_COUNTER_OVERFLOW,
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#else
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.cycle_end_irq = FSP_INVALID_VECTOR,
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#endif
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};
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/* Instance structure to use this module. */
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const timer_instance_t g_timer0 =
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{ .p_ctrl = &g_timer0_ctrl, .p_cfg = &g_timer0_cfg, .p_api = &g_timer_on_gpt };
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dtc_instance_ctrl_t g_transfer1_ctrl;
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transfer_info_t g_transfer1_info =
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{ .transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
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.transfer_settings_word_b.repeat_area = TRANSFER_REPEAT_AREA_DESTINATION,
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.transfer_settings_word_b.irq = TRANSFER_IRQ_END,
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.transfer_settings_word_b.chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
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.transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_FIXED,
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.transfer_settings_word_b.size = TRANSFER_SIZE_1_BYTE,
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.transfer_settings_word_b.mode = TRANSFER_MODE_NORMAL,
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.p_dest = (void*) NULL,
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.p_src = (void const*) NULL,
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.num_blocks = 0,
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.length = 0, };
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const dtc_extended_cfg_t g_transfer1_cfg_extend =
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{ .activation_source = VECTOR_NUMBER_SCI7_RXI, };
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const transfer_cfg_t g_transfer1_cfg =
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{ .p_info = &g_transfer1_info, .p_extend = &g_transfer1_cfg_extend, };
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/* Instance structure to use this module. */
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const transfer_instance_t g_transfer1 =
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{ .p_ctrl = &g_transfer1_ctrl, .p_cfg = &g_transfer1_cfg, .p_api = &g_transfer_on_dtc };
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dtc_instance_ctrl_t g_transfer0_ctrl;
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transfer_info_t g_transfer0_info =
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{ .transfer_settings_word_b.dest_addr_mode = TRANSFER_ADDR_MODE_FIXED,
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.transfer_settings_word_b.repeat_area = TRANSFER_REPEAT_AREA_SOURCE,
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.transfer_settings_word_b.irq = TRANSFER_IRQ_END,
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.transfer_settings_word_b.chain_mode = TRANSFER_CHAIN_MODE_DISABLED,
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.transfer_settings_word_b.src_addr_mode = TRANSFER_ADDR_MODE_INCREMENTED,
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.transfer_settings_word_b.size = TRANSFER_SIZE_1_BYTE,
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.transfer_settings_word_b.mode = TRANSFER_MODE_NORMAL,
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.p_dest = (void*) NULL,
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.p_src = (void const*) NULL,
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.num_blocks = 0,
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.length = 0, };
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const dtc_extended_cfg_t g_transfer0_cfg_extend =
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{ .activation_source = VECTOR_NUMBER_SCI7_TXI, };
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const transfer_cfg_t g_transfer0_cfg =
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{ .p_info = &g_transfer0_info, .p_extend = &g_transfer0_cfg_extend, };
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/* Instance structure to use this module. */
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const transfer_instance_t g_transfer0 =
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{ .p_ctrl = &g_transfer0_ctrl, .p_cfg = &g_transfer0_cfg, .p_api = &g_transfer_on_dtc };
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sci_uart_instance_ctrl_t g_uart0_ctrl;
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baud_setting_t g_uart0_baud_setting =
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{
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/* Baud rate calculated with 0.091% error. */.semr_baudrate_bits_b.abcse = 0,
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.semr_baudrate_bits_b.abcs = 0, .semr_baudrate_bits_b.bgdm = 1, .cks = 0, .brr = 6, .mddr = (uint8_t) 132, .semr_baudrate_bits_b.brme =
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true };
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/** UART extended configuration for UARTonSCI HAL driver */
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const sci_uart_extended_cfg_t g_uart0_cfg_extend =
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{ .clock = SCI_UART_CLOCK_INT, .rx_edge_start = SCI_UART_START_BIT_FALLING_EDGE, .noise_cancel =
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SCI_UART_NOISE_CANCELLATION_DISABLE,
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.rx_fifo_trigger = SCI_UART_RX_FIFO_TRIGGER_MAX, .p_baud_setting = &g_uart0_baud_setting, .flow_control =
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SCI_UART_FLOW_CONTROL_RTS,
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#if 0xFF != 0xFF
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.flow_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
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#else
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.flow_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
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#endif
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.rs485_setting =
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{ .enable = SCI_UART_RS485_DISABLE, .polarity = SCI_UART_RS485_DE_POLARITY_HIGH,
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#if 0xFF != 0xFF
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.de_control_pin = BSP_IO_PORT_FF_PIN_0xFF,
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#else
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.de_control_pin = (bsp_io_port_pin_t) UINT16_MAX,
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#endif
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}, };
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/** UART interface configuration */
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const uart_cfg_t g_uart0_cfg =
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{ .channel = 7, .data_bits = UART_DATA_BITS_8, .parity = UART_PARITY_OFF, .stop_bits = UART_STOP_BITS_1, .p_callback =
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user_uart_callback,
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.p_context = NULL, .p_extend = &g_uart0_cfg_extend,
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#define RA_NOT_DEFINED (1)
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#if (RA_NOT_DEFINED == g_transfer0)
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.p_transfer_tx = NULL,
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#else
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.p_transfer_tx = &g_transfer0,
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#endif
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#if (RA_NOT_DEFINED == g_transfer1)
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.p_transfer_rx = NULL,
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#else
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.p_transfer_rx = &g_transfer1,
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#endif
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#undef RA_NOT_DEFINED
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.rxi_ipl = (12),
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.txi_ipl = (12), .tei_ipl = (12), .eri_ipl = (12),
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#if defined(VECTOR_NUMBER_SCI7_RXI)
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.rxi_irq = VECTOR_NUMBER_SCI7_RXI,
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#else
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.rxi_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_SCI7_TXI)
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.txi_irq = VECTOR_NUMBER_SCI7_TXI,
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#else
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.txi_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_SCI7_TEI)
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.tei_irq = VECTOR_NUMBER_SCI7_TEI,
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#else
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.tei_irq = FSP_INVALID_VECTOR,
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#endif
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#if defined(VECTOR_NUMBER_SCI7_ERI)
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.eri_irq = VECTOR_NUMBER_SCI7_ERI,
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#else
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.eri_irq = FSP_INVALID_VECTOR,
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#endif
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};
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/* Instance structure to use this module. */
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const uart_instance_t g_uart0 =
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{ .p_ctrl = &g_uart0_ctrl, .p_cfg = &g_uart0_cfg, .p_api = &g_uart_on_sci };
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void g_hal_init(void)
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{
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g_common_init ();
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}
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