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chipset/bcm: wait 300 ms after PatchRAM update in hci.c to assert Controller is ready

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This commit is contained in:
Matthias Ringwald 2020-04-07 15:48:15 +02:00
parent 9b1b0ebd45
commit f19b3c9e44
2 changed files with 5 additions and 20 deletions
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16
chipset/bcm/btstack_chipset_bcm.c
View File

@ -147,15 +147,6 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
if (res == 0){
log_info("chipset-bcm: end of file, size %u", init_script_offset);
close(hcd_fd);
// TODO: should not be needed anymore - fixed for embedded below and tested on RedBear Duo
// wait for firmware patch to be applied - shorter delay possible
#ifdef _WIN32
Sleep(1000);
#else
sleep(1);
#endif
return BTSTACK_CHIPSET_DONE;
}
if (res < 0){
@ -285,13 +276,6 @@ static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
}
if (init_script_offset >= brcm_patch_ram_length) {
// It takes up to 2 ms for the BCM to raise its RTS line
// If we send the next command right away, the raise of the RTS will fall happen during
// it and causing the next command to fail (at least on RedBear Duo with manual CTS/RTS)
//
// -> Work around implemented in hci.c
return BTSTACK_CHIPSET_DONE;
}

9
src/hci.c
View File

@ -1334,11 +1334,12 @@ static void hci_initializing_run(void){
hci_stack->hci_transport->set_baudrate(baud_rate);
}
// - RTS will raise during update, but manual RTS/CTS in WICED port on RedBear Duo cannot handle this
// -> Work around: wait a few milliseconds here.
log_info("BCM delay after init script");
uint16_t bcm_delay_ms = 300;
// - UART may or may not be disabled during update and Controller RTS may or may not be high during this time
// -> Work around: wait here.
log_info("BCM delay (%u ms) after init script", bcm_delay_ms);
hci_stack->substate = HCI_INIT_W4_CUSTOM_INIT_BCM_DELAY;
btstack_run_loop_set_timer(&hci_stack->timeout, 10);
btstack_run_loop_set_timer(&hci_stack->timeout, bcm_delay_ms);
btstack_run_loop_set_timer_handler(&hci_stack->timeout, hci_initialization_timeout_handler);
btstack_run_loop_add_timer(&hci_stack->timeout);
break;