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hci: send hci_bcm_pcm2_setup if HAVE_BCM_PCM2
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@ -76,6 +76,7 @@ Chipset properties:
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| \#define | Description |
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| \#define | Description |
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|------------------------|-------------------------------------------------------|
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|------------------------|-------------------------------------------------------|
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| HAVE_BCM_PCM2 | PCM2 is used and requires additional configuration |
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| HAVE_BCM_PCM_NBS_16KHZ | NBS is up/downsampled, use 16 kHz sample rate for NBS |
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| HAVE_BCM_PCM_NBS_16KHZ | NBS is up/downsampled, use 16 kHz sample rate for NBS |
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### ENABLE_* directives {#sec:enableDirectives}
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### ENABLE_* directives {#sec:enableDirectives}
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45
src/hci.c
45
src/hci.c
@ -2187,8 +2187,53 @@ static void hci_initializing_run(void){
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hci_send_cmd(&hci_bcm_write_pcm_data_format_param, 0, 0, 3, 3, 0);
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hci_send_cmd(&hci_bcm_write_pcm_data_format_param, 0, 0, 3, 3, 0);
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break;
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break;
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}
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}
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#ifdef HAVE_BCM_PCM2
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case HCI_INIT_BCM_PCM2_SETUP:
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if (hci_classic_supported() && (hci_stack->manufacturer == BLUETOOTH_COMPANY_ID_BROADCOM_CORPORATION)) {
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hci_stack->substate = HCI_INIT_W4_BCM_PCM2_SETUP;
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uint8_t op_mode = 0; // Op_Mode = 0 = PCM, 1 = I2S
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uint32_t pcm_clock_freq;
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uint8_t ch_0_period;
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#ifdef ENABLE_BCM_PCM_WBS
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// 512 kHz, resample 8 kHz to 16 khz
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pcm_clock_freq = 512000;
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ch_0_period = 1;
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#else
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// 256 khz, 8 khz output
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pcm_clock_freq = 256000;
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ch_0_period = 0;
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#endif
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#endif
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log_info("BCM: Config PCM2 - op mode %u, pcm clock %" PRIu32 ", ch0_period %u", op_mode, pcm_clock_freq, ch_0_period);
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hci_send_cmd(&hci_bcm_pcm2_setup,
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0x00, // Action = Write
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0x00, // Test_Options = None
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op_mode, // Op_Mode
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0x1D, // Sync_and_Clock_Options Sync = Signal | Sync Output Enable | Generate PCM_CLK | Tristate When Idle
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pcm_clock_freq, // PCM_Clock_Freq
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0x01, // Sync_Signal_Width
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0x0F, // Slot_Width
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0x01, // NumberOfSlots
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0x00, // Bank_0_Fill_Mode = 0s
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0x00, // Bank_0_Number_of_Fill_Bits
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0x00, // Bank_0_Programmable_Fill_Data
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0x00, // Bank_1_Fill_Mode = 0s
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0x00, // Bank_1_Number_of_Fill_Bits
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0x00, // Bank_1_Programmable_Fill_Data
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0x00, // Data_Justify_And_Bit_Order_Options = Left Justify
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0x00, // Ch_0_Slot_Number
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0x01, // Ch_1_Slot_Number
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0x02, // Ch_2_Slot_Number
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0x03, // Ch_3_Slot_Number
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0x04, // Ch_4_Slot_Number
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ch_0_period, // Ch_0_Period
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0x00, // Ch_1_Period
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0x00 // Ch_2_Period
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);
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break;
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}
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#endif
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#endif
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#endif /* ENABLE_SCO_OVER_PCM */
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#endif /* ENABLE_CLASSIC */
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#ifdef ENABLE_BLE
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#ifdef ENABLE_BLE
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/* fall through */
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/* fall through */
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@ -859,6 +859,10 @@ typedef enum hci_init_state{
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HCI_INIT_W4_BCM_WRITE_I2SPCM_INTERFACE_PARAM,
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HCI_INIT_W4_BCM_WRITE_I2SPCM_INTERFACE_PARAM,
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HCI_INIT_BCM_WRITE_PCM_DATA_FORMAT_PARAM,
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HCI_INIT_BCM_WRITE_PCM_DATA_FORMAT_PARAM,
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HCI_INIT_W4_BCM_WRITE_PCM_DATA_FORMAT_PARAM,
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HCI_INIT_W4_BCM_WRITE_PCM_DATA_FORMAT_PARAM,
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#ifdef HAVE_BCM_PCM2
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HCI_INIT_BCM_PCM2_SETUP,
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HCI_INIT_W4_BCM_PCM2_SETUP,
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#endif
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#endif
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#endif
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#endif
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#endif
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