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hci: send hci_bcm_pcm2_setup if HAVE_BCM_PCM2

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This commit is contained in:
Matthias Ringwald 2023-09-28 10:44:56 +02:00
parent 69c72f1cde
commit dd1f98b4e8
3 changed files with 50 additions and 0 deletions
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1
doc/manual/docs-template/how_to.md
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@ -76,6 +76,7 @@ Chipset properties:
| \#define | Description |
|------------------------|-------------------------------------------------------|
| HAVE_BCM_PCM2 | PCM2 is used and requires additional configuration |
| HAVE_BCM_PCM_NBS_16KHZ | NBS is up/downsampled, use 16 kHz sample rate for NBS |
### ENABLE_* directives {#sec:enableDirectives}

45
src/hci.c
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@ -2187,8 +2187,53 @@ static void hci_initializing_run(void){
hci_send_cmd(&hci_bcm_write_pcm_data_format_param, 0, 0, 3, 3, 0);
break;
}
#ifdef HAVE_BCM_PCM2
case HCI_INIT_BCM_PCM2_SETUP:
if (hci_classic_supported() && (hci_stack->manufacturer == BLUETOOTH_COMPANY_ID_BROADCOM_CORPORATION)) {
hci_stack->substate = HCI_INIT_W4_BCM_PCM2_SETUP;
uint8_t op_mode = 0; // Op_Mode = 0 = PCM, 1 = I2S
uint32_t pcm_clock_freq;
uint8_t ch_0_period;
#ifdef ENABLE_BCM_PCM_WBS
// 512 kHz, resample 8 kHz to 16 khz
pcm_clock_freq = 512000;
ch_0_period = 1;
#else
// 256 khz, 8 khz output
pcm_clock_freq = 256000;
ch_0_period = 0;
#endif
log_info("BCM: Config PCM2 - op mode %u, pcm clock %" PRIu32 ", ch0_period %u", op_mode, pcm_clock_freq, ch_0_period);
hci_send_cmd(&hci_bcm_pcm2_setup,
0x00, // Action = Write
0x00, // Test_Options = None
op_mode, // Op_Mode
0x1D, // Sync_and_Clock_Options Sync = Signal | Sync Output Enable | Generate PCM_CLK | Tristate When Idle
pcm_clock_freq, // PCM_Clock_Freq
0x01, // Sync_Signal_Width
0x0F, // Slot_Width
0x01, // NumberOfSlots
0x00, // Bank_0_Fill_Mode = 0s
0x00, // Bank_0_Number_of_Fill_Bits
0x00, // Bank_0_Programmable_Fill_Data
0x00, // Bank_1_Fill_Mode = 0s
0x00, // Bank_1_Number_of_Fill_Bits
0x00, // Bank_1_Programmable_Fill_Data
0x00, // Data_Justify_And_Bit_Order_Options = Left Justify
0x00, // Ch_0_Slot_Number
0x01, // Ch_1_Slot_Number
0x02, // Ch_2_Slot_Number
0x03, // Ch_3_Slot_Number
0x04, // Ch_4_Slot_Number
ch_0_period, // Ch_0_Period
0x00, // Ch_1_Period
0x00 // Ch_2_Period
);
break;
}
#endif
#endif /* ENABLE_SCO_OVER_PCM */
#endif /* ENABLE_CLASSIC */
#ifdef ENABLE_BLE
/* fall through */

4
src/hci.h
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@ -859,6 +859,10 @@ typedef enum hci_init_state{
HCI_INIT_W4_BCM_WRITE_I2SPCM_INTERFACE_PARAM,
HCI_INIT_BCM_WRITE_PCM_DATA_FORMAT_PARAM,
HCI_INIT_W4_BCM_WRITE_PCM_DATA_FORMAT_PARAM,
#ifdef HAVE_BCM_PCM2
HCI_INIT_BCM_PCM2_SETUP,
HCI_INIT_W4_BCM_PCM2_SETUP,
#endif
#endif
#endif