diff --git a/chipset/csr/btstack_chipset_csr.c b/chipset/csr/btstack_chipset_csr.c
index 8cc54392b..037f6c626 100644
--- a/chipset/csr/btstack_chipset_csr.c
+++ b/chipset/csr/btstack_chipset_csr.c
@@ -76,9 +76,6 @@ static const uint8_t init_script[] = {
     // Enable RTS/CTS for BCSP (0806 -> 080e)
     0x01, 0x00, 0xFC, 0x13, 0xc2, 0x02, 0x00, 0x09, 0x00, 0x01, 0x00, 0x03, 0x70, 0x00, 0x00, 0xbf, 0x01, 0x01, 0x00, 0x00, 0x00, 0x0e, 0x08,
 
-    // Enable RTS/CTS for H5 (1806 -> 180e, even parity still on)
-    0x01, 0x00, 0xFC, 0x13, 0xc2, 0x02, 0x00, 0x09, 0x00, 0x01, 0x00, 0x03, 0x70, 0x00, 0x00, 0xc1, 0x01, 0x01, 0x00, 0x00, 0x00, 0x0e, 0x18,
-
     //  Set UART baudrate to 115200
     0x01, 0x00, 0xFC, 0x15, 0xc2, 0x02, 0x00, 0x0a, 0x00, 0x02, 0x00, 0x03, 0x70, 0x00, 0x00, 0xea, 0x01, 0x02, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0xc2,