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msp432p401lp-cc256x: setup dma, implement tx dma, first test wit rx dma
This commit is contained in:
Matthias Ringwald
parent
ff348cd34b
commit
8ba100b5c3
@ -183,6 +183,16 @@ uint32_t hal_time_ms(void){
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// HAL UART DMA
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// DMA Control Table
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// if not all channels are used, the alignment can be finer
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// GCC
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__attribute__ ((aligned (1024)))
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static DMA_ControlTable MSP_EXP432P401RLP_DMAControlTable[32];
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// RX Ping Pong Buffer - similar to circular buffer on other MCUs
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#define HAL_DMA_RX_BUFFER_SIZE 2
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static uint8_t hal_dma_rx_ping_pong_buffer[2 * HAL_DMA_RX_BUFFER_SIZE];
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// rx state
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static uint16_t bytes_to_read = 0;
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static uint8_t * rx_buffer_ptr = 0;
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@ -263,6 +273,22 @@ static void hal_uart_dma_disable_rx(void){
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HWREG16(&P5->OUT) |= GPIO_PIN6;
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}
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void DMA_INT1_IRQHandler(void)
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{
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MAP_DMA_clearInterruptFlag(DMA_CH4_EUSCIA2TX & 0x0F);
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MAP_DMA_disableChannel(DMA_CH4_EUSCIA2TX & 0x0F);
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(*tx_done_handler)();
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}
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void DMA_INT2_IRQHandler(void)
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{
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MAP_DMA_clearInterruptFlag(DMA_CH5_EUSCIA2RX & 0x0F);
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GPIO_setOutputHighOnPin(GPIO_PORT_P5, GPIO_PIN6);
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GPIO_setOutputLowOnPin(GPIO_PORT_P5, GPIO_PIN6);
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}
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#if 0
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// tries to optimize path to RTS high
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void EUSCIA2_IRQHandler(void){
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@ -325,6 +351,7 @@ void EUSCIA2_IRQHandler(void){
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HWREG16(&P5->OUT) &= ~GPIO_PIN6;
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}
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}
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#endif
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void hal_uart_dma_init(void){
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// nShutdown
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@ -337,21 +364,64 @@ void hal_uart_dma_init(void){
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MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P3,
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GPIO_PIN2 | GPIO_PIN3, GPIO_PRIMARY_MODULE_FUNCTION);
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// configure UART
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/* Configuring UART Module */
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MAP_UART_initModule(EUSCI_A2_BASE, &uartConfig);
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// UART
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/* Enable UART module */
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/* Configuring and enable UART Module */
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MAP_UART_initModule(EUSCI_A2_BASE, &uartConfig);
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MAP_UART_enableModule(EUSCI_A2_BASE);
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/* Enable UART interrupts in general */
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Interrupt_enableInterrupt(INT_EUSCIA2);
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// DMA
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/* Configuring DMA module */
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MAP_DMA_enableModule();
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MAP_DMA_setControlBase(MSP_EXP432P401RLP_DMAControlTable);
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/* Assign DMA channel 4 to EUSCI_A2_TX, channel 5 to EUSCI_A2_RX */
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MAP_DMA_assignChannel(DMA_CH4_EUSCIA2TX);
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MAP_DMA_assignChannel(DMA_CH5_EUSCIA2RX);
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/* Setup the RX and TX transfer characteristics */
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MAP_DMA_setChannelControl(DMA_CH4_EUSCIA2TX | UDMA_PRI_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_1);
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MAP_DMA_setChannelControl(DMA_CH5_EUSCIA2RX | UDMA_PRI_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_NONE | UDMA_DST_INC_8 | UDMA_ARB_1);
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/* Enable DMA interrupt for both channels */
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MAP_DMA_assignInterrupt(INT_DMA_INT1, DMA_CH4_EUSCIA2TX & 0x0f);
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MAP_DMA_assignInterrupt(INT_DMA_INT2, DMA_CH5_EUSCIA2RX & 0x0f);
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/* Clear interrupt flags */
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MAP_DMA_clearInterruptFlag(DMA_CH4_EUSCIA2TX & 0x0F);
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MAP_DMA_clearInterruptFlag(DMA_CH5_EUSCIA2RX & 0x0F);
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/* Enable Interrupts */
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MAP_Interrupt_enableInterrupt(INT_DMA_INT1);
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MAP_Interrupt_enableInterrupt(INT_DMA_INT2);
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MAP_DMA_enableInterrupt(INT_DMA_INT1);
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MAP_DMA_enableInterrupt(INT_DMA_INT2);
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// power cycle
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MAP_GPIO_setOutputLowOnPin(GPIO_PORT_P2, GPIO_PIN5);
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delay_ms(10);
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MAP_GPIO_setOutputHighOnPin(GPIO_PORT_P2, GPIO_PIN5);
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delay_ms(200);
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// test setup ping pong rx
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GPIO_setOutputLowOnPin(GPIO_PORT_P5, GPIO_PIN6);
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GPIO_setOutputHighOnPin(GPIO_PORT_P5, GPIO_PIN6);
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GPIO_setOutputLowOnPin(GPIO_PORT_P5, GPIO_PIN6);
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MAP_DMA_setChannelTransfer(DMA_CH5_EUSCIA2RX | UDMA_PRI_SELECT,
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UDMA_MODE_PINGPONG,
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(void *) UART_getReceiveBufferAddressForDMA(EUSCI_A2_BASE),
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(uint8_t *) &hal_dma_rx_ping_pong_buffer[0],
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HAL_DMA_RX_BUFFER_SIZE);
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MAP_DMA_setChannelTransfer(DMA_CH5_EUSCIA2RX | UDMA_ALT_SELECT,
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UDMA_MODE_PINGPONG,
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(void *) UART_getReceiveBufferAddressForDMA(EUSCI_A2_BASE),
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(uint8_t *) &hal_dma_rx_ping_pong_buffer[HAL_DMA_RX_BUFFER_SIZE],
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HAL_DMA_RX_BUFFER_SIZE);
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MAP_DMA_enableChannel(DMA_CH5_EUSCIA2RX & 0x0F);
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}
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int hal_uart_dma_set_baud(uint32_t baud){
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@ -396,24 +466,17 @@ void hal_uart_dma_set_block_sent( void (*the_block_handler)(void)){
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}
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void hal_uart_dma_send_block(const uint8_t * data, uint16_t len){
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tx_buffer_ptr = (uint8_t *) data;
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bytes_to_write = len;
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// start sending
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if (!bytes_to_write) return;
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// enable TX interrupt -> starts transmission
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UART_enableInterrupt(EUSCI_A2_BASE, EUSCI_A_UART_TRANSMIT_INTERRUPT);
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MAP_DMA_setChannelTransfer(DMA_CH4_EUSCIA2TX | UDMA_PRI_SELECT, UDMA_MODE_BASIC, (uint8_t *) data,
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(void *) MAP_UART_getTransmitBufferAddressForDMA(EUSCI_A2_BASE),
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len);
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MAP_DMA_enableChannel(DMA_CH4_EUSCIA2TX & 0x0F);
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}
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// int used to indicate a request for more new data
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void hal_uart_dma_receive_block(uint8_t *buffer, uint16_t len){
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rx_buffer_ptr = buffer;
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bytes_to_read = len;
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UART_enableInterrupt(EUSCI_A2_BASE, EUSCI_A_UART_RECEIVE_INTERRUPT);
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hal_uart_dma_enable_rx(); // RTS low
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// TODO
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}
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// End of HAL UART DMA
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@ -434,11 +497,13 @@ int main(void)
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/* Halting the Watchdog */
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MAP_WDT_A_holdTimer();
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#if 1
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/* Setting our MCLK to 48MHz - directly setting it in system_msp432p401r didn't work */
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MAP_PCM_setCoreVoltageLevel(PCM_VCORE1);
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FlashCtl_setWaitState(FLASH_BANK0, 2);
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FlashCtl_setWaitState(FLASH_BANK1, 2);
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MAP_CS_setDCOCenteredFrequency(CS_DCO_FREQUENCY_48);
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#endif
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init_systick();
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@ -91,6 +91,8 @@ extern int main(void);
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/* External declarations for the interrupt handlers used by the application. */
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/* To be added by the user */
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extern void EUSCIA2_IRQHandler(void);
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extern void DMA_INT1_IRQHandler(void);
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extern void DMA_INT2_IRQHandler(void);
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/* To be added by the user */
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extern void SysTick_Handler(void);
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@ -135,7 +137,7 @@ void (* const interruptVectors[])(void) __attribute__ ((section (".intvecs"))) =
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defaultISR, /* TA3_N ISR */
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defaultISR, /* EUSCIA0 ISR */
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defaultISR, /* EUSCIA1 ISR */
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EUSCIA2_IRQHandler, /* EUSCIA2 ISR */
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defaultISR, /* EUSCIA2 ISR */
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defaultISR, /* EUSCIA3 ISR */
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defaultISR, /* EUSCIB0 ISR */
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defaultISR, /* EUSCIB1 ISR */
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@ -149,8 +151,8 @@ void (* const interruptVectors[])(void) __attribute__ ((section (".intvecs"))) =
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defaultISR, /* RTC ISR */
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defaultISR, /* DMA_ERR ISR */
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defaultISR, /* DMA_INT3 ISR */
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defaultISR, /* DMA_INT2 ISR */
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defaultISR, /* DMA_INT1 ISR */
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DMA_INT2_IRQHandler, /* DMA_INT2 ISR */
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DMA_INT1_IRQHandler, /* DMA_INT1 ISR */
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defaultISR, /* DMA_INT0 ISR */
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defaultISR, /* PORT1 ISR */
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defaultISR, /* PORT2 ISR */
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@ -104,7 +104,7 @@
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// <12000000> 12 MHz
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// <24000000> 24 MHz
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// <48000000> 48 MHz
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#define __SYSTEM_CLOCK 1500000
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#define __SYSTEM_CLOCK 24000000
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/*--------------------- Power Regulator Configuration -----------------------*/
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// Power Regulator Mode
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