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chipset: add btstack_chipset to all chipset drivers

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This commit is contained in:
Matthias Ringwald 2016-01-22 14:33:46 +01:00
parent e495061840
commit 58360f586d
13 changed files with 308 additions and 123 deletions
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76
chipset/bcm/bt_control_bcm.c
View File

@ -60,67 +60,95 @@ extern const char brcm_patch_version[];
static uint32_t init_script_offset;
static int send_download_command;
static int bt_control_bcm_on(void *config){
static void chipset_init(void * config){
log_info("Broadcom init script %s, len %u", brcm_patch_version, brcm_patch_ram_length);
init_script_offset = 0;
init_script_offset = 0;
send_download_command = 1;
return 0;
}
// @note: Broadcom chips require higher UART clock for baud rate > 3000000 -> limit baud rate in hci.c
static int bcm_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
hci_cmd_buffer[0] = 0x18;
hci_cmd_buffer[1] = 0xfc;
hci_cmd_buffer[2] = 0x06;
hci_cmd_buffer[3] = 0x00;
hci_cmd_buffer[4] = 0x00;
bt_store_32(hci_cmd_buffer, 5, baudrate);
return 0;
}
// @note: bd addr has to be set after sending init script (it might just get re-set)
static int bt_control_bcm_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
hci_cmd_buffer[0] = 0x01;
hci_cmd_buffer[1] = 0xfc;
hci_cmd_buffer[2] = 0x06;
bt_flip_addr(&hci_cmd_buffer[3], addr);
return 0;
}
static int bt_control_bcm_next_cmd(void *config, uint8_t *hci_cmd_buffer){
static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
// send download firmware command
if (send_download_command){
send_download_command = 0;
hci_cmd_buffer[0] = 0x2e;
hci_cmd_buffer[1] = 0xfc;
hci_cmd_buffer[2] = 0x00;
return 1;
return BTSTACK_CHIPSET_VALID_COMMAND;
}
if (init_script_offset >= brcm_patch_ram_length) {
return 0;
return BTSTACK_CHIPSET_DONE;
}
// use memcpy with pointer
int cmd_len = 3 + brcm_patchram_buf[init_script_offset+2];
memcpy(&hci_cmd_buffer[0], &brcm_patchram_buf[init_script_offset], cmd_len);
init_script_offset += cmd_len;
return 1;
return BTSTACK_CHIPSET_VALID_COMMAND;
}
// MARK: const structs
static const btstack_chipset_t btstack_chipset_bcm = {
"BCM",
chipset_init,
chipset_next_command,
chipset_set_baudrate_command,
chipset_set_bd_addr_command,
};
// MARK: public API
const btstack_chipset_t * btstack_chipset_bcm_instance(void){
return &btstack_chipset_bcm;
}
// deprecated //
static int bt_control_bcm_on(void *config){
chipset_init(config);
return 0;
}
static int bt_control_bcm_next_cmd(void *config, uint8_t *hci_cmd_buffer){
return (int) chipset_next_command(hci_cmd_buffer);
}
static int bcm_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
chipset_set_baudrate_command(baudrate, hci_cmd_buffer);
return 0;
}
static int bt_control_bcm_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
chipset_set_bd_addr_command(addr, hci_cmd_buffer);
return 0;
}
static const bt_control_t bt_control_bcm = {
bt_control_bcm_on, // on
NULL, // off
NULL, // sleep
NULL, // wake
NULL, // valid
NULL, // name
bcm_baudrate_cmd, // baudrate_cmd
bt_control_bcm_next_cmd, // next_cmd
NULL, // register_for_power_notifications
bt_control_bcm_on, // on
NULL, // off
NULL, // sleep
NULL, // wake
NULL, // valid
NULL, // name
bcm_baudrate_cmd, // baudrate_cmd
bt_control_bcm_next_cmd, // next_cmd
NULL, // register_for_power_notifications
NULL, // hw_error
bt_control_bcm_set_bd_addr_cmd, // set_bd_addr_cmd
};
@ -129,3 +157,5 @@ static const bt_control_t bt_control_bcm = {
bt_control_t * bt_control_bcm_instance(void){
return (bt_control_t*) &bt_control_bcm;
}

1
chipset/bcm/bt_control_bcm.h
View File

@ -52,6 +52,7 @@ extern "C" {
#include "btstack_chipset.h"
bt_control_t * bt_control_bcm_instance(void);
const btstack_chipset_t * btstack_chipset_bcm_instance(void);
#if defined __cplusplus
}

129
chipset/cc256x/bt_control_cc256x.c
View File

@ -81,28 +81,28 @@
extern const uint8_t cc256x_init_script[];
extern const uint32_t cc256x_init_script_size;
//
// init script
static uint32_t init_script_offset = 0;
static int16_t init_power_in_dB = 13; // 13 dBm
static int init_ehcill_enabled = 0;
static int init_send_route_sco_over_hci = 0;
static int bt_control_cc256x_on(void *config){
init_script_offset = 0;
// support for SCO over HCI
#ifdef HAVE_SCO_OVER_HCI
init_send_route_sco_over_hci = 1;
#endif
return 0;
}
static int init_send_route_sco_over_hci = 0;
// route SCO over HCI (connection type=1, tx buffer size = 0x00 (don't change), tx buffer max latency=0x0000(don't chnage)), accept packets - 0)
static const uint8_t hci_route_sco_over_hci[] = {
0x10, 0xfe, 0x05, 0x01, 0x00, 0x00, 0x00, 0x00
};
#endif
// UART Baud Rate control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134850/484763.aspx
static int cc256x_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
static void chipset_init(void * config){
init_script_offset = 0;
#ifdef HAVE_SCO_OVER_HCI
init_send_route_sco_over_hci = 1;
#endif
}
static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
hci_cmd_buffer[0] = 0x36;
hci_cmd_buffer[1] = 0xFF;
hci_cmd_buffer[2] = 0x04;
@ -110,9 +110,12 @@ static int cc256x_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cm
hci_cmd_buffer[4] = (baudrate >> 8) & 0xff;
hci_cmd_buffer[5] = (baudrate >> 16) & 0xff;
hci_cmd_buffer[6] = 0;
return 0;
}
#if 0
static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
}
#endif
// Output Power control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134853/484767.aspx
#define NUM_POWER_LEVELS 16
@ -197,8 +200,7 @@ static void update_sleep_mode_configurations(uint8_t * hci_cmd_buffer){
}
}
// @returns 1 if command was injected before this one
static int bt_control_cc256x_update_command(uint8_t *hci_cmd_buffer){
static void update_init_script_command(uint8_t *hci_cmd_buffer){
uint16_t opcode = hci_cmd_buffer[0] | (hci_cmd_buffer[1] << 8);
@ -215,25 +217,23 @@ static int bt_control_cc256x_update_command(uint8_t *hci_cmd_buffer){
default:
break;
}
return 0;
}
static int bt_control_cc256x_next_cmd(void *config, uint8_t *hci_cmd_buffer){
static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
if (init_script_offset >= cc256x_init_script_size) {
#ifdef HAVE_SCO_OVER_HCI
// append send route SCO over HCI if requested
if (init_send_route_sco_over_hci){
init_send_route_sco_over_hci = 0;
memcpy(hci_cmd_buffer, hci_route_sco_over_hci, sizeof(hci_route_sco_over_hci));
return 1;
return BTSTACK_CHIPSET_VALID_COMMAND;
}
return 0;
#endif
return BTSTACK_CHIPSET_DONE;
}
// store current position in case command needs to get expanded
uint32_t current_offset = init_script_offset;
// extracted init script has 0x01 cmd packet type, but BTstack expects them without
init_script_offset++;
@ -267,15 +267,67 @@ static int bt_control_cc256x_next_cmd(void *config, uint8_t *hci_cmd_buffer){
init_script_offset += payload_len;
// support for cc256x power commands and ehcill
int command_injected = bt_control_cc256x_update_command(hci_cmd_buffer);
// control power commands and ehcill
update_init_script_command(hci_cmd_buffer);
if (command_injected){
// stay at this command
init_script_offset = current_offset;
}
return BTSTACK_CHIPSET_VALID_COMMAND;
}
return 1;
// MARK: public API
void btstack_chipset_cc256x_enable_ehcill(int on){
init_ehcill_enabled = on;
}
int btstack_chipset_cc256x_ehcill_enabled(void){
return init_ehcill_enabled;
}
void btstack_chipset_cc256x_set_power(int16_t power_in_dB){
init_power_in_dB = power_in_dB;
}
static const btstack_chipset_t btstack_chipset_cc256x = {
"CC256x",
chipset_init,
chipset_next_command,
chipset_set_baudrate_command,
NULL, // set bd addr command not available or impemented
};
const btstack_chipset_t * btstack_chipset_cc256x_instance(void){
return &btstack_chipset_cc256x;
}
//
// @deprecated
//
static int bt_control_cc256x_next_cmd(void *config, uint8_t *hci_cmd_buffer){
return (int) chipset_next_command(hci_cmd_buffer);
}
// UART Baud Rate control from: http://e2e.ti.com/support/low_power_rf/f/660/p/134850/484763.aspx
static int bt_control_cc256x_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
chipset_set_baudrate_command(baudrate, hci_cmd_buffer);
return 0;
}
static int bt_control_cc256x_on(void *config){
chipset_init(config);
return 0;
}
void bt_control_cc256x_enable_ehcill(int on){
btstack_chipset_cc256x_enable_ehcill(on);
}
int bt_control_cc256x_ehcill_enabled(void){
return btstack_chipset_cc256x_ehcill_enabled();
}
void bt_control_cc256x_set_power(int16_t power_in_dB){
btstack_chipset_cc256x_set_power(power_in_dB);
}
// MARK: const structs
@ -287,26 +339,13 @@ static const bt_control_t bt_control_cc256x = {
NULL, // wake
NULL, // valid
NULL, // name
cc256x_baudrate_cmd, // baudrate_cmd
bt_control_cc256x_baudrate_cmd, // baudrate_cmd
bt_control_cc256x_next_cmd, // next_cmd
NULL, // register_for_power_notifications
NULL, // hw_error
NULL, // set_bd_addr_cmd
};
// MARK: public API
void bt_control_cc256x_enable_ehcill(int on){
init_ehcill_enabled = on;
}
int bt_control_cc256x_ehcill_enabled(void){
return init_ehcill_enabled;
}
void bt_control_cc256x_set_power(int16_t power_in_dB){
init_power_in_dB = power_in_dB;
}
bt_control_t *bt_control_cc256x_instance(void){
return (bt_control_t*) &bt_control_cc256x;
}

13
chipset/cc256x/bt_control_cc256x.h
View File

@ -51,11 +51,18 @@ extern "C" {
#include "btstack_control.h"
#include "btstack_chipset.h"
bt_control_t *bt_control_cc256x_instance(void);
// old
void bt_control_cc256x_set_power(int16_t power_in_dB);
void bt_control_cc256x_enable_ehcill(int on);
int bt_control_cc256x_ehcill_enabled(void);
int bt_control_cc256x_ehcill_enabled(void);
bt_control_t *bt_control_cc256x_instance(void);
// new
void btstack_chipset_cc256x_enable_ehcill(int on);
int btstack_chipset_cc256x_ehcill_enabled(void);
void btstack_chipset_cc256x_set_power(int16_t power_in_dB);
const btstack_chipset_t * btstack_chipset_cc256x_instance(void);
#if defined __cplusplus
}

59
chipset/csr/bt_control_csr.c
View File

@ -51,6 +51,7 @@
#include "btstack_control.h"
#include "btstack_debug.h"
#include "btstack_util.h"
#include "hci_transport.h"
// minimal CSR init script to configure PSKEYs and activate them
static const uint8_t init_script[] = {
@ -67,24 +68,29 @@ static const uint16_t init_script_size = sizeof(init_script);
//
static uint32_t init_script_offset = 0;
static hci_transport_config_uart_t * hci_transport_config_uart = NULL;
static int bt_control_csr_on(void *config){
init_script_offset = 0;
return 0;
static void chipset_init(void * config){
init_script_offset = 0;
hci_transport_config_uart = NULL;
// check for hci_transport_config_uart_t
if (!config) return;
if (((hci_transport_config_t*)config)->type != HCI_TRANSPORT_CONFIG_UART) return;
hci_transport_config_uart = (hci_transport_config_uart_t*) config;
}
static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
}
// set requested baud rate
static void bt_control_csr_update_command(void *config, uint8_t *hci_cmd_buffer){
static void update_init_script_command(uint8_t *hci_cmd_buffer){
uint16_t varid = READ_BT_16(hci_cmd_buffer, 10);
if (varid != 0x7003) return;
uint16_t key = READ_BT_16(hci_cmd_buffer, 14);
if (key != 0x01ea) return;
// check for hci_transport_config_uart_t
if (!config) return;
if (((hci_transport_config_t*)config)->type != HCI_TRANSPORT_CONFIG_UART) return;
hci_transport_config_uart_t * hci_transport_config_uart = (hci_transport_config_uart_t*) config;
// check for baud rate
if (!hci_transport_config_uart) return;
uint32_t baudrate = hci_transport_config_uart->baudrate_main;
if (baudrate == 0){
baudrate = hci_transport_config_uart->baudrate_init;
@ -94,10 +100,10 @@ static void bt_control_csr_update_command(void *config, uint8_t *hci_cmd_buffer)
bt_store_16(hci_cmd_buffer, 22, baudrate & 0xffff);
}
static int bt_control_csr_next_cmd(void *config, uint8_t *hci_cmd_buffer){
static btstack_chipset_result_t chipset_next_command(uint8_t * hci_cmd_buffer){
if (init_script_offset >= init_script_size) {
return 0;
return BTSTACK_CHIPSET_DONE;
}
// init script is stored with the HCI Command Packet Type
@ -110,7 +116,7 @@ static int bt_control_csr_next_cmd(void *config, uint8_t *hci_cmd_buffer){
memcpy(&hci_cmd_buffer[3], (uint8_t *) &init_script[init_script_offset], payload_len);
// support for on-the-fly configuration updates
bt_control_csr_update_command(config, hci_cmd_buffer);
update_init_script_command(hci_cmd_buffer);
init_script_offset += payload_len;
@ -118,10 +124,35 @@ static int bt_control_csr_next_cmd(void *config, uint8_t *hci_cmd_buffer){
uint16_t varid = READ_BT_16(hci_cmd_buffer, 10);
log_info("csr: varid 0x%04x", varid);
if (varid == 0x4002){
return 2;
return BTSTACK_CHIPSET_WARMSTART_REQUIRED;
}
return 1;
return BTSTACK_CHIPSET_VALID_COMMAND;
}
static const btstack_chipset_t btstack_chipset_bcm = {
"BCM",
chipset_init,
chipset_next_command,
chipset_set_baudrate_command,
NULL, // chipset_set_bd_addr_command not supported or implemented
};
// MARK: public API
const btstack_chipset_t * btstack_chipset_csr_instance(void){
return &btstack_chipset_bcm;
}
// DEPRECATED
static int bt_control_csr_on(void *config){
chipset_init(config);
return 0;
}
static int bt_control_csr_next_cmd(void *config, uint8_t *hci_cmd_buffer){
return (int) chipset_next_command(hci_cmd_buffer);
}
// MARK: const structs

1
chipset/csr/bt_control_csr.h
View File

@ -53,6 +53,7 @@ extern "C" {
#include "btstack_chipset.h"
bt_control_t * bt_control_csr_instance(void);
const btstack_chipset_t * btstack_chipset_csr_instance(void);
#if defined __cplusplus
}

26
chipset/em9301/bt_control_em9301.c
View File

@ -48,16 +48,38 @@
#include <stddef.h> /* NULL */
#include <stdio.h>
#include <string.h> /* memcpy */
#include <string.h> /* memcpy */
#include "hci.h"
// should go to some common place
#define OPCODE(ogf, ocf) (ocf | ogf << 10)
static int em9301_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
bt_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x02));
hci_cmd_buffer[2] = 0x06;
bt_flip_addr(&hci_cmd_buffer[3], addr);
}
static const btstack_chipset_t btstack_chipset_em9301 = {
"EM9301",
NULL, // chipset_init not used
NULL, // chipset_next_command not used
NULL, // chipset_set_baudrate_command not needed as we're connected via SPI
chipset_set_bd_addr_command,
};
// MARK: public API
const btstack_chipset_t * btstack_chipset_em9301_instance(void){
return &btstack_chipset_em9301;
}
//
// deprecated
//
static int em9301_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
chipset_set_bd_addr_command(addr, hci_cmd_buffer);
return 0;
}

1
chipset/em9301/bt_control_em9301.h
View File

@ -54,6 +54,7 @@ extern "C" {
#include "btstack_chipset.h"
bt_control_t *bt_control_em9301_instance(void);
const btstack_chipset_t * btstack_chipset_em9301_instance(void);
#if defined __cplusplus
}

79
chipset/stlc2500d/bt_control_stlc2500d.c
View File

@ -54,53 +54,78 @@
// should go to some common place
#define OPCODE(ogf, ocf) (ocf | ogf << 10)
static int stlc2500d_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
// map baud rate to predefined settings
int preset = 0;
switch (baudrate){
case 57600:
preset = 0x0e;
break;
static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
// map baud rate to predefined settings
int preset = 0;
switch (baudrate){
case 57600:
preset = 0x0e;
break;
case 115200:
preset = 0x10;
break;
preset = 0x10;
break;
case 230400:
preset = 0x12;
break;
preset = 0x12;
break;
case 460800:
preset = 0x13;
break;
preset = 0x13;
break;
case 921600:
preset = 0x14;
break;
preset = 0x14;
break;
case 1843200:
preset = 0x16;
break;
preset = 0x16;
break;
case 2000000:
preset = 0x19;
break;
preset = 0x19;
break;
case 3000000:
preset = 0x1b;
break;
preset = 0x1b;
break;
case 4000000:
preset = 0x1f;
break;
preset = 0x1f;
break;
default:
log_error("stlc2500d_baudrate_cmd baudrate %u not supported", baudrate);
return 1;
log_error("stlc2500d_baudrate_cmd baudrate %u not supported", baudrate);
return;
}
bt_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0xfc));
hci_cmd_buffer[2] = 0x01;
hci_cmd_buffer[3] = preset;
return 0;
}
static int stlc2500d_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
bt_store_16(hci_cmd_buffer, 0, OPCODE(OGF_VENDOR, 0x22));
hci_cmd_buffer[2] = 0x08;
hci_cmd_buffer[3] = 254;
hci_cmd_buffer[4] = 0x06;
bt_flip_addr(&hci_cmd_buffer[5], addr);
}
static const btstack_chipset_t btstack_chipset_bcm = {
"BCM",
NULL, // chipset_init,
NULL, // chipset_next_command,
chipset_set_baudrate_command,
chipset_set_bd_addr_command,
};
// MARK: public API
const btstack_chipset_t * btstack_chipset_bcm_instance(void){
return &btstack_chipset_bcm;
}
//
// deprecated
//
static int stlc2500d_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
chipset_set_baudrate_command(baudrate, hci_cmd_buffer);
return 0;
}
static int stlc2500d_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
chipset_set_bd_addr_command(addr, hci_cmd_buffer);
return 0;
}

1
chipset/stlc2500d/bt_control_stlc2500d.h
View File

@ -54,6 +54,7 @@ extern "C" {
#include "btstack_chipset.h"
bt_control_t *bt_control_stlc2500d_instance(void);
const btstack_chipset_t * btstack_chipset_stlc2500d_instance(void);
#if defined __cplusplus
}

36
chipset/tc3556x/bt_control_tc3566x.c
View File

@ -59,8 +59,7 @@
static const uint8_t baudrate_command[] = { 0x08, 0xfc, 0x11, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x14, 0x42, 0xff, 0x10, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
// baud rate command for tc3566x
static int tc35661_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
static void chipset_set_baudrate_command(uint32_t baudrate, uint8_t *hci_cmd_buffer){
uint16_t div1 = 0;
uint8_t div2 = 0;
switch (baudrate) {
@ -82,21 +81,48 @@ static int tc35661_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_c
break;
default:
log_error("tc3566x_baudrate_cmd baudrate %u not supported", baudrate);
return 1;
return;
}
memcpy(hci_cmd_buffer, baudrate_command, sizeof(baudrate_command));
bt_store_16(hci_cmd_buffer, 13, div1);
hci_cmd_buffer[15] = div2;
return 0;
}
static int tc3566x_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
static void chipset_set_bd_addr_command(bd_addr_t addr, uint8_t *hci_cmd_buffer){
// OGF 0x04 - Informational Parameters, OCF 0x10
hci_cmd_buffer[0] = 0x13;
hci_cmd_buffer[1] = 0x10;
hci_cmd_buffer[2] = 0x06;
bt_flip_addr(&hci_cmd_buffer[3], addr);
}
static const btstack_chipset_t btstack_chipset_bcm = {
"TC3556x",
NULL, // chipset_init,
NULL, // chipset_next_command,
chipset_set_baudrate_command,
chipset_set_bd_addr_command,
};
// MARK: public API
const btstack_chipset_t * btstack_chipset_bcm_instance(void){
return &btstack_chipset_bcm;
}
//
// deprecated
//
// baud rate command for tc3566x
static int tc35661_baudrate_cmd(void * config, uint32_t baudrate, uint8_t *hci_cmd_buffer){
chipset_set_baudrate_command(baudrate, hci_cmd_buffer);
return 0;
}
static int tc3566x_set_bd_addr_cmd(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer){
chipset_set_bd_addr_command(addr, hci_cmd_buffer);
return 0;
}

1
chipset/tc3556x/bt_control_tc3566x.h
View File

@ -56,6 +56,7 @@ extern "C" {
#include "btstack_chipset.h"
bt_control_t *bt_control_tc3566x_instance(void);
const btstack_chipset_t * btstack_chipset_tc3566x_instance(void);
#if defined __cplusplus
}

8
src/btstack_chipset.h
View File

@ -58,6 +58,7 @@ typedef enum {
BTSTACK_CHIPSET_WARMSTART_REQUIRED,
} btstack_chipset_result_t;
typedef struct {
/**
* chipset driver name
@ -76,21 +77,20 @@ typedef struct {
* @param hci_cmd_buffer to store generated command
* @return result see btstack_chipset_result_t
*/
btstack_chipset_result_t (*next_cmd)(uint8_t * hci_cmd_buffer);
btstack_chipset_result_t (*next_command)(uint8_t * hci_cmd_buffer);
/**
* provide UART Baud Rate change command.
* @param baudrate
* @param hci_cmd_buffer to store generated command
*/
void (*baudrate_cmd)(uint32_t baudrate, uint8_t *hci_cmd_buffer);
void (*set_baudrate_command)(uint32_t baudrate, uint8_t *hci_cmd_buffer);
/** provide Set BD Addr command
* @param baudrate
* @param hci_cmd_buffer to store generated command
*/
void (*set_bd_addr_cmd)(void * config, bd_addr_t addr, uint8_t *hci_cmd_buffer);
void (*set_bd_addr_command)(bd_addr_t addr, uint8_t *hci_cmd_buffer);
} btstack_chipset_t;