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stm32f4-discovery-cc256x: add port files

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Matthias Ringwald 2019-03-07 18:25:47 +01:00
parent 66edff8b4b
commit 4d26f5ee53
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port/stm32-f4discovery-cc256x-2/port/bsp/audio.c Normal file
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#include "stm32f4_discovery_audio.h"
// support for I2S/I2C CS43L22 codec is provided by bsp/stm32f4_discovery_audio.c and not by STM32CubeMX
// we need to provide the missing IRQ handler somewhere
extern I2S_HandleTypeDef hAudioOutI2s;
extern I2S_HandleTypeDef hAudioInI2s;
/**
* @brief This function handles main I2S interrupt.
* @param None
* @retval 0 if correct communication, else wrong communication
*/
void DMA1_Stream7_IRQHandler(void)
{
HAL_DMA_IRQHandler(hAudioOutI2s.hdmatx);
}
/**
* @brief This function handles main I2S interrupt.
* @param None
* @retval 0 if correct communication, else wrong communication
*/
void DMA1_Stream3_IRQHandler(void)
{
HAL_DMA_IRQHandler(hAudioInI2s.hdmarx);
}

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port/stm32-f4discovery-cc256x-2/port/bsp/audio.h Normal file
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/**
******************************************************************************
* @file audio.h
* @author MCD Application Team
* @version V4.0.1
* @date 21-July-2015
* @brief This header file contains the common defines and functions prototypes
* for the Audio driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __AUDIO_H
#define __AUDIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include <stdint.h>
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup AUDIO
* @{
*/
/** @defgroup AUDIO_Exported_Constants
* @{
*/
/* Codec audio Standards */
#define CODEC_STANDARD 0x04
#define I2S_STANDARD I2S_STANDARD_PHILIPS
/**
* @}
*/
/** @defgroup AUDIO_Exported_Types
* @{
*/
/** @defgroup AUDIO_Driver_structure Audio Driver structure
* @{
*/
typedef struct
{
uint32_t (*Init)(uint16_t, uint16_t, uint8_t, uint32_t);
void (*DeInit)(void);
uint32_t (*ReadID)(uint16_t);
uint32_t (*Play)(uint16_t, uint16_t*, uint16_t);
uint32_t (*Pause)(uint16_t);
uint32_t (*Resume)(uint16_t);
uint32_t (*Stop)(uint16_t, uint32_t);
uint32_t (*SetFrequency)(uint16_t, uint32_t);
uint32_t (*SetVolume)(uint16_t, uint8_t);
uint32_t (*SetMute)(uint16_t, uint32_t);
uint32_t (*SetOutputMode)(uint16_t, uint8_t);
uint32_t (*Reset)(uint16_t);
}AUDIO_DrvTypeDef;
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __AUDIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file cs43l22.c
* @author MCD Application Team
* @version V2.0.2
* @date 06-October-2015
* @brief This file provides the CS43L22 Audio Codec driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "cs43l22.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup Components
* @{
*/
/** @addtogroup CS43L22
* @brief This file provides a set of functions needed to drive the
* CS43L22 audio codec.
* @{
*/
/** @defgroup CS43L22_Private_Types
* @{
*/
/**
* @}
*/
/** @defgroup CS43L22_Private_Defines
* @{
*/
#define VOLUME_CONVERT(Volume) (((Volume) > 100)? 100:((uint8_t)(((Volume) * 255) / 100)))
/* Uncomment this line to enable verifying data sent to codec after each write
operation (for debug purpose) */
#if !defined (VERIFY_WRITTENDATA)
/* #define VERIFY_WRITTENDATA */
#endif /* VERIFY_WRITTENDATA */
/**
* @}
*/
/** @defgroup CS43L22_Private_Macros
* @{
*/
/**
* @}
*/
/** @defgroup CS43L22_Private_Variables
* @{
*/
/* Audio codec driver structure initialization */
AUDIO_DrvTypeDef cs43l22_drv =
{
cs43l22_Init,
cs43l22_DeInit,
cs43l22_ReadID,
cs43l22_Play,
cs43l22_Pause,
cs43l22_Resume,
cs43l22_Stop,
cs43l22_SetFrequency,
cs43l22_SetVolume,
cs43l22_SetMute,
cs43l22_SetOutputMode,
cs43l22_Reset,
};
static uint8_t Is_cs43l22_Stop = 1;
volatile uint8_t OutputDev = 0;
/**
* @}
*/
/** @defgroup CS43L22_Function_Prototypes
* @{
*/
static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
/**
* @}
*/
/** @defgroup CS43L22_Private_Functions
* @{
*/
/**
* @brief Initializes the audio codec and the control interface.
* @param DeviceAddr: Device address on communication Bus.
* @param OutputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE,
* OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO .
* @param Volume: Initial volume level (from 0 (Mute) to 100 (Max))
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq)
{
uint32_t counter = 0;
/* Initialize the Control interface of the Audio Codec */
AUDIO_IO_Init();
/* Keep Codec powered OFF */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x01);
/*Save Output device for mute ON/OFF procedure*/
switch (OutputDevice)
{
case OUTPUT_DEVICE_SPEAKER:
OutputDev = 0xFA;
break;
case OUTPUT_DEVICE_HEADPHONE:
OutputDev = 0xAF;
break;
case OUTPUT_DEVICE_BOTH:
OutputDev = 0xAA;
break;
case OUTPUT_DEVICE_AUTO:
OutputDev = 0x05;
break;
default:
OutputDev = 0x05;
break;
}
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
/* Clock configuration: Auto detection */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_CLOCKING_CTL, 0x81);
/* Set the Slave Mode and the audio Standard */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_INTERFACE_CTL1, CODEC_STANDARD);
/* Set the Master volume */
counter += cs43l22_SetVolume(DeviceAddr, Volume);
/* If the Speaker is enabled, set the Mono mode and volume attenuation level */
if(OutputDevice != OUTPUT_DEVICE_HEADPHONE)
{
/* Set the Speaker Mono mode */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PLAYBACK_CTL2, 0x06);
/* Set the Speaker attenuation level */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_SPEAKER_A_VOL, 0x00);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_SPEAKER_B_VOL, 0x00);
}
/* Additional configuration for the CODEC. These configurations are done to reduce
the time needed for the Codec to power off. If these configurations are removed,
then a long delay should be added between powering off the Codec and switching
off the I2S peripheral MCLK clock (which is the operating clock for Codec).
If this delay is not inserted, then the codec will not shut down properly and
it results in high noise after shut down. */
/* Disable the analog soft ramp */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_ANALOG_ZC_SR_SETT, 0x00);
/* Disable the digital soft ramp */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x04);
/* Disable the limiter attack level */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_LIMIT_CTL1, 0x00);
/* Adjust Bass and Treble levels */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_TONE_CTL, 0x0F);
/* Adjust PCM volume level */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PCMA_VOL, 0x0A);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_PCMB_VOL, 0x0A);
/* Return communication control value */
return counter;
}
/**
* @brief Deinitializes the audio codec.
* @param None
* @retval None
*/
void cs43l22_DeInit(void)
{
/* Deinitialize Audio Codec interface */
AUDIO_IO_DeInit();
}
/**
* @brief Get the CS43L22 ID.
* @param DeviceAddr: Device address on communication Bus.
* @retval The CS43L22 ID
*/
uint32_t cs43l22_ReadID(uint16_t DeviceAddr)
{
uint8_t Value;
/* Initialize the Control interface of the Audio Codec */
AUDIO_IO_Init();
Value = AUDIO_IO_Read(DeviceAddr, CS43L22_CHIPID_ADDR);
Value = (Value & CS43L22_ID_MASK);
return((uint32_t) Value);
}
/**
* @brief Start the audio Codec play feature.
* @note For this codec no Play options are required.
* @param DeviceAddr: Device address on communication Bus.
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size)
{
uint32_t counter = 0;
if(Is_cs43l22_Stop == 1)
{
/* Enable the digital soft ramp */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x06);
/* Enable Output device */
counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
/* Power on the Codec */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9E);
Is_cs43l22_Stop = 0;
}
/* Return communication control value */
return counter;
}
/**
* @brief Pauses playing on the audio codec.
* @param DeviceAddr: Device address on communication Bus.
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_Pause(uint16_t DeviceAddr)
{
uint32_t counter = 0;
/* Pause the audio file playing */
/* Mute the output first */
counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_ON);
/* Put the Codec in Power save mode */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x01);
return counter;
}
/**
* @brief Resumes playing on the audio codec.
* @param DeviceAddr: Device address on communication Bus.
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_Resume(uint16_t DeviceAddr)
{
uint32_t counter = 0;
volatile uint32_t index = 0x00;
/* Resumes the audio file playing */
/* Unmute the output first */
counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_OFF);
for(index = 0x00; index < 0xFF; index++);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
/* Exit the Power save mode */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9E);
return counter;
}
/**
* @brief Stops audio Codec playing. It powers down the codec.
* @param DeviceAddr: Device address on communication Bus.
* @param CodecPdwnMode: selects the power down mode.
* - CODEC_PDWN_HW: Physically power down the codec. When resuming from this
* mode, the codec is set to default configuration
* (user should re-Initialize the codec in order to
* play again the audio stream).
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_Stop(uint16_t DeviceAddr, uint32_t CodecPdwnMode)
{
uint32_t counter = 0;
/* Mute the output first */
counter += cs43l22_SetMute(DeviceAddr, AUDIO_MUTE_ON);
/* Disable the digital soft ramp */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MISC_CTL, 0x04);
/* Power down the DAC and the speaker (PMDAC and PMSPK bits)*/
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL1, 0x9F);
Is_cs43l22_Stop = 1;
return counter;
}
/**
* @brief Sets higher or lower the codec volume level.
* @param DeviceAddr: Device address on communication Bus.
* @param Volume: a byte value from 0 to 255 (refer to codec registers
* description for more details).
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_SetVolume(uint16_t DeviceAddr, uint8_t Volume)
{
uint32_t counter = 0;
uint8_t convertedvol = VOLUME_CONVERT(Volume);
if(Volume > 0xE6)
{
/* Set the Master volume */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_A_VOL, convertedvol - 0xE7);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_B_VOL, convertedvol - 0xE7);
}
else
{
/* Set the Master volume */
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_A_VOL, convertedvol + 0x19);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_MASTER_B_VOL, convertedvol + 0x19);
}
return counter;
}
/**
* @brief Sets new frequency.
* @param DeviceAddr: Device address on communication Bus.
* @param AudioFreq: Audio frequency used to play the audio stream.
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq)
{
return 0;
}
/**
* @brief Enables or disables the mute feature on the audio codec.
* @param DeviceAddr: Device address on communication Bus.
* @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the
* mute mode.
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_SetMute(uint16_t DeviceAddr, uint32_t Cmd)
{
uint32_t counter = 0;
/* Set the Mute mode */
if(Cmd == AUDIO_MUTE_ON)
{
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xFF);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_A_VOL, 0x01);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_B_VOL, 0x01);
}
else /* AUDIO_MUTE_OFF Disable the Mute */
{
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_A_VOL, 0x00);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_HEADPHONE_B_VOL, 0x00);
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, OutputDev);
}
return counter;
}
/**
* @brief Switch dynamically (while audio file is played) the output target
* (speaker or headphone).
* @note This function modifies a global variable of the audio codec driver: OutputDev.
* @param DeviceAddr: Device address on communication Bus.
* @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER,
* OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_SetOutputMode(uint16_t DeviceAddr, uint8_t Output)
{
uint32_t counter = 0;
switch (Output)
{
case OUTPUT_DEVICE_SPEAKER:
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xFA); /* SPK always ON & HP always OFF */
OutputDev = 0xFA;
break;
case OUTPUT_DEVICE_HEADPHONE:
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xAF); /* SPK always OFF & HP always ON */
OutputDev = 0xAF;
break;
case OUTPUT_DEVICE_BOTH:
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0xAA); /* SPK always ON & HP always ON */
OutputDev = 0xAA;
break;
case OUTPUT_DEVICE_AUTO:
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0x05); /* Detect the HP or the SPK automatically */
OutputDev = 0x05;
break;
default:
counter += CODEC_IO_Write(DeviceAddr, CS43L22_REG_POWER_CTL2, 0x05); /* Detect the HP or the SPK automatically */
OutputDev = 0x05;
break;
}
return counter;
}
/**
* @brief Resets cs43l22 registers.
* @param DeviceAddr: Device address on communication Bus.
* @retval 0 if correct communication, else wrong communication
*/
uint32_t cs43l22_Reset(uint16_t DeviceAddr)
{
return 0;
}
/**
* @brief Writes/Read a single data.
* @param Addr: I2C address
* @param Reg: Reg address
* @param Value: Data to be written
* @retval None
*/
static uint8_t CODEC_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value)
{
uint32_t result = 0;
AUDIO_IO_Write(Addr, Reg, Value);
#ifdef VERIFY_WRITTENDATA
/* Verify that the data has been correctly written */
result = (AUDIO_IO_Read(Addr, Reg) == Value)? 0:1;
#endif /* VERIFY_WRITTENDATA */
return result;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file cs43l22.h
* @author MCD Application Team
* @version V2.0.2
* @date 06-October-2015
* @brief This file contains all the functions prototypes for the cs43l22.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __CS43L22_H
#define __CS43L22_H
/* Includes ------------------------------------------------------------------*/
#include "audio.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup Component
* @{
*/
/** @addtogroup CS43L22
* @{
*/
/** @defgroup CS43L22_Exported_Types
* @{
*/
/**
* @}
*/
/** @defgroup CS43L22_Exported_Constants
* @{
*/
/******************************************************************************/
/*************************** Codec User defines ******************************/
/******************************************************************************/
/* Codec output DEVICE */
#define OUTPUT_DEVICE_SPEAKER 1
#define OUTPUT_DEVICE_HEADPHONE 2
#define OUTPUT_DEVICE_BOTH 3
#define OUTPUT_DEVICE_AUTO 4
/* Volume Levels values */
#define DEFAULT_VOLMIN 0x00
#define DEFAULT_VOLMAX 0xFF
#define DEFAULT_VOLSTEP 0x04
#define AUDIO_PAUSE 0
#define AUDIO_RESUME 1
/* Codec POWER DOWN modes */
#define CODEC_PDWN_HW 1
#define CODEC_PDWN_SW 2
/* MUTE commands */
#define AUDIO_MUTE_ON 1
#define AUDIO_MUTE_OFF 0
/* AUDIO FREQUENCY */
#define AUDIO_FREQUENCY_192K ((uint32_t)192000)
#define AUDIO_FREQUENCY_96K ((uint32_t)96000)
#define AUDIO_FREQUENCY_48K ((uint32_t)48000)
#define AUDIO_FREQUENCY_44K ((uint32_t)44100)
#define AUDIO_FREQUENCY_32K ((uint32_t)32000)
#define AUDIO_FREQUENCY_22K ((uint32_t)22050)
#define AUDIO_FREQUENCY_16K ((uint32_t)16000)
#define AUDIO_FREQUENCY_11K ((uint32_t)11025)
#define AUDIO_FREQUENCY_8K ((uint32_t)8000)
/** CS43l22 Registers ***/
#define CS43L22_REG_ID 0x01
#define CS43L22_REG_POWER_CTL1 0x02
#define CS43L22_REG_POWER_CTL2 0x04
#define CS43L22_REG_CLOCKING_CTL 0x05
#define CS43L22_REG_INTERFACE_CTL1 0x06
#define CS43L22_REG_INTERFACE_CTL2 0x07
#define CS43L22_REG_PASSTHR_A_SELECT 0x08
#define CS43L22_REG_PASSTHR_B_SELECT 0x09
#define CS43L22_REG_ANALOG_ZC_SR_SETT 0x0A
#define CS43L22_REG_PASSTHR_GANG_CTL 0x0C
#define CS43L22_REG_PLAYBACK_CTL1 0x0D
#define CS43L22_REG_MISC_CTL 0x0E
#define CS43L22_REG_PLAYBACK_CTL2 0x0F
#define CS43L22_REG_PASSTHR_A_VOL 0x14
#define CS43L22_REG_PASSTHR_B_VOL 0x15
#define CS43L22_REG_PCMA_VOL 0x1A
#define CS43L22_REG_PCMB_VOL 0x1B
#define CS43L22_REG_BEEP_FREQ_ON_TIME 0x1C
#define CS43L22_REG_BEEP_VOL_OFF_TIME 0x1D
#define CS43L22_REG_BEEP_TONE_CFG 0x1E
#define CS43L22_REG_TONE_CTL 0x1F
#define CS43L22_REG_MASTER_A_VOL 0x20
#define CS43L22_REG_MASTER_B_VOL 0x21
#define CS43L22_REG_HEADPHONE_A_VOL 0x22
#define CS43L22_REG_HEADPHONE_B_VOL 0x23
#define CS43L22_REG_SPEAKER_A_VOL 0x24
#define CS43L22_REG_SPEAKER_B_VOL 0x25
#define CS43L22_REG_CH_MIXER_SWAP 0x26
#define CS43L22_REG_LIMIT_CTL1 0x27
#define CS43L22_REG_LIMIT_CTL2 0x28
#define CS43L22_REG_LIMIT_ATTACK_RATE 0x29
#define CS43L22_REG_OVF_CLK_STATUS 0x2E
#define CS43L22_REG_BATT_COMPENSATION 0x2F
#define CS43L22_REG_VP_BATTERY_LEVEL 0x30
#define CS43L22_REG_SPEAKER_STATUS 0x31
#define CS43L22_REG_TEMPMONITOR_CTL 0x32
#define CS43L22_REG_THERMAL_FOLDBACK 0x33
#define CS43L22_REG_CHARGE_PUMP_FREQ 0x34
/******************************************************************************/
/****************************** REGISTER MAPPING ******************************/
/******************************************************************************/
/**
* @brief CS43L22 ID
*/
#define CS43L22_ID 0xE0
#define CS43L22_ID_MASK 0xF8
/**
* @brief Chip ID Register: Chip I.D. and Revision Register
* Read only register
* Default value: 0x01
* [7:3] CHIPID[4:0]: I.D. code for the CS43L22.
* Default value: 11100b
* [2:0] REVID[2:0]: CS43L22 revision level.
* Default value:
* 000 - Rev A0
* 001 - Rev A1
* 010 - Rev B0
* 011 - Rev B1
*/
#define CS43L22_CHIPID_ADDR 0x01
/**
* @}
*/
/** @defgroup CS43L22_Exported_Macros
* @{
*/
/**
* @}
*/
/** @defgroup CS43L22_Exported_Functions
* @{
*/
/*------------------------------------------------------------------------------
Audio Codec functions
------------------------------------------------------------------------------*/
/* High Layer codec functions */
uint32_t cs43l22_Init(uint16_t DeviceAddr, uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq);
void cs43l22_DeInit(void);
uint32_t cs43l22_ReadID(uint16_t DeviceAddr);
uint32_t cs43l22_Play(uint16_t DeviceAddr, uint16_t* pBuffer, uint16_t Size);
uint32_t cs43l22_Pause(uint16_t DeviceAddr);
uint32_t cs43l22_Resume(uint16_t DeviceAddr);
uint32_t cs43l22_Stop(uint16_t DeviceAddr, uint32_t Cmd);
uint32_t cs43l22_SetVolume(uint16_t DeviceAddr, uint8_t Volume);
uint32_t cs43l22_SetFrequency(uint16_t DeviceAddr, uint32_t AudioFreq);
uint32_t cs43l22_SetMute(uint16_t DeviceAddr, uint32_t Cmd);
uint32_t cs43l22_SetOutputMode(uint16_t DeviceAddr, uint8_t Output);
uint32_t cs43l22_Reset(uint16_t DeviceAddr);
/* AUDIO IO functions */
void AUDIO_IO_Init(void);
void AUDIO_IO_DeInit(void);
void AUDIO_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
uint8_t AUDIO_IO_Read(uint8_t Addr, uint8_t Reg);
/* Audio driver structure */
extern AUDIO_DrvTypeDef cs43l22_drv;
#endif /* __CS43L22_H */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm32f4_discovery.c
* @author MCD Application Team
* @version V2.1.2
* @date 27-January-2017
* @brief This file provides set of firmware functions to manage Leds and
* push-button available on STM32F4-Discovery Kit from STMicroelectronics.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f4_discovery.h"
/** @defgroup BSP BSP
* @{
*/
/** @defgroup STM32F4_DISCOVERY STM32F4 DISCOVERY
* @{
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL STM32F4 DISCOVERY LOW LEVEL
* @brief This file provides set of firmware functions to manage Leds and push-button
* available on STM32F4-Discovery Kit from STMicroelectronics.
* @{
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Private_TypesDefinitions STM32F4 DISCOVERY LOW LEVEL Private TypesDefinitions
* @{
*/
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Private_Defines STM32F4 DISCOVERY LOW LEVEL Private Defines
* @{
*/
/**
* @brief STM32F4 DISCO BSP Driver version number V2.1.2
*/
#define __STM32F4_DISCO_BSP_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F4_DISCO_BSP_VERSION_SUB1 (0x01) /*!< [23:16] sub1 version */
#define __STM32F4_DISCO_BSP_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
#define __STM32F4_DISCO_BSP_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F4_DISCO_BSP_VERSION ((__STM32F4_DISCO_BSP_VERSION_MAIN << 24)\
|(__STM32F4_DISCO_BSP_VERSION_SUB1 << 16)\
|(__STM32F4_DISCO_BSP_VERSION_SUB2 << 8 )\
|(__STM32F4_DISCO_BSP_VERSION_RC))
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Private_Macros STM32F4 DISCOVERY LOW LEVEL Private Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Private_Variables STM32F4 DISCOVERY LOW LEVEL Private Variables
* @{
*/
GPIO_TypeDef* GPIO_PORT[LEDn] = {LED4_GPIO_PORT,
LED3_GPIO_PORT,
LED5_GPIO_PORT,
LED6_GPIO_PORT};
const uint16_t GPIO_PIN[LEDn] = {LED4_PIN,
LED3_PIN,
LED5_PIN,
LED6_PIN};
GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {KEY_BUTTON_GPIO_PORT};
const uint16_t BUTTON_PIN[BUTTONn] = {KEY_BUTTON_PIN};
const uint8_t BUTTON_IRQn[BUTTONn] = {KEY_BUTTON_EXTI_IRQn};
uint32_t I2cxTimeout = I2Cx_TIMEOUT_MAX; /*<! Value of Timeout when I2C communication fails */
uint32_t SpixTimeout = SPIx_TIMEOUT_MAX; /*<! Value of Timeout when SPI communication fails */
static SPI_HandleTypeDef SpiHandle;
static I2C_HandleTypeDef I2cHandle;
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Private_FunctionPrototypes STM32F4 DISCOVERY LOW LEVEL Private FunctionPrototypes
* @{
*/
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Private_Functions STM32F4 DISCOVERY LOW LEVEL Private Functions
* @{
*/
static void I2Cx_Init(void);
static void I2Cx_WriteData(uint8_t Addr, uint8_t Reg, uint8_t Value);
static uint8_t I2Cx_ReadData(uint8_t Addr, uint8_t Reg);
static void I2Cx_MspInit(void);
static void I2Cx_Error(uint8_t Addr);
static void SPIx_Init(void);
static void SPIx_MspInit(void);
static uint8_t SPIx_WriteRead(uint8_t Byte);
static void SPIx_Error(void);
/* Link functions for Accelerometer peripheral */
void ACCELERO_IO_Init(void);
void ACCELERO_IO_ITConfig(void);
void ACCELERO_IO_Write(uint8_t *pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite);
void ACCELERO_IO_Read(uint8_t *pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead);
/* Link functions for Audio peripheral */
void AUDIO_IO_Init(void);
void AUDIO_IO_DeInit(void);
void AUDIO_IO_Write(uint8_t Addr, uint8_t Reg, uint8_t Value);
uint8_t AUDIO_IO_Read(uint8_t Addr, uint8_t Reg);
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_LED_Functions STM32F4 DISCOVERY LOW LEVEL LED Functions
* @{
*/
/**
* @brief This method returns the STM32F4 DISCO BSP Driver revision
* @retval version : 0xXYZR (8bits for each decimal, R for RC)
*/
uint32_t BSP_GetVersion(void)
{
return __STM32F4_DISCO_BSP_VERSION;
}
/**
* @brief Configures LED GPIO.
* @param Led: Specifies the Led to be configured.
* This parameter can be one of following parameters:
* @arg LED4
* @arg LED3
* @arg LED5
* @arg LED6
*/
void BSP_LED_Init(Led_TypeDef Led)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Enable the GPIO_LED Clock */
LEDx_GPIO_CLK_ENABLE(Led);
/* Configure the GPIO_LED pin */
GPIO_InitStruct.Pin = GPIO_PIN[Led];
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
HAL_GPIO_Init(GPIO_PORT[Led], &GPIO_InitStruct);
HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_RESET);
}
/**
* @brief Turns selected LED On.
* @param Led: Specifies the Led to be set on.
* This parameter can be one of following parameters:
* @arg LED4
* @arg LED3
* @arg LED5
* @arg LED6
*/
void BSP_LED_On(Led_TypeDef Led)
{
HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_SET);
}
/**
* @brief Turns selected LED Off.
* @param Led: Specifies the Led to be set off.
* This parameter can be one of following parameters:
* @arg LED4
* @arg LED3
* @arg LED5
* @arg LED6
*/
void BSP_LED_Off(Led_TypeDef Led)
{
HAL_GPIO_WritePin(GPIO_PORT[Led], GPIO_PIN[Led], GPIO_PIN_RESET);
}
/**
* @brief Toggles the selected LED.
* @param Led: Specifies the Led to be toggled.
* This parameter can be one of following parameters:
* @arg LED4
* @arg LED3
* @arg LED5
* @arg LED6
*/
void BSP_LED_Toggle(Led_TypeDef Led)
{
HAL_GPIO_TogglePin(GPIO_PORT[Led], GPIO_PIN[Led]);
}
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_BUTTON_Functions STM32F4 DISCOVERY LOW LEVEL BUTTON Functions
* @{
*/
/**
* @brief Configures Button GPIO and EXTI Line.
* @param Button: Specifies the Button to be configured.
* This parameter should be: BUTTON_KEY
* @param Mode: Specifies Button mode.
* This parameter can be one of following parameters:
* @arg BUTTON_MODE_GPIO: Button will be used as simple IO
* @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt
* generation capability
*/
void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef Mode)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Enable the BUTTON Clock */
BUTTONx_GPIO_CLK_ENABLE(Button);
if (Mode == BUTTON_MODE_GPIO)
{
/* Configure Button pin as input */
GPIO_InitStruct.Pin = BUTTON_PIN[Button];
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
HAL_GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStruct);
}
if (Mode == BUTTON_MODE_EXTI)
{
/* Configure Button pin as input with External interrupt */
GPIO_InitStruct.Pin = BUTTON_PIN[Button];
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
HAL_GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStruct);
/* Enable and set Button EXTI Interrupt to the lowest priority */
HAL_NVIC_SetPriority((IRQn_Type)(BUTTON_IRQn[Button]), 0x0F, 0);
HAL_NVIC_EnableIRQ((IRQn_Type)(BUTTON_IRQn[Button]));
}
}
/**
* @brief Returns the selected Button state.
* @param Button: Specifies the Button to be checked.
* This parameter should be: BUTTON_KEY
* @retval The Button GPIO pin value.
*/
uint32_t BSP_PB_GetState(Button_TypeDef Button)
{
return HAL_GPIO_ReadPin(BUTTON_PORT[Button], BUTTON_PIN[Button]);
}
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_BUS_Functions STM32F4 DISCOVERY LOW LEVEL BUS Functions
* @{
*/
/*******************************************************************************
BUS OPERATIONS
*******************************************************************************/
/******************************* SPI Routines *********************************/
/**
* @brief SPIx Bus initialization
*/
static void SPIx_Init(void)
{
if(HAL_SPI_GetState(&SpiHandle) == HAL_SPI_STATE_RESET)
{
/* SPI configuration -----------------------------------------------------*/
SpiHandle.Instance = DISCOVERY_SPIx;
SpiHandle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
SpiHandle.Init.CLKPhase = SPI_PHASE_1EDGE;
SpiHandle.Init.CLKPolarity = SPI_POLARITY_LOW;
SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
SpiHandle.Init.CRCPolynomial = 7;
SpiHandle.Init.DataSize = SPI_DATASIZE_8BIT;
SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
SpiHandle.Init.NSS = SPI_NSS_SOFT;
SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
SpiHandle.Init.Mode = SPI_MODE_MASTER;
SPIx_MspInit();
HAL_SPI_Init(&SpiHandle);
}
}
/**
* @brief Sends a Byte through the SPI interface and return the Byte received
* from the SPI bus.
* @param Byte: Byte send.
* @retval The received byte value
*/
static uint8_t SPIx_WriteRead(uint8_t Byte)
{
uint8_t receivedbyte = 0;
/* Send a Byte through the SPI peripheral */
/* Read byte from the SPI bus */
if(HAL_SPI_TransmitReceive(&SpiHandle, (uint8_t*) &Byte, (uint8_t*) &receivedbyte, 1, SpixTimeout) != HAL_OK)
{
SPIx_Error();
}
return receivedbyte;
}
/**
* @brief SPIx error treatment function.
*/
static void SPIx_Error(void)
{
/* De-initialize the SPI communication bus */
HAL_SPI_DeInit(&SpiHandle);
/* Re-Initialize the SPI communication bus */
SPIx_Init();
}
/**
* @brief SPI MSP Init.
*/
static void SPIx_MspInit(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable the SPI peripheral */
DISCOVERY_SPIx_CLK_ENABLE();
/* Enable SCK, MOSI and MISO GPIO clocks */
DISCOVERY_SPIx_GPIO_CLK_ENABLE();
/* SPI SCK, MOSI, MISO pin configuration */
GPIO_InitStructure.Pin = (DISCOVERY_SPIx_SCK_PIN | DISCOVERY_SPIx_MISO_PIN | DISCOVERY_SPIx_MOSI_PIN);
GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
GPIO_InitStructure.Pull = GPIO_PULLDOWN;
GPIO_InitStructure.Speed = GPIO_SPEED_MEDIUM;
GPIO_InitStructure.Alternate = DISCOVERY_SPIx_AF;
HAL_GPIO_Init(DISCOVERY_SPIx_GPIO_PORT, &GPIO_InitStructure);
}
/******************************* I2C Routines**********************************/
/**
* @brief Configures I2C interface.
*/
static void I2Cx_Init(void)
{
if(HAL_I2C_GetState(&I2cHandle) == HAL_I2C_STATE_RESET)
{
/* DISCOVERY_I2Cx peripheral configuration */
I2cHandle.Init.ClockSpeed = BSP_I2C_SPEED;
I2cHandle.Init.DutyCycle = I2C_DUTYCYCLE_2;
I2cHandle.Init.OwnAddress1 = 0x33;
I2cHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
I2cHandle.Instance = DISCOVERY_I2Cx;
/* Init the I2C */
I2Cx_MspInit();
HAL_I2C_Init(&I2cHandle);
}
}
/**
* @brief Write a value in a register of the device through BUS.
* @param Addr: Device address on BUS Bus.
* @param Reg: The target register address to write
* @param Value: The target register value to be written
* @retval HAL status
*/
static void I2Cx_WriteData(uint8_t Addr, uint8_t Reg, uint8_t Value)
{
HAL_StatusTypeDef status = HAL_OK;
status = HAL_I2C_Mem_Write(&I2cHandle, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, &Value, 1, I2cxTimeout);
/* Check the communication status */
if(status != HAL_OK)
{
/* Execute user timeout callback */
I2Cx_Error(Addr);
}
}
/**
* @brief Read a register of the device through BUS
* @param Addr: Device address on BUS
* @param Reg: The target register address to read
* @retval HAL status
*/
static uint8_t I2Cx_ReadData(uint8_t Addr, uint8_t Reg)
{
HAL_StatusTypeDef status = HAL_OK;
uint8_t value = 0;
status = HAL_I2C_Mem_Read(&I2cHandle, Addr, (uint16_t)Reg, I2C_MEMADD_SIZE_8BIT, &value, 1,I2cxTimeout);
/* Check the communication status */
if(status != HAL_OK)
{
/* Execute user timeout callback */
I2Cx_Error(Addr);
}
return value;
}
/**
* @brief Manages error callback by re-initializing I2C.
* @param Addr: I2C Address
*/
static void I2Cx_Error(uint8_t Addr)
{
/* De-initialize the I2C communication bus */
HAL_I2C_DeInit(&I2cHandle);
/* Re-Initialize the I2C communication bus */
I2Cx_Init();
}
/**
* @brief I2C MSP Initialization
*/
static void I2Cx_MspInit(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Enable I2C GPIO clocks */
DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE();
/* DISCOVERY_I2Cx SCL and SDA pins configuration ---------------------------*/
GPIO_InitStruct.Pin = DISCOVERY_I2Cx_SCL_PIN | DISCOVERY_I2Cx_SDA_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Alternate = DISCOVERY_I2Cx_SCL_SDA_AF;
HAL_GPIO_Init(DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT, &GPIO_InitStruct);
/* Enable the DISCOVERY_I2Cx peripheral clock */
DISCOVERY_I2Cx_CLK_ENABLE();
/* Force the I2C peripheral clock reset */
DISCOVERY_I2Cx_FORCE_RESET();
/* Release the I2C peripheral clock reset */
DISCOVERY_I2Cx_RELEASE_RESET();
/* Enable and set I2Cx Interrupt to the highest priority */
HAL_NVIC_SetPriority(DISCOVERY_I2Cx_EV_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_EV_IRQn);
/* Enable and set I2Cx Interrupt to the highest priority */
HAL_NVIC_SetPriority(DISCOVERY_I2Cx_ER_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(DISCOVERY_I2Cx_ER_IRQn);
}
/*******************************************************************************
LINK OPERATIONS
*******************************************************************************/
/***************************** LINK ACCELEROMETER *****************************/
/**
* @brief Configures the Accelerometer SPI interface.
*/
void ACCELERO_IO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Configure the Accelerometer Control pins --------------------------------*/
/* Enable CS GPIO clock and configure GPIO pin for Accelerometer Chip select */
ACCELERO_CS_GPIO_CLK_ENABLE();
/* Configure GPIO PIN for LIS Chip select */
GPIO_InitStructure.Pin = ACCELERO_CS_PIN;
GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStructure.Pull = GPIO_NOPULL;
GPIO_InitStructure.Speed = GPIO_SPEED_MEDIUM;
HAL_GPIO_Init(ACCELERO_CS_GPIO_PORT, &GPIO_InitStructure);
/* Deselect: Chip Select high */
ACCELERO_CS_HIGH();
SPIx_Init();
}
/**
* @brief Configures the Accelerometer INT2.
* EXTI0 is already used by user button so INT1 is not configured here.
*/
void ACCELERO_IO_ITConfig(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* Enable INT2 GPIO clock and configure GPIO PINs to detect Interrupts */
ACCELERO_INT_GPIO_CLK_ENABLE();
/* Configure GPIO PINs to detect Interrupts */
GPIO_InitStructure.Pin = ACCELERO_INT2_PIN;
GPIO_InitStructure.Mode = GPIO_MODE_IT_RISING;
GPIO_InitStructure.Speed = GPIO_SPEED_FAST;
GPIO_InitStructure.Pull = GPIO_NOPULL;
HAL_GPIO_Init(ACCELERO_INT_GPIO_PORT, &GPIO_InitStructure);
/* Enable and set Accelerometer INT2 to the lowest priority */
HAL_NVIC_SetPriority((IRQn_Type)ACCELERO_INT2_EXTI_IRQn, 0x0F, 0);
HAL_NVIC_EnableIRQ((IRQn_Type)ACCELERO_INT2_EXTI_IRQn);
}
/**
* @brief Writes one byte to the Accelerometer.
* @param pBuffer: pointer to the buffer containing the data to be written to the Accelerometer.
* @param WriteAddr: Accelerometer's internal address to write to.
* @param NumByteToWrite: Number of bytes to write.
*/
void ACCELERO_IO_Write(uint8_t *pBuffer, uint8_t WriteAddr, uint16_t NumByteToWrite)
{
/* Configure the MS bit:
- When 0, the address will remain unchanged in multiple read/write commands.
- When 1, the address will be auto incremented in multiple read/write commands.
*/
if(NumByteToWrite > 0x01)
{
WriteAddr |= (uint8_t)MULTIPLEBYTE_CMD;
}
/* Set chip select Low at the start of the transmission */
ACCELERO_CS_LOW();
/* Send the Address of the indexed register */
SPIx_WriteRead(WriteAddr);
/* Send the data that will be written into the device (MSB First) */
while(NumByteToWrite >= 0x01)
{
SPIx_WriteRead(*pBuffer);
NumByteToWrite--;
pBuffer++;
}
/* Set chip select High at the end of the transmission */
ACCELERO_CS_HIGH();
}
/**
* @brief Reads a block of data from the Accelerometer.
* @param pBuffer: pointer to the buffer that receives the data read from the Accelerometer.
* @param ReadAddr: Accelerometer's internal address to read from.
* @param NumByteToRead: number of bytes to read from the Accelerometer.
*/
void ACCELERO_IO_Read(uint8_t *pBuffer, uint8_t ReadAddr, uint16_t NumByteToRead)
{
if(NumByteToRead > 0x01)
{
ReadAddr |= (uint8_t)(READWRITE_CMD | MULTIPLEBYTE_CMD);
}
else
{
ReadAddr |= (uint8_t)READWRITE_CMD;
}
/* Set chip select Low at the start of the transmission */
ACCELERO_CS_LOW();
/* Send the Address of the indexed register */
SPIx_WriteRead(ReadAddr);
/* Receive the data that will be read from the device (MSB First) */
while(NumByteToRead > 0x00)
{
/* Send dummy byte (0x00) to generate the SPI clock to ACCELEROMETER (Slave device) */
*pBuffer = SPIx_WriteRead(DUMMY_BYTE);
NumByteToRead--;
pBuffer++;
}
/* Set chip select High at the end of the transmission */
ACCELERO_CS_HIGH();
}
/********************************* LINK AUDIO *********************************/
/**
* @brief Initializes Audio low level.
*/
void AUDIO_IO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct;
/* Enable Reset GPIO Clock */
AUDIO_RESET_GPIO_CLK_ENABLE();
/* Audio reset pin configuration */
GPIO_InitStruct.Pin = AUDIO_RESET_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(AUDIO_RESET_GPIO, &GPIO_InitStruct);
I2Cx_Init();
/* Power Down the codec */
HAL_GPIO_WritePin(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, GPIO_PIN_RESET);
/* Wait for a delay to insure registers erasing */
HAL_Delay(5);
/* Power on the codec */
HAL_GPIO_WritePin(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, GPIO_PIN_SET);
/* Wait for a delay to insure registers erasing */
HAL_Delay(5);
}
/**
* @brief DeInitializes Audio low level.
*/
void AUDIO_IO_DeInit(void)
{
}
/**
* @brief Writes a single data.
* @param Addr: I2C address
* @param Reg: Reg address
* @param Value: Data to be written
*/
void AUDIO_IO_Write (uint8_t Addr, uint8_t Reg, uint8_t Value)
{
I2Cx_WriteData(Addr, Reg, Value);
}
/**
* @brief Reads a single data.
* @param Addr: I2C address
* @param Reg: Reg address
* @retval Data to be read
*/
uint8_t AUDIO_IO_Read(uint8_t Addr, uint8_t Reg)
{
return I2Cx_ReadData(Addr, Reg);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm32f4_discovery.h
* @author MCD Application Team
* @version V2.1.2
* @date 27-January-2017
* @brief This file contains definitions for STM32F4-Discovery Kit's Leds and
* push-button hardware resources.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4_DISCOVERY_H
#define __STM32F4_DISCOVERY_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx_hal.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32F4_DISCOVERY
* @{
*/
/** @addtogroup STM32F4_DISCOVERY_LOW_LEVEL
* @{
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Exported_Types STM32F4 DISCOVERY LOW LEVEL_Exported_Types
* @{
*/
typedef enum
{
LED4 = 0,
LED3 = 1,
LED5 = 2,
LED6 = 3
} Led_TypeDef;
typedef enum
{
BUTTON_KEY = 0,
} Button_TypeDef;
typedef enum
{
BUTTON_MODE_GPIO = 0,
BUTTON_MODE_EXTI = 1
} ButtonMode_TypeDef;
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Exported_Constants STM32F4 DISCOVERY LOW LEVEL Exported Constants
* @{
*/
/**
* @brief Define for STM32F4_DISCOVERY board
*/
#if !defined (USE_STM32F4_DISCO)
#define USE_STM32F4_DISCO
#endif
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_LED STM32F4 DISCOVERY LOW LEVEL LED
* @{
*/
#define LEDn 4
#define LED4_PIN GPIO_PIN_12
#define LED4_GPIO_PORT GPIOD
#define LED4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define LED4_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
#define LED3_PIN GPIO_PIN_13
#define LED3_GPIO_PORT GPIOD
#define LED3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define LED3_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
#define LED5_PIN GPIO_PIN_14
#define LED5_GPIO_PORT GPIOD
#define LED5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define LED5_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
#define LED6_PIN GPIO_PIN_15
#define LED6_GPIO_PORT GPIOD
#define LED6_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define LED6_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
#define LEDx_GPIO_CLK_ENABLE(__INDEX__) do{if((__INDEX__) == 0) LED4_GPIO_CLK_ENABLE(); else \
if((__INDEX__) == 1) LED3_GPIO_CLK_ENABLE(); else \
if((__INDEX__) == 2) LED5_GPIO_CLK_ENABLE(); else \
if((__INDEX__) == 3) LED6_GPIO_CLK_ENABLE(); \
}while(0)
#define LEDx_GPIO_CLK_DISABLE(__INDEX__) do{if((__INDEX__) == 0) LED4_GPIO_CLK_DISABLE(); else \
if((__INDEX__) == 1) LED3_GPIO_CLK_DISABLE(); else \
if((__INDEX__) == 2) LED5_GPIO_CLK_DISABLE(); else \
if((__INDEX__) == 3) LED6_GPIO_CLK_DISABLE(); \
}while(0)
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_BUTTON STM32F4 DISCOVERY LOW LEVEL BUTTON
* @{
*/
#define BUTTONn 1
/**
* @brief Wakeup push-button
*/
#define KEY_BUTTON_PIN GPIO_PIN_0
#define KEY_BUTTON_GPIO_PORT GPIOA
#define KEY_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define KEY_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
#define KEY_BUTTON_EXTI_IRQn EXTI0_IRQn
#define BUTTONx_GPIO_CLK_ENABLE(__INDEX__) do{if((__INDEX__) == 0) KEY_BUTTON_GPIO_CLK_ENABLE(); \
}while(0)
#define BUTTONx_GPIO_CLK_DISABLE(__INDEX__) do{if((__INDEX__) == 0) KEY_BUTTON_GPIO_CLK_DISABLE(); \
}while(0)
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_BUS STM32F4 DISCOVERY LOW LEVEL BUS
* @{
*/
/*############################### SPI1 #######################################*/
#define DISCOVERY_SPIx SPI1
#define DISCOVERY_SPIx_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE()
#define DISCOVERY_SPIx_GPIO_PORT GPIOA /* GPIOA */
#define DISCOVERY_SPIx_AF GPIO_AF5_SPI1
#define DISCOVERY_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define DISCOVERY_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
#define DISCOVERY_SPIx_SCK_PIN GPIO_PIN_5 /* PA.05 */
#define DISCOVERY_SPIx_MISO_PIN GPIO_PIN_6 /* PA.06 */
#define DISCOVERY_SPIx_MOSI_PIN GPIO_PIN_7 /* PA.07 */
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
on accurate values, they just guarantee that the application will not remain
stuck if the SPI communication is corrupted.
You may modify these timeout values depending on CPU frequency and application
conditions (interrupts routines ...). */
#define SPIx_TIMEOUT_MAX 0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
/*############################# I2C1 #########################################*/
/* I2C clock speed configuration (in Hz) */
#ifndef BSP_I2C_SPEED
#define BSP_I2C_SPEED 100000
#endif /* BSP_I2C_SPEED */
/* I2C peripheral configuration defines (control interface of the audio codec) */
#define DISCOVERY_I2Cx I2C1
#define DISCOVERY_I2Cx_CLK_ENABLE() __HAL_RCC_I2C1_CLK_ENABLE()
#define DISCOVERY_I2Cx_SCL_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define DISCOVERY_I2Cx_SCL_SDA_AF GPIO_AF4_I2C1
#define DISCOVERY_I2Cx_SCL_SDA_GPIO_PORT GPIOB
#define DISCOVERY_I2Cx_SCL_PIN GPIO_PIN_6
#define DISCOVERY_I2Cx_SDA_PIN GPIO_PIN_9
#define DISCOVERY_I2Cx_FORCE_RESET() __HAL_RCC_I2C1_FORCE_RESET()
#define DISCOVERY_I2Cx_RELEASE_RESET() __HAL_RCC_I2C1_RELEASE_RESET()
/* I2C interrupt requests */
#define DISCOVERY_I2Cx_EV_IRQn I2C1_EV_IRQn
#define DISCOVERY_I2Cx_ER_IRQn I2C1_ER_IRQn
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
on accurate values, they just guarantee that the application will not remain
stuck if the SPI communication is corrupted.
You may modify these timeout values depending on CPU frequency and application
conditions (interrupts routines ...). */
#define I2Cx_TIMEOUT_MAX 0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
/*############################# ACCELEROMETER ################################*/
/* Read/Write command */
#define READWRITE_CMD ((uint8_t)0x80)
/* Multiple byte read/write command */
#define MULTIPLEBYTE_CMD ((uint8_t)0x40)
/* Dummy Byte Send by the SPI Master device in order to generate the Clock to the Slave device */
#define DUMMY_BYTE ((uint8_t)0x00)
/* Chip Select macro definition */
#define ACCELERO_CS_LOW() HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_RESET)
#define ACCELERO_CS_HIGH() HAL_GPIO_WritePin(ACCELERO_CS_GPIO_PORT, ACCELERO_CS_PIN, GPIO_PIN_SET)
/**
* @brief ACCELEROMETER Interface pins
*/
#define ACCELERO_CS_PIN GPIO_PIN_3 /* PE.03 */
#define ACCELERO_CS_GPIO_PORT GPIOE /* GPIOE */
#define ACCELERO_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define ACCELERO_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
#define ACCELERO_INT_GPIO_PORT GPIOE /* GPIOE */
#define ACCELERO_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOE_CLK_ENABLE()
#define ACCELERO_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOE_CLK_DISABLE()
#define ACCELERO_INT1_PIN GPIO_PIN_0 /* PE.00 */
#define ACCELERO_INT1_EXTI_IRQn EXTI0_IRQn
#define ACCELERO_INT2_PIN GPIO_PIN_1 /* PE.01 */
#define ACCELERO_INT2_EXTI_IRQn EXTI1_IRQn
/**
* @}
*/
/*############################### AUDIO ######################################*/
/**
* @brief AUDIO I2C Interface pins
*/
#define AUDIO_I2C_ADDRESS 0x94
/* Audio Reset Pin definition */
#define AUDIO_RESET_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
#define AUDIO_RESET_PIN GPIO_PIN_4
#define AUDIO_RESET_GPIO GPIOD
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Exported_Macros STM32F4 DISCOVERY LOW LEVEL Exported Macros
* @{
*/
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_LOW_LEVEL_Exported_Functions STM32F4 DISCOVERY LOW LEVEL Exported Functions
* @{
*/
uint32_t BSP_GetVersion(void);
void BSP_LED_Init(Led_TypeDef Led);
void BSP_LED_On(Led_TypeDef Led);
void BSP_LED_Off(Led_TypeDef Led);
void BSP_LED_Toggle(Led_TypeDef Led);
void BSP_PB_Init(Button_TypeDef Button, ButtonMode_TypeDef Mode);
uint32_t BSP_PB_GetState(Button_TypeDef Button);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4_DISCOVERY_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/**
******************************************************************************
* @file stm32f4_discovery_audio.h
* @author MCD Application Team
* @version V2.1.2
* @date 27-January-2017
* @brief This file contains the common defines and functions prototypes for
* stm32f4_discovery_audio.c driver.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F4_DISCOVERY_AUDIO_H
#define __STM32F4_DISCOVERY_AUDIO_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
/* Include audio component Driver */
#include "cs43l22.h"
#include "stm32f4_discovery.h"
//#include "../../../Middlewares/ST/STM32_Audio/Addons/PDM/pdm_filter.h"
/** @addtogroup BSP
* @{
*/
/** @addtogroup STM32F4_DISCOVERY
* @{
*/
/** @addtogroup STM32F4_DISCOVERY_AUDIO
* @{
*/
/** @defgroup STM32F4_DISCOVERY_AUDIO_Exported_Types STM32F4 DISCOVERY AUDIO Exported Types
* @{
*/
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_AUDIO_OUT_Exported_Constants STM32F4 DISCOVERY AUDIO OUT Exported Constants
* @{
*/
/*------------------------------------------------------------------------------
AUDIO OUT CONFIGURATION
------------------------------------------------------------------------------*/
/* I2S peripheral configuration defines */
#define I2S3 SPI3
#define I2S3_CLK_ENABLE() __HAL_RCC_SPI3_CLK_ENABLE()
#define I2S3_CLK_DISABLE() __HAL_RCC_SPI3_CLK_DISABLE()
#define I2S3_SCK_SD_WS_AF GPIO_AF6_SPI3
#define I2S3_SCK_SD_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
#define I2S3_MCK_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
#define I2S3_WS_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
#define I2S3_WS_PIN GPIO_PIN_4
#define I2S3_SCK_PIN GPIO_PIN_10
#define I2S3_SD_PIN GPIO_PIN_12
#define I2S3_MCK_PIN GPIO_PIN_7
#define I2S3_SCK_SD_GPIO_PORT GPIOC
#define I2S3_WS_GPIO_PORT GPIOA
#define I2S3_MCK_GPIO_PORT GPIOC
/* I2S DMA Stream definitions */
#define I2S3_DMAx_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
#define I2S3_DMAx_CLK_DISABLE() __HAL_RCC_DMA1_CLK_DISABLE()
#define I2S3_DMAx_STREAM DMA1_Stream7
#define I2S3_DMAx_CHANNEL DMA_CHANNEL_0
#define I2S3_DMAx_IRQ DMA1_Stream7_IRQn
#define I2S3_DMAx_PERIPH_DATA_SIZE DMA_PDATAALIGN_HALFWORD
#define I2S3_DMAx_MEM_DATA_SIZE DMA_MDATAALIGN_HALFWORD
#define DMA_MAX_SZE 0xFFFF
#define I2S3_IRQHandler DMA1_Stream7_IRQHandler
/* Select the interrupt preemption priority and subpriority for the DMA interrupt */
#define AUDIO_OUT_IRQ_PREPRIO 0x0E /* Select the preemption priority level(0 is the highest) */
/*------------------------------------------------------------------------------
AUDIO IN CONFIGURATION
------------------------------------------------------------------------------*/
/* SPI Configuration defines */
#define I2S2 SPI2
#define I2S2_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
#define I2S2_CLK_DISABLE() __HAL_RCC_SPI2_CLK_DISABLE()
#define I2S2_SCK_PIN GPIO_PIN_10
#define I2S2_SCK_GPIO_PORT GPIOB
#define I2S2_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
#define I2S2_SCK_AF GPIO_AF5_SPI2
#define I2S2_MOSI_PIN GPIO_PIN_3
#define I2S2_MOSI_GPIO_PORT GPIOC
#define I2S2_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
#define I2S2_MOSI_AF GPIO_AF5_SPI2
/* I2S DMA Stream Rx definitions */
#define I2S2_DMAx_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
#define I2S2_DMAx_CLK_DISABLE() __HAL_RCC_DMA1_CLK_DISABLE()
#define I2S2_DMAx_STREAM DMA1_Stream3
#define I2S2_DMAx_CHANNEL DMA_CHANNEL_0
#define I2S2_DMAx_IRQ DMA1_Stream3_IRQn
#define I2S2_DMAx_PERIPH_DATA_SIZE DMA_PDATAALIGN_HALFWORD
#define I2S2_DMAx_MEM_DATA_SIZE DMA_MDATAALIGN_HALFWORD
#define I2S2_IRQHandler DMA1_Stream3_IRQHandler
/* Select the interrupt preemption priority and subpriority for the IT/DMA interrupt */
#define AUDIO_IN_IRQ_PREPRIO 0x0F /* Select the preemption priority level(0 is the highest) */
/*------------------------------------------------------------------------------
CONFIGURATION: Audio Driver Configuration parameters
------------------------------------------------------------------------------*/
#define AUDIODATA_SIZE 2 /* 16-bits audio data size */
/* Audio status definition */
#define AUDIO_OK 0
#define AUDIO_ERROR 1
#define AUDIO_TIMEOUT 2
/* AudioFreq * DataSize (2 bytes) * NumChannels (Stereo: 2) */
#define DEFAULT_AUDIO_IN_FREQ I2S_AUDIOFREQ_16K
#define DEFAULT_AUDIO_IN_BIT_RESOLUTION 16
#define DEFAULT_AUDIO_IN_CHANNEL_NBR 1 /* Mono = 1, Stereo = 2 */
#define DEFAULT_AUDIO_IN_VOLUME 64
/* PDM buffer input size */
#define INTERNAL_BUFF_SIZE 128*DEFAULT_AUDIO_IN_FREQ/16000*DEFAULT_AUDIO_IN_CHANNEL_NBR
/* PCM buffer output size */
#define PCM_OUT_SIZE DEFAULT_AUDIO_IN_FREQ/1000
#define CHANNEL_DEMUX_MASK 0x55
/*------------------------------------------------------------------------------
OPTIONAL Configuration defines parameters
------------------------------------------------------------------------------*/
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_AUDIO_Exported_Variables STM32F4 DISCOVERY AUDIO Exported Variables
* @{
*/
extern __IO uint16_t AudioInVolume;
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_AUDIO_Exported_Macros STM32F4 DISCOVERY AUDIO Exported Macros
* @{
*/
#define DMA_MAX(_X_) (((_X_) <= DMA_MAX_SZE)? (_X_):DMA_MAX_SZE)
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_AUDIO_OUT_Exported_Functions STM32F4 DISCOVERY AUDIO OUT Exported Functions
* @{
*/
uint8_t BSP_AUDIO_OUT_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq);
uint8_t BSP_AUDIO_OUT_Play(uint16_t* pBuffer, uint32_t Size);
void BSP_AUDIO_OUT_ChangeBuffer(uint16_t *pData, uint16_t Size);
uint8_t BSP_AUDIO_OUT_Pause(void);
uint8_t BSP_AUDIO_OUT_Resume(void);
uint8_t BSP_AUDIO_OUT_Stop(uint32_t Option);
uint8_t BSP_AUDIO_OUT_SetVolume(uint8_t Volume);
void BSP_AUDIO_OUT_SetFrequency(uint32_t AudioFreq);
uint8_t BSP_AUDIO_OUT_SetMute(uint32_t Cmd);
uint8_t BSP_AUDIO_OUT_SetOutputMode(uint8_t Output);
/* User Callbacks: user has to implement these functions in his code if they are needed. */
/* This function is called when the requested data has been completely transferred. */
void BSP_AUDIO_OUT_TransferComplete_CallBack(void);
/* This function is called when half of the requested buffer has been transferred. */
void BSP_AUDIO_OUT_HalfTransfer_CallBack(void);
/* This function is called when an Interrupt due to transfer error on or peripheral
error occurs. */
void BSP_AUDIO_OUT_Error_CallBack(void);
/* These function can be modified in case the current settings (e.g. DMA stream)
need to be changed for specific application needs */
void BSP_AUDIO_OUT_ClockConfig(I2S_HandleTypeDef *hi2s, uint32_t AudioFreq, void *Params);
void BSP_AUDIO_OUT_MspInit(I2S_HandleTypeDef *hi2s, void *Params);
void BSP_AUDIO_OUT_MspDeInit(I2S_HandleTypeDef *hi2s, void *Params);
/**
* @}
*/
/** @defgroup STM32F4_DISCOVERY_AUDIO_IN_Exported_Functions STM32F4 DISCOVERY AUDIO IN Exported Functions
* @{
*/
uint8_t BSP_AUDIO_IN_Init(uint32_t AudioFreq, uint32_t BitRes, uint32_t ChnlNbr);
uint8_t BSP_AUDIO_IN_Record(uint16_t *pData, uint32_t Size);
uint8_t BSP_AUDIO_IN_Stop(void);
uint8_t BSP_AUDIO_IN_Pause(void);
uint8_t BSP_AUDIO_IN_Resume(void);
uint8_t BSP_AUDIO_IN_SetVolume(uint8_t Volume);
uint8_t BSP_AUDIO_IN_PDMToPCM(uint16_t *PDMBuf, uint16_t *PCMBuf);
/* User Callbacks: user has to implement these functions in his code if they are needed. */
/* This function should be implemented by the user application.
It is called into this driver when the current buffer is filled to prepare the next
buffer pointer and its size. */
void BSP_AUDIO_IN_TransferComplete_CallBack(void);
void BSP_AUDIO_IN_HalfTransfer_CallBack(void);
/* This function is called when an Interrupt due to transfer error on or peripheral
error occurs. */
void BSP_AUDIO_IN_Error_Callback(void);
/* These function can be modified in case the current settings (e.g. DMA stream)
need to be changed for specific application needs */
void BSP_AUDIO_IN_ClockConfig(I2S_HandleTypeDef *hi2s, uint32_t AudioFreq, void *Params);
void BSP_AUDIO_IN_MspInit(I2S_HandleTypeDef *hi2s, void *Params);
void BSP_AUDIO_IN_MspDeInit(I2S_HandleTypeDef *hi2s, void *Params);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32F4_DISCOVERY_AUDIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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//
// btstack_config.h for STM32F103RB Nucleo + TI CC256B port
//
#ifndef __BTSTACK_CONFIG
#define __BTSTACK_CONFIG
// Port related features
#define HAVE_EMBEDDED_TIME_MS
#define HAVE_HAL_AUDIO
#define HAVE_BTSTACK_STDIN
// BTstack features that can be enabled
#define ENABLE_BLE
#define ENABLE_LE_PERIPHERAL
#define ENABLE_LE_CENTRAL
#define ENABLE_CLASSIC
#define ENABLE_LE_DATA_CHANNELS
// #define ENABLE_LOG_INFO
#define ENABLE_LOG_ERROR
#define ENABLE_SCO_OVER_HCI
#define ENABLE_SCO_STEREO_PLAYBACK
#define ENABLE_HFP_WIDE_BAND_SPEECH
#define ENABLE_CC256X_BAUDRATE_CHANGE_FLOWCONTROL_BUG_WORKAROUND
// #define ENABLE_EHCILL
// #define ENABLE_SEGGER_RTT
// BTstack configuration. buffers, sizes, ...
#define HCI_ACL_PAYLOAD_SIZE 1021
#define MAX_NR_GATT_CLIENTS 1
#define MAX_NR_HCI_CONNECTIONS 2
#define MAX_NR_L2CAP_SERVICES 3
#define MAX_NR_L2CAP_CHANNELS 4
#define MAX_NR_RFCOMM_MULTIPLEXERS 1
#define MAX_NR_RFCOMM_SERVICES 1
#define MAX_NR_RFCOMM_CHANNELS 1
#define MAX_NR_BTSTACK_LINK_KEY_DB_MEMORY_ENTRIES 2
#define MAX_NR_BNEP_SERVICES 1
#define MAX_NR_BNEP_CHANNELS 1
#define MAX_NR_HFP_CONNECTIONS 1
#define MAX_NR_WHITELIST_ENTRIES 1
#define MAX_NR_SM_LOOKUP_ENTRIES 3
#define MAX_NR_SERVICE_RECORD_ITEMS 1
#define MAX_NR_AVDTP_STREAM_ENDPOINTS 1
#define MAX_NR_AVDTP_CONNECTIONS 1
#define MAX_NR_AVRCP_CONNECTIONS 1
// Link Key DB and LE Device DB using TLV on top of Flash Sector interface
#define NVM_NUM_LINK_KEYS 16
#define NVM_NUM_DEVICE_DB_ENTRIES 16
#endif

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/*
* Copyright (C) 2017 BlueKitchen GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
* 4. Any redistribution, use, or modification is done solely for
* personal benefit and not for any commercial purpose or for
* monetary gain.
*
* THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
* RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* Please inquire about commercial licensing options at
* contact@bluekitchen-gmbh.com
*
*/
#define __BTSTACK_FILE__ "hal_audio_f4_discovery.c"
#include "hal_audio.h"
#include "btstack_debug.h"
#include "stm32f4_discovery_audio.h"
// output
#define OUTPUT_BUFFER_NUM_SAMPLES 512
#define NUM_OUTPUT_BUFFERS 2
// #define MEASURE_SAMPLE_RATE
static void (*audio_played_handler)(uint8_t buffer_index);
static int playback_started;
// our storage
static int16_t output_buffer[NUM_OUTPUT_BUFFERS * OUTPUT_BUFFER_NUM_SAMPLES * 2]; // stereo
#ifdef MEASURE_SAMPLE_RATE
static uint32_t stream_start_ms;
static uint32_t stream_samples;
#endif
// input - irq every 16 ms currently
#define INPUT_BUFFER_NUM_SAMPLES 256
static int recording_started;
static int32_t recording_sample_rate;
static void (*audio_recorded_callback)(const int16_t * buffer, uint16_t num_samples);
static int16_t input_buffer[INPUT_BUFFER_NUM_SAMPLES]; // single mono buffer
static uint16_t pdm_buffer[INPUT_BUFFER_NUM_SAMPLES*8];
static int sink_pcm_samples_per_ms;
static int sink_pdm_bytes_per_ms;
static int sink_pcm_samples_per_irq;
static int sink_pdm_samples_total;
void BSP_AUDIO_OUT_HalfTransfer_CallBack(void){
#ifdef MEASURE_SAMPLE_RATE
if (stream_start_ms == 0){
stream_start_ms = btstack_run_loop_get_time_ms();
} else {
stream_samples++;
}
#endif
(*audio_played_handler)(0);
}
void BSP_AUDIO_OUT_TransferComplete_CallBack(void){
#ifdef MEASURE_SAMPLE_RATE
if (stream_samples == 500){
uint32_t now = btstack_run_loop_get_time_ms();
uint32_t delta = now - stream_start_ms;
log_info("Samples per second: %u", stream_samples * OUTPUT_BUFFER_NUM_SAMPLES * 1000 / delta);
stream_start_ms = now;
stream_samples = 0;
}
stream_samples++;
#endif
(*audio_played_handler)(1);
}
/**
* @brief Setup audio codec for specified samplerate and number channels
* @param Channels
* @param Sample rate
* @param Buffer played callback
* @param Buffer recorded callback (use NULL if no recording)
*/
void hal_audio_sink_init(uint8_t channels,
uint32_t sample_rate,
void (*buffer_played_callback) (uint8_t buffer_index)){
// F4 Discovery Audio BSP only supports stereo playback
if (channels == 1){
log_error("F4 Discovery Audio BSP only supports stereo playback. HFP/HSP demos using sco_demo_util, please #define ENABLE_SCO_STEREO_PLAYBACK");
return;
}
audio_played_handler = buffer_played_callback;
BSP_AUDIO_OUT_Init(OUTPUT_DEVICE_BOTH, 80, sample_rate);
}
/**
* @brief Get number of output buffers in HAL
* @returns num buffers
*/
uint16_t hal_audio_sink_get_num_output_buffers(void){
return NUM_OUTPUT_BUFFERS;
}
/**
* @brief Get size of single output buffer in HAL
* @returns buffer size
*/
uint16_t hal_audio_sink_get_num_output_buffer_samples(void){
return OUTPUT_BUFFER_NUM_SAMPLES;
}
/**
* @brief Reserve output buffer
* @returns buffer
*/
int16_t * hal_audio_sink_get_output_buffer(uint8_t buffer_index){
switch (buffer_index){
case 0:
return output_buffer;
case 1:
return &output_buffer[OUTPUT_BUFFER_NUM_SAMPLES * 2];
default:
return NULL;
}
}
/**
* @brief Start stream
*/
void hal_audio_sink_start(void){
playback_started = 1;
// BSP_AUDIO_OUT_Play gets number bytes -> 1 frame - 16 bit/stereo = 4 bytes
BSP_AUDIO_OUT_Play( (uint16_t*) output_buffer, NUM_OUTPUT_BUFFERS * OUTPUT_BUFFER_NUM_SAMPLES * 4);
}
/**
* @brief Stop stream
*/
void hal_audio_sink_stop(void){
playback_started = 0;
BSP_AUDIO_OUT_Stop(CODEC_PDWN_HW);
}
/**
* @brief Close audio codec
*/
void hal_audio_sink_close(void){
if (playback_started){
hal_audio_sink_close();
}
}
#ifdef SIMULATE_SINE
// temp sine simulator
// input signal: pre-computed sine wave, 266 Hz at 16000 kHz
static const int16_t sine_int16_at_16000hz[] = {
0, 3135, 6237, 9270, 12202, 14999, 17633, 20073, 22294, 24270,
25980, 27406, 28531, 29344, 29835, 30000, 29835, 29344, 28531, 27406,
25980, 24270, 22294, 20073, 17633, 14999, 12202, 9270, 6237, 3135,
0, -3135, -6237, -9270, -12202, -14999, -17633, -20073, -22294, -24270,
-25980, -27406, -28531, -29344, -29835, -30000, -29835, -29344, -28531, -27406,
-25980, -24270, -22294, -20073, -17633, -14999, -12202, -9270, -6237, -3135,
};
static unsigned int phase;
// 8 kHz samples in host endianess
static void sco_demo_sine_wave_int16_at_8000_hz_host_endian(unsigned int num_samples, int16_t * data){
unsigned int i;
for (i=0; i < num_samples; i++){
data[i] = sine_int16_at_16000hz[phase++];
// ony use every second sample from 16khz table to get 8khz
phase += 2;
if (phase >= (sizeof(sine_int16_at_16000hz) / sizeof(int16_t))){
phase = 0;
}
}
}
// 16 kHz samples in host endianess
static void sco_demo_sine_wave_int16_at_16000_hz_host_endian(unsigned int num_samples, int16_t * data){
unsigned int i;
for (i=0; i < num_samples; i++){
data[i] = sine_int16_at_16000hz[phase++];
if (phase >= (sizeof(sine_int16_at_16000hz) / sizeof(int16_t))){
phase = 0;
}
}
}
static void generate_sine(void){
if (recording_sample_rate == 8000){
sco_demo_sine_wave_int16_at_8000_hz_host_endian(INPUT_BUFFER_NUM_SAMPLES, input_buffer);
} else {
sco_demo_sine_wave_int16_at_16000_hz_host_endian(INPUT_BUFFER_NUM_SAMPLES, input_buffer);
}
// notify
(*audio_recorded_callback)(input_buffer, INPUT_BUFFER_NUM_SAMPLES);
}
#else
static void process_pdm(uint16_t * pdm_half_buffer){
int samples_needed = sink_pcm_samples_per_irq;
int16_t * pcm_buffer = input_buffer;
while (samples_needed){
// TODO: use int16_t for pcm samples
BSP_AUDIO_IN_PDMToPCM(pdm_half_buffer, (uint16_t *) pcm_buffer);
pdm_half_buffer += sink_pdm_bytes_per_ms / 2;
pcm_buffer += sink_pcm_samples_per_ms;
samples_needed -= sink_pcm_samples_per_ms;
}
// notify
(*audio_recorded_callback)(input_buffer, sink_pcm_samples_per_irq);
}
#endif
void BSP_AUDIO_IN_HalfTransfer_CallBack(void){
#ifdef SIMULATE_SINE
generate_sine();
#else
process_pdm(&pdm_buffer[0]);
#endif
}
void BSP_AUDIO_IN_TransferComplete_CallBack(void){
#ifdef SIMULATE_SINE
generate_sine();
#else
process_pdm(&pdm_buffer[sink_pdm_samples_total/2]);
#endif
}
/**
* @brief Setup audio codec for recording using specified samplerate and number of channels
* @param Channels
* @param Sample rate
* @param Buffer recorded callback
*/
void hal_audio_source_init(uint8_t channels,
uint32_t sample_rate,
void (*buffer_recorded_callback)(const int16_t * buffer, uint16_t num_samples)){
BSP_AUDIO_IN_Init(sample_rate, 16, channels);
int decimation = 64;
// size of input & output of PDM filter depend on output frequency and decimation
sink_pcm_samples_per_irq = sample_rate / 1000 * 16; // 256@16 kHz, 128@8 kHz
sink_pcm_samples_per_ms = sample_rate / 1000;
sink_pdm_bytes_per_ms = sink_pcm_samples_per_ms * decimation / 8;
sink_pdm_samples_total = INPUT_BUFFER_NUM_SAMPLES * 8 * sample_rate / 16000;
log_info("Source: PDM bytes per ms %u, PDM samples total %u - PCM samples per ms %u", sink_pdm_bytes_per_ms, sink_pdm_samples_total, sink_pcm_samples_per_ms);
audio_recorded_callback = buffer_recorded_callback;
recording_sample_rate = sample_rate;
}
/**
* @brief Start stream
*/
void hal_audio_source_start(void){
BSP_AUDIO_IN_Record(pdm_buffer, sink_pdm_samples_total);
recording_started = 1;
}
/**
* @brief Stop stream
*/
void hal_audio_source_stop(void){
if (!recording_started) return;
BSP_AUDIO_IN_Stop();
recording_started = 0;
}
/**
* @brief Close audio codec
*/
void hal_audio_source_close(void){
if (recording_started) {
hal_audio_source_stop();
}
}

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/*
* Copyright (C) 2017 BlueKitchen GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
* RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/*
* hal_flash_bank_stm32.c
*
* HAL abstraction for Flash memory that can be written anywhere
* after being erased
*/
#include <stdint.h>
#include <string.h> // memcpy
#include "hal_flash_bank_stm32.h"
#include "stm32f4xx_hal.h"
static uint32_t hal_flash_bank_stm32_get_size(void * context){
hal_flash_bank_stm32_t * self = (hal_flash_bank_stm32_t *) context;
return self->sector_size;
}
static uint32_t hal_flash_bank_memory_get_alignment(void * context){
UNUSED(context);
return 1;
}
static void hal_flash_bank_stm32_erase(void * context, int bank){
hal_flash_bank_stm32_t * self = (hal_flash_bank_stm32_t *) context;
if (bank > 1) return;
FLASH_EraseInitTypeDef eraseInit;
eraseInit.TypeErase = FLASH_TYPEERASE_SECTORS;
eraseInit.Sector = self->sectors[bank];
eraseInit.NbSectors = 1;
eraseInit.VoltageRange = FLASH_VOLTAGE_RANGE_1; // safe value
uint32_t sectorError;
HAL_FLASH_Unlock();
HAL_FLASHEx_Erase(&eraseInit, &sectorError);
HAL_FLASH_Lock();
}
static void hal_flash_bank_stm32_read(void * context, int bank, uint32_t offset, uint8_t * buffer, uint32_t size){
hal_flash_bank_stm32_t * self = (hal_flash_bank_stm32_t *) context;
if (bank > 1) return;
if (offset > self->sector_size) return;
if ((offset + size) > self->sector_size) return;
memcpy(buffer, ((uint8_t *) self->banks[bank]) + offset, size);
}
static void hal_flash_bank_stm32_write(void * context, int bank, uint32_t offset, const uint8_t * data, uint32_t size){
hal_flash_bank_stm32_t * self = (hal_flash_bank_stm32_t *) context;
if (bank > 1) return;
if (offset > self->sector_size) return;
if ((offset + size) > self->sector_size) return;
unsigned int i;
HAL_FLASH_Unlock();
for (i=0;i<size;i++){
HAL_FLASH_Program(FLASH_TYPEPROGRAM_BYTE, self->banks[bank] + offset +i, data[i]);
}
HAL_FLASH_Lock();
}
static const hal_flash_bank_t hal_flash_bank_stm32_impl = {
/* uint32_t (*get_size)() */ &hal_flash_bank_stm32_get_size,
/* uint32_t (*get_alignment)(..); */ &hal_flash_bank_memory_get_alignment,
/* void (*erase)(..); */ &hal_flash_bank_stm32_erase,
/* void (*read)(..); */ &hal_flash_bank_stm32_read,
/* void (*write)(..); */ &hal_flash_bank_stm32_write,
};
const hal_flash_bank_t * hal_flash_bank_stm32_init_instance(hal_flash_bank_stm32_t * context, uint32_t sector_size,
uint32_t bank_0_sector, uint32_t bank_1_sector, uintptr_t bank_0_addr, uintptr_t bank_1_addr){
context->sector_size = sector_size;
context->sectors[0] = bank_0_sector;
context->sectors[1] = bank_1_sector;
context->banks[0] = bank_0_addr;
context->banks[1] = bank_1_addr;
return &hal_flash_bank_stm32_impl;
}

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/*
* Copyright (C) 2017 BlueKitchen GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the copyright holders nor the names of
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY MATTHIAS RINGWALD AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL MATTHIAS
* RINGWALD OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/*
* hal_flash_bank_stm32.h
*
* HAL abstraction for Flash memory that can be written anywhere
* after being erased
*/
#ifndef __HAL_FLASH_BANK_STM32_H
#define __HAL_FLASH_BANK_STM32_H
#include <stdint.h>
#include "hal_flash_bank.h"
#if defined __cplusplus
extern "C" {
#endif
typedef struct {
uint32_t sector_size;
uint32_t sectors[2];
uintptr_t banks[2];
} hal_flash_bank_stm32_t;
/**
* Configure STM32 HAL Flash Implementation
*
* @param context of hal_flash_bank_stm32_t
* @param bank_size
* @param bank_0_sector id
* @param bank_1_sector id
* @param bank_0_addr
* @param bank_1_addr
* @return
*/
const hal_flash_bank_t * hal_flash_bank_stm32_init_instance(hal_flash_bank_stm32_t * context, uint32_t bank_size,
uint32_t bank_0_sector, uint32_t bank_1_sector, uintptr_t bank_0_addr, uintptr_t bank_1_addr);
#if defined __cplusplus
}
#endif
#endif

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#define __BTSTACK_FILE__ "port.c"
// include STM32 first to avoid warning about redefinition of UNUSED
#include "stm32f4xx_hal.h"
#include "port.h"
#include "btstack.h"
#include "btstack_debug.h"
#include "btstack_audio.h"
#include "btstack_chipset_cc256x.h"
#include "btstack_run_loop_embedded.h"
#include "btstack_tlv.h"
#include "btstack_tlv_flash_bank.h"
#include "ble/le_device_db_tlv.h"
#include "classic/btstack_link_key_db_static.h"
#include "classic/btstack_link_key_db_tlv.h"
#include "hal_flash_bank_stm32.h"
#ifdef ENABLE_SEGGER_RTT
#include "SEGGER_RTT.h"
#endif
//
extern UART_HandleTypeDef huart2;
extern UART_HandleTypeDef huart3;
//
static btstack_packet_callback_registration_t hci_event_callback_registration;
static const hci_transport_config_uart_t config = {
HCI_TRANSPORT_CONFIG_UART,
115200,
4000000,
1,
NULL
};
// hal_time_ms.h
#include "hal_time_ms.h"
uint32_t hal_time_ms(void){
return HAL_GetTick();
}
// hal_cpu.h implementation
#include "hal_cpu.h"
void hal_cpu_disable_irqs(void){
__disable_irq();
}
void hal_cpu_enable_irqs(void){
__enable_irq();
}
void hal_cpu_enable_irqs_and_sleep(void){
__enable_irq();
__asm__("wfe"); // go to sleep if event flag isn't set. if set, just clear it. IRQs set event flag
}
// hal_stdin.h
#include "hal_stdin.h"
static uint8_t stdin_buffer[1];
static void (*stdin_handler)(char c);
void hal_stdin_setup(void (*handler)(char c)){
stdin_handler = handler;
// start receiving
HAL_UART_Receive_IT(&huart2, &stdin_buffer[0], 1);
}
static void stdin_rx_complete(void){
if (stdin_handler){
(*stdin_handler)(stdin_buffer[0]);
}
HAL_UART_Receive_IT(&huart2, &stdin_buffer[0], 1);
}
// hal_uart_dma.h
// hal_uart_dma.c implementation
#include "hal_uart_dma.h"
static void dummy_handler(void);
// handlers
static void (*rx_done_handler)(void) = &dummy_handler;
static void (*tx_done_handler)(void) = &dummy_handler;
static void (*cts_irq_handler)(void) = &dummy_handler;
static void dummy_handler(void){};
static int hal_uart_needed_during_sleep;
void hal_uart_dma_set_sleep(uint8_t sleep){
// RTS is on PD12 - manually set it during sleep
GPIO_InitTypeDef RTS_InitStruct;
RTS_InitStruct.Pin = GPIO_PIN_12;
RTS_InitStruct.Pull = GPIO_NOPULL;
RTS_InitStruct.Alternate = GPIO_AF7_USART3;
if (sleep){
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12, GPIO_PIN_SET);
RTS_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
RTS_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
} else {
RTS_InitStruct.Mode = GPIO_MODE_AF_PP;
RTS_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
}
HAL_GPIO_Init(GPIOD, &RTS_InitStruct);
// if (sleep){
// HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12, GPIO_PIN_SET);
// }
hal_uart_needed_during_sleep = !sleep;
}
// reset Bluetooth using n_shutdown
static void bluetooth_power_cycle(void){
printf("Bluetooth power cycle\n");
HAL_GPIO_WritePin( CC_nSHUTD_GPIO_Port, CC_nSHUTD_Pin, GPIO_PIN_RESET );
HAL_Delay( 250 );
HAL_GPIO_WritePin( CC_nSHUTD_GPIO_Port, CC_nSHUTD_Pin, GPIO_PIN_SET );
HAL_Delay( 500 );
}
void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart){
if (huart == &huart3){
(*tx_done_handler)();
}
}
void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart){
if (huart == &huart3){
(*rx_done_handler)();
}
if (huart == &huart2){
stdin_rx_complete();
}
}
void hal_uart_dma_init(void){
bluetooth_power_cycle();
}
void hal_uart_dma_set_block_received( void (*the_block_handler)(void)){
rx_done_handler = the_block_handler;
}
void hal_uart_dma_set_block_sent( void (*the_block_handler)(void)){
tx_done_handler = the_block_handler;
}
void EXTI15_10_IRQHandler(void){
__HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_11);
if (cts_irq_handler){
(*cts_irq_handler)();
}
}
void hal_uart_dma_set_csr_irq_handler( void (*the_irq_handler)(void)){
GPIO_InitTypeDef CTS_InitStruct = {
.Pin = GPIO_PIN_11,
.Mode = GPIO_MODE_AF_PP,
.Pull = GPIO_PULLUP,
.Speed = GPIO_SPEED_FREQ_VERY_HIGH,
.Alternate = GPIO_AF7_USART3,
};
if( the_irq_handler ) {
/* Configure the EXTI11 interrupt (USART3_CTS is on PD11) */
HAL_NVIC_EnableIRQ( EXTI15_10_IRQn );
CTS_InitStruct.Mode = GPIO_MODE_IT_RISING;
CTS_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init( GPIOD, &CTS_InitStruct );
log_info("enabled CTS irq");
}
else {
CTS_InitStruct.Mode = GPIO_MODE_AF_PP;
CTS_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init( GPIOD, &CTS_InitStruct );
HAL_NVIC_DisableIRQ( EXTI15_10_IRQn );
log_info("disabled CTS irq");
}
cts_irq_handler = the_irq_handler;
}
int hal_uart_dma_set_baud(uint32_t baud){
huart3.Init.BaudRate = baud;
HAL_UART_Init(&huart3);
return 0;
}
void hal_uart_dma_send_block(const uint8_t *data, uint16_t size){
HAL_UART_Transmit_DMA( &huart3, (uint8_t *) data, size);
}
void hal_uart_dma_receive_block(uint8_t *data, uint16_t size){
HAL_UART_Receive_DMA( &huart3, data, size );
}
#ifndef ENABLE_SEGGER_RTT
/**
* Use USART_CONSOLE as a console.
* This is a syscall for newlib
* @param file
* @param ptr
* @param len
* @return
*/
#include <stdio.h>
#include <unistd.h>
#include <errno.h>
int _write(int file, char *ptr, int len);
int _write(int file, char *ptr, int len){
#if 1
uint8_t cr = '\r';
int i;
if (file == STDOUT_FILENO || file == STDERR_FILENO) {
for (i = 0; i < len; i++) {
if (ptr[i] == '\n') {
HAL_UART_Transmit( &huart2, &cr, 1, HAL_MAX_DELAY );
}
HAL_UART_Transmit( &huart2, (uint8_t *) &ptr[i], 1, HAL_MAX_DELAY );
}
return i;
}
errno = EIO;
return -1;
#else
return len;
#endif
}
int _read(int file, char * ptr, int len){
UNUSED(file);
UNUSED(ptr);
UNUSED(len);
return -1;
}
#endif
int _close(int file){
UNUSED(file);
return -1;
}
int _isatty(int file){
UNUSED(file);
return -1;
}
int _lseek(int file){
UNUSED(file);
return -1;
}
int _fstat(int file){
UNUSED(file);
return -1;
}
// main.c
static void packet_handler (uint8_t packet_type, uint16_t channel, uint8_t *packet, uint16_t size){
UNUSED(size);
UNUSED(channel);
bd_addr_t local_addr;
if (packet_type != HCI_EVENT_PACKET) return;
switch(hci_event_packet_get_type(packet)){
case BTSTACK_EVENT_STATE:
if (btstack_event_state_get_state(packet) != HCI_STATE_WORKING) return;
gap_local_bd_addr(local_addr);
printf("BTstack up and running on %s.\n", bd_addr_to_str(local_addr));
break;
case HCI_EVENT_COMMAND_COMPLETE:
if (HCI_EVENT_IS_COMMAND_COMPLETE(packet, hci_read_local_version_information)){
uint16_t manufacturer = little_endian_read_16(packet, 10);
uint16_t lmp_subversion = little_endian_read_16(packet, 12);
// assert manufacturer is TI
if (manufacturer != BLUETOOTH_COMPANY_ID_TEXAS_INSTRUMENTS_INC){
printf("ERROR: Expected Bluetooth Chipset from TI but got manufacturer 0x%04x\n", manufacturer);
break;
}
// assert correct init script is used based on expected lmp_subversion
if (lmp_subversion != btstack_chipset_cc256x_lmp_subversion()){
printf("Error: LMP Subversion does not match initscript! ");
printf("Your initscripts is for %s chipset\n", btstack_chipset_cc256x_lmp_subversion() < lmp_subversion ? "an older" : "a newer");
printf("Please update Makefile to include the appropriate bluetooth_init_cc256???.c file\n");
break;
}
}
break;
default:
break;
}
}
static btstack_tlv_flash_bank_t btstack_tlv_flash_bank_context;
static hal_flash_bank_stm32_t hal_flash_bank_context;
#define HAL_FLASH_BANK_SIZE (128 * 1024)
#define HAL_FLASH_BANK_0_ADDR 0x080C0000
#define HAL_FLASH_BANK_1_ADDR 0x080E0000
#define HAL_FLASH_BANK_0_SECTOR FLASH_SECTOR_10
#define HAL_FLASH_BANK_1_SECTOR FLASH_SECTOR_11
//
int btstack_main(int argc, char ** argv);
void port_main(void){
// start with BTstack init - especially configure HCI Transport
btstack_memory_init();
btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
// hci_dump_open( NULL, HCI_DUMP_STDOUT );
// init HCI
hci_init(hci_transport_h4_instance(btstack_uart_block_embedded_instance()), (void*) &config);
hci_set_chipset(btstack_chipset_cc256x_instance());
// setup TLV Flash Sector implementation
const hal_flash_bank_t * hal_flash_bank_impl = hal_flash_bank_stm32_init_instance(
&hal_flash_bank_context,
HAL_FLASH_BANK_SIZE,
HAL_FLASH_BANK_0_SECTOR,
HAL_FLASH_BANK_1_SECTOR,
HAL_FLASH_BANK_0_ADDR,
HAL_FLASH_BANK_1_ADDR);
const btstack_tlv_t * btstack_tlv_impl = btstack_tlv_flash_bank_init_instance(
&btstack_tlv_flash_bank_context,
hal_flash_bank_impl,
&hal_flash_bank_context);
// setup global tlv
btstack_tlv_set_instance(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
// setup Link Key DB using TLV
const btstack_link_key_db_t * btstack_link_key_db = btstack_link_key_db_tlv_get_instance(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
hci_set_link_key_db(btstack_link_key_db);
// setup LE Device DB using TLV
le_device_db_tlv_configure(btstack_tlv_impl, &btstack_tlv_flash_bank_context);
#ifdef HAVE_HAL_AUDIO
// setup audio
btstack_audio_sink_set_instance(btstack_audio_embedded_sink_get_instance());
btstack_audio_source_set_instance(btstack_audio_embedded_source_get_instance());
#endif
// inform about BTstack state
hci_event_callback_registration.callback = &packet_handler;
hci_add_event_handler(&hci_event_callback_registration);
// hand over to btstack embedded code
btstack_main(0, NULL);
// go
btstack_run_loop_execute();
}
#if 0
// Help with debugging hard faults - from FreeRTOS docu
// https://www.freertos.org/Debugging-Hard-Faults-On-Cortex-M-Microcontrollers.html
void prvGetRegistersFromStack( uint32_t *pulFaultStackAddress );
void prvGetRegistersFromStack( uint32_t *pulFaultStackAddress ) {
/* These are volatile to try and prevent the compiler/linker optimising them
away as the variables never actually get used. If the debugger won't show the
values of the variables, make them global my moving their declaration outside
of this function. */
volatile uint32_t r0;
volatile uint32_t r1;
volatile uint32_t r2;
volatile uint32_t r3;
volatile uint32_t r12;
volatile uint32_t lr; /* Link register. */
volatile uint32_t pc; /* Program counter. */
volatile uint32_t psr;/* Program status register. */
r0 = pulFaultStackAddress[ 0 ];
r1 = pulFaultStackAddress[ 1 ];
r2 = pulFaultStackAddress[ 2 ];
r3 = pulFaultStackAddress[ 3 ];
r12 = pulFaultStackAddress[ 4 ];
lr = pulFaultStackAddress[ 5 ];
pc = pulFaultStackAddress[ 6 ];
psr = pulFaultStackAddress[ 7 ];
/* When the following line is hit, the variables contain the register values. */
for( ;; );
}
/* The prototype shows it is a naked function - in effect this is just an
assembly function. */
void HardFault_Handler( void ) __attribute__( ( naked ) );
/* The fault handler implementation calls a function called
prvGetRegistersFromStack(). */
void HardFault_Handler(void)
{
__asm volatile
(
" tst lr, #4 \n"
" ite eq \n"
" mrseq r0, msp \n"
" mrsne r0, psp \n"
" ldr r1, [r0, #24] \n"
" ldr r2, handler2_address_const \n"
" bx r2 \n"
" handler2_address_const: .word prvGetRegistersFromStack \n"
);
}
#endif

4
port/stm32-f4discovery-cc256x-2/port/port.h Normal file
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@ -0,0 +1,4 @@
#ifndef __PORT_H
#define __PORT_H
void port_main(void);
#endif