hci_dump: samv71-xplained-atwilc3000 port

port/samv71-xplained-atwilc3000/README.md

@@ -25,7 +25,7 @@ printf is routed to USART1, which is connected to the virtual serial port. To ge
 
 In btstack_config.h, additional debug information can be enabled by uncommenting ENABLE_LOG_INFO.
 
-Also, the full packet log can be enabled in the main() function on main.c by uncommenting the hci_dump_open(..) line. The console output can then be converted into .pklg files for OS X PacketLogger or WireShark by running tool/create_packet_log.py
+Also, the full packet log can be enabled in the main() function on main.c by uncommenting the hci_dump_init(..) line. The console output can then be converted into .pklg files for OS X PacketLogger or WireShark by running tool/create_packet_log.py
 
 ## TODOs
     - Implement hal_flash_sector.h to persist link keys

port/samv71-xplained-atwilc3000/example/template/config.mk

@@ -131,6 +131,7 @@ CSRCS += \
 	${BTSTACK_ROOT_CONFIG}/chipset/atwilc3000/btstack_chipset_atwilc3000.c \
 	${BTSTACK_ROOT_CONFIG}/platform/embedded/btstack_run_loop_embedded.c \
 	${BTSTACK_ROOT_CONFIG}/platform/embedded/btstack_uart_block_embedded.c \
+	${BTSTACK_ROOT_CONFIG}/platform/embedded/hci_dump_embedded_stdout.c \
 	${BTSTACK_ROOT_CONFIG}/src/ad_parser.c \
 	${BTSTACK_ROOT_CONFIG}/src/ble/ancs_client.c \
 	${BTSTACK_ROOT_CONFIG}/src/ble/att_db.c \

port/samv71-xplained-atwilc3000/main.c

@@ -16,6 +16,7 @@
 #include "hal_tick.h"
 #include "hci.h"
 #include "hci_dump.h"
+#include "hci_dump_embedded_stdout.h"
 #include "wilc3000_ble_firmware.h"
 
 // #define USE_XDMAC_FOR_USART
@@ -567,7 +568,7 @@ int main(void)
 	btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
 
 	// enable full log output while porting
-	// hci_dump_open(NULL, HCI_DUMP_STDOUT);
+    // hci_dump_init(hci_dump_embedded_stdout_get_instance());
 
 	// setup UART HAL + Run Loop integration
 	uart_driver = btstack_uart_block_embedded_instance();