diff --git a/CHANGELOG.md b/CHANGELOG.md
index 36ae5471d..c4bc1542f 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,7 +11,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0.
 ### Added
 ### Fixed
 ### Changed
-HCI: config I2S for BCM Controllers if `ENABLE_SCO_OVER_PCM`
+HCI: config I2S for BCM Controllers if `ENABLE_SCO_OVER_PCM`, reduce bit clock to 256/512 kHz
+
 
 ## Release v1.3.1
 
diff --git a/src/classic/hfp.c b/src/classic/hfp.c
index 5b95fb9f4..01e0e7506 100644
--- a/src/classic/hfp.c
+++ b/src/classic/hfp.c
@@ -1676,8 +1676,8 @@ void hfp_bcm_prepare_for_sco(hfp_connection_t * hfp_connection){
 }
 void hfp_bcm_write_i2spcm_interface_param(hfp_connection_t * hfp_connection){
     uint8_t sample_rate = (hfp_connection->negotiated_codec == HFP_CODEC_MSBC) ? 1 : 0;
-    // i2s enable, master, 8/16 kHz, 2048 kHz
-    hci_send_cmd(&hci_bcm_write_i2spcm_interface_param, 1, 1, sample_rate, 4);
+    // i2s enable, master, 8/16 kHz, 512 kHz
+    hci_send_cmd(&hci_bcm_write_i2spcm_interface_paramhci_bcm_write_i2spcm_interface_param, 1, 1, sample_rate, 2);
 }
 #endif
 
diff --git a/src/hci.c b/src/hci.c
index ef818148b..2d9653571 100644
--- a/src/hci.c
+++ b/src/hci.c
@@ -1507,14 +1507,26 @@ static void hci_initializing_run(void){
 #endif
 #ifdef ENABLE_SCO_OVER_PCM
             log_info("BCM: Route SCO data via PCM interface");
-            hci_send_cmd(&hci_bcm_write_sco_pcm_int, 0, 4, 0, 1, 1);
+#ifdef ENABLE_BCM_PCM_WBS
+            // 512 kHz bit clock for 2 channels x 16 bit x 8 kHz
+            hci_send_cmd(&hci_bcm_write_sco_pcm_int, 0, 2, 0, 1, 1);
+#else
+            // 256 kHz bit clock for 2 channels x 16 bit x 8 kHz
+            hci_send_cmd(&hci_bcm_write_sco_pcm_int, 0, 1, 0, 1, 1);
+#endif
 #endif
             break;
 #ifdef ENABLE_SCO_OVER_PCM
         case HCI_INIT_BCM_WRITE_I2SPCM_INTERFACE_PARAM:
             hci_stack->substate = HCI_INIT_W4_BCM_WRITE_I2SPCM_INTERFACE_PARAM;
             log_info("BCM: Config PCM interface for I2S");
-            hci_send_cmd(&hci_bcm_write_i2spcm_interface_param, 1, 1, 0, 4);
+#ifdef ENABLE_BCM_PCM_WBS
+            // 512 kHz bit clock for 2 channels x 16 bit x 8 kHz
+            hci_send_cmd(&hci_bcm_write_i2spcm_interface_param, 1, 1, 0, 2);
+#else
+            // 256 kHz bit clock for 2 channels x 16 bit x 8 kHz
+            hci_send_cmd(&hci_bcm_write_i2spcm_interface_param, 1, 1, 0, 1);
+#endif
             break;
 #endif
 #endif