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msp432p401lp-cc256x: init CS->CTL1 to reset value - fixes issues with Ozone/J-Link

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This commit is contained in:
Matthias Ringwald 2020-11-15 00:38:24 +01:00
parent ab78f56d7a
commit 142ae15a42
1 changed files with 3 additions and 2 deletions
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5
port/msp432p401lp-cc256x/system_msp432p401r.c
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@ -387,8 +387,9 @@ void SystemInit(void)
// DCO = 48 MHz; MCLK = source
CS->KEY = CS_KEY_VAL; // Unlock CS module for register access
CS->CTL0 = CS_CTL0_DCORSEL_5; // Set DCO to 48MHz
CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK;
// Select MCLK as DCO source
// CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK;
// // Select MCLK as DCO source
CS->CTL1 = 0x00000033; // reset value (SMCLK, HSMCLK, MCLK source DCO)
CS->KEY = 0;
// Set Flash Bank read buffering