hci_cmd: add NXP/Marvell PCM/I2S commands

This commit is contained in:
Matthias Ringwald 2023-08-15 14:31:24 +02:00
parent 211a5343c5
commit 0e1c28d589
2 changed files with 78 additions and 1 deletions

View File

@ -2625,3 +2625,57 @@ const hci_cmd_t hci_rtk_configure_sco_routing = {
const hci_cmd_t hci_rtk_read_card_info = {
HCI_OPCODE_HCI_RTK_READ_CARD_INFO, "11111"
};
/**
* @param voice_path 0x00 - transport, 0x01 - I2S/PCM
*/
const hci_cmd_t hci_nxp_set_sco_data_path = {
HCI_OPCODE_HCI_NXP_SET_SCO_DATA_PATH, "1"
};
/**
* @param settings bits 7-5: reserved, bit 4: pcm clock on, bit 3: reserved, bit 2: pcm sync source, bit 1: master/slave, bit 0: pcm direction
*/
const hci_cmd_t hci_nxp_write_pcm_i2s_settings = {
HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SETTINGS, "1"
};
/**
* @param sync_settings_1 bits 7-2: reserved, bit 1: ISR, bit 0: ISR
* @param sync_settings_2 bits 15-11: reserved, bit 10: 16k synchronization, bit 9: clock setting, bit 8: main clock, bits 7-5: reserved, bit 4: i2s sent in right channel, bit 3: clock alignment DIN, bit 2: clock alignment DOUT, bits 1-0: mode
*/
const hci_cmd_t hci_nxp_write_pcm_i2s_sync_settings = {
HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SYNC_SETTINGS, "12"
};
/**
* @param settings bits 15-14: reserved, bit 13-10: each bit == one PCM time slot,, bits 9-2: slot relative to PCM synchronization, bits 1-0: PCM slots to be used
*/
const hci_cmd_t hci_nxp_write_pcm_link_settings = {
HCI_OPCODE_HCI_NXP_WRITE_PCM_LINK_SETTINGS, "2"
};
/**
* @param next_connection_wbs 0: CVSD, 1: mSBC
*/
const hci_cmd_t hci_nxp_set_wbs_connection = {
HCI_OPCODE_HCI_NXP_SET_WBS_CONNECTION, "1"
};
/**
* @param action
* @param operation mode
* @param sco_handle_1
* @param sco_handle_2
*/
const hci_cmd_t hci_nxp_host_pcm_i2s_audio_config = {
HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_AUDIO_CONFIG, "11HH"
};
/**
* @param action
*/
const hci_cmd_t hci_nxp_host_pcm_i2s_control_enable = {
HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_CONTROL_ENABLE, "1"
};

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@ -333,6 +333,7 @@ typedef enum {
HCI_OPCODE_HCI_LE_SET_TRANSMIT_POWER_REPORTING_ENABLE = HCI_OPCODE (OGF_LE_CONTROLLER, 0x7a),
HCI_OPCODE_HCI_LE_TRANSMITTER_TEST_V4 = HCI_OPCODE (OGF_LE_CONTROLLER, 0x7B),
// Broadcom/Cypress/Infineon/Synaptics
HCI_OPCODE_HCI_BCM_WRITE_SCO_PCM_INT = HCI_OPCODE (0x3f, 0x1c),
HCI_OPCODE_HCI_BCM_SET_SLEEP_MODE = HCI_OPCODE (0x3f, 0x27),
HCI_OPCODE_HCI_BCM_WRITE_I2SPCM_INTERFACE_PARAM = HCI_OPCODE (0x3f, 0x6d),
@ -340,10 +341,23 @@ typedef enum {
HCI_OPCODE_HCI_BCM_WRITE_TX_POWER_TABLE = HCI_OPCODE (0x3f, 0x1C9),
HCI_OPCODE_HCI_BCM_SET_TX_PWR = HCI_OPCODE (0x3f, 0x1A5),
// Texas Instruments
HCI_OPCODE_HCI_TI_VS_CONFIGURE_DDIP = 0xFD55,
// Realtek
HCI_OPCODE_HCI_RTK_CONFIGURE_SCO_ROUTING = HCI_OPCODE (0x3f, 0x93),
HCI_OPCODE_HCI_RTK_READ_CARD_INFO = 0xFC61,
// Marvell/NXP
HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SETTINGS = 0xFC07,
HCI_OPCODE_HCI_NXP_SET_SCO_DATA_PATH = 0xFC1D,
HCI_OPCODE_HCI_NXP_SET_BDADDR = 0xFC22,
HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SYNC_SETTINGS = 0xFC28,
HCI_OPCODE_HCI_NXP_WRITE_PCM_LINK_SETTINGS = 0xFC29,
HCI_OPCODE_HCI_NXP_SET_WBS_CONNECTION = 0xFC73,
HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_AUDIO_CONFIG = 0xFC6F,
HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_CONTROL_ENABLE = 0xFC70,
} hci_opcode_t;
// HCI Commands - see hci_cmd.c for info on parameters
@ -600,10 +614,19 @@ extern const hci_cmd_t hci_ti_write_codec_config;
extern const hci_cmd_t hci_ti_write_hardware_register;
// Relatek specific HCI commands
// Realtek specific HCI commands
extern const hci_cmd_t hci_rtk_configure_sco_routing;
extern const hci_cmd_t hci_rtk_read_card_info;
// Marvell/NXP specific HCI commands
extern const hci_cmd_t hci_nxp_set_sco_data_path;
extern const hci_cmd_t hci_nxp_write_pcm_i2s_settings;
extern const hci_cmd_t hci_nxp_write_pcm_i2s_sync_settings;
extern const hci_cmd_t hci_nxp_write_pcm_link_settings;
extern const hci_cmd_t hci_nxp_set_wbs_connection;
extern const hci_cmd_t hci_nxp_host_pcm_i2s_audio_config;
extern const hci_cmd_t hci_nxp_host_pcm_i2s_control_enable;
/**
* construct HCI Command based on template
* @param hci_cmd_buffer for command