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hci_cmd: add NXP/Marvell PCM/I2S commands
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@ -2625,3 +2625,57 @@ const hci_cmd_t hci_rtk_configure_sco_routing = {
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const hci_cmd_t hci_rtk_read_card_info = {
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HCI_OPCODE_HCI_RTK_READ_CARD_INFO, "11111"
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};
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/**
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* @param voice_path 0x00 - transport, 0x01 - I2S/PCM
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*/
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const hci_cmd_t hci_nxp_set_sco_data_path = {
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HCI_OPCODE_HCI_NXP_SET_SCO_DATA_PATH, "1"
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};
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/**
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* @param settings bits 7-5: reserved, bit 4: pcm clock on, bit 3: reserved, bit 2: pcm sync source, bit 1: master/slave, bit 0: pcm direction
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*/
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const hci_cmd_t hci_nxp_write_pcm_i2s_settings = {
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HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SETTINGS, "1"
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};
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/**
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* @param sync_settings_1 bits 7-2: reserved, bit 1: ISR, bit 0: ISR
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* @param sync_settings_2 bits 15-11: reserved, bit 10: 16k synchronization, bit 9: clock setting, bit 8: main clock, bits 7-5: reserved, bit 4: i2s sent in right channel, bit 3: clock alignment DIN, bit 2: clock alignment DOUT, bits 1-0: mode
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*/
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const hci_cmd_t hci_nxp_write_pcm_i2s_sync_settings = {
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HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SYNC_SETTINGS, "12"
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};
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/**
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* @param settings bits 15-14: reserved, bit 13-10: each bit == one PCM time slot,, bits 9-2: slot relative to PCM synchronization, bits 1-0: PCM slots to be used
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*/
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const hci_cmd_t hci_nxp_write_pcm_link_settings = {
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HCI_OPCODE_HCI_NXP_WRITE_PCM_LINK_SETTINGS, "2"
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};
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/**
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* @param next_connection_wbs 0: CVSD, 1: mSBC
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*/
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const hci_cmd_t hci_nxp_set_wbs_connection = {
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HCI_OPCODE_HCI_NXP_SET_WBS_CONNECTION, "1"
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};
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/**
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* @param action
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* @param operation mode
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* @param sco_handle_1
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* @param sco_handle_2
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*/
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const hci_cmd_t hci_nxp_host_pcm_i2s_audio_config = {
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HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_AUDIO_CONFIG, "11HH"
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};
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/**
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* @param action
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*/
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const hci_cmd_t hci_nxp_host_pcm_i2s_control_enable = {
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HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_CONTROL_ENABLE, "1"
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};
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@ -333,6 +333,7 @@ typedef enum {
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HCI_OPCODE_HCI_LE_SET_TRANSMIT_POWER_REPORTING_ENABLE = HCI_OPCODE (OGF_LE_CONTROLLER, 0x7a),
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HCI_OPCODE_HCI_LE_TRANSMITTER_TEST_V4 = HCI_OPCODE (OGF_LE_CONTROLLER, 0x7B),
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// Broadcom/Cypress/Infineon/Synaptics
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HCI_OPCODE_HCI_BCM_WRITE_SCO_PCM_INT = HCI_OPCODE (0x3f, 0x1c),
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HCI_OPCODE_HCI_BCM_SET_SLEEP_MODE = HCI_OPCODE (0x3f, 0x27),
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HCI_OPCODE_HCI_BCM_WRITE_I2SPCM_INTERFACE_PARAM = HCI_OPCODE (0x3f, 0x6d),
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@ -340,10 +341,23 @@ typedef enum {
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HCI_OPCODE_HCI_BCM_WRITE_TX_POWER_TABLE = HCI_OPCODE (0x3f, 0x1C9),
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HCI_OPCODE_HCI_BCM_SET_TX_PWR = HCI_OPCODE (0x3f, 0x1A5),
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// Texas Instruments
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HCI_OPCODE_HCI_TI_VS_CONFIGURE_DDIP = 0xFD55,
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// Realtek
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HCI_OPCODE_HCI_RTK_CONFIGURE_SCO_ROUTING = HCI_OPCODE (0x3f, 0x93),
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HCI_OPCODE_HCI_RTK_READ_CARD_INFO = 0xFC61,
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// Marvell/NXP
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HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SETTINGS = 0xFC07,
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HCI_OPCODE_HCI_NXP_SET_SCO_DATA_PATH = 0xFC1D,
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HCI_OPCODE_HCI_NXP_SET_BDADDR = 0xFC22,
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HCI_OPCODE_HCI_NXP_WRITE_PCM_I2S_SYNC_SETTINGS = 0xFC28,
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HCI_OPCODE_HCI_NXP_WRITE_PCM_LINK_SETTINGS = 0xFC29,
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HCI_OPCODE_HCI_NXP_SET_WBS_CONNECTION = 0xFC73,
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HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_AUDIO_CONFIG = 0xFC6F,
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HCI_OPCODE_HCI_NXP_HOST_PCM_I2S_CONTROL_ENABLE = 0xFC70,
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} hci_opcode_t;
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// HCI Commands - see hci_cmd.c for info on parameters
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@ -600,10 +614,19 @@ extern const hci_cmd_t hci_ti_write_codec_config;
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extern const hci_cmd_t hci_ti_write_hardware_register;
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// Relatek specific HCI commands
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// Realtek specific HCI commands
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extern const hci_cmd_t hci_rtk_configure_sco_routing;
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extern const hci_cmd_t hci_rtk_read_card_info;
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// Marvell/NXP specific HCI commands
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extern const hci_cmd_t hci_nxp_set_sco_data_path;
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extern const hci_cmd_t hci_nxp_write_pcm_i2s_settings;
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extern const hci_cmd_t hci_nxp_write_pcm_i2s_sync_settings;
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extern const hci_cmd_t hci_nxp_write_pcm_link_settings;
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extern const hci_cmd_t hci_nxp_set_wbs_connection;
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extern const hci_cmd_t hci_nxp_host_pcm_i2s_audio_config;
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extern const hci_cmd_t hci_nxp_host_pcm_i2s_control_enable;
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/**
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* construct HCI Command based on template
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* @param hci_cmd_buffer for command
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