mirror of
https://github.com/bluekitchen/btstack.git
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nrf5: minimal viable port for the nRF5 Series
This commit is contained in:
Matthias Ringwald
parent
de1762f7ab
commit
0283db5655
39
port/nrf5x/btstack_config.h
Normal file
39
port/nrf5x/btstack_config.h
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@ -0,0 +1,39 @@
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//
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// btstack_config.h for WICED port
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//
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#ifndef __BTSTACK_CONFIG
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#define __BTSTACK_CONFIG
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// Port related features
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#define HAVE_BZERO
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#define HAVE_EHCILL
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#define HAVE_TIME_MS
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#define WICED_BT_UART_MANUAL_CTS_RTS
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// BTstack features that can be enabled
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#define ENABLE_BLE
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#define ENABLE_CLASSIC
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#define ENABLE_LOG_INFO
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#define ENABLE_LOG_ERROR
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// BTstack configuration. buffers, sizes, ...
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#define HCI_ACL_PAYLOAD_SIZE 52
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#define MAX_SPP_CONNECTIONS 1
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#define MAX_NO_GATT_CLIENTS 0
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#define MAX_NO_GATT_SUBCLIENTS 0
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#define MAX_NO_HCI_CONNECTIONS MAX_SPP_CONNECTIONS
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#define MAX_NO_L2CAP_SERVICES 2
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#define MAX_NO_L2CAP_CHANNELS (1+MAX_SPP_CONNECTIONS)
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#define MAX_NO_RFCOMM_MULTIPLEXERS MAX_SPP_CONNECTIONS
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#define MAX_NO_RFCOMM_SERVICES 1
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#define MAX_NO_RFCOMM_CHANNELS MAX_SPP_CONNECTIONS
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#define MAX_NO_BTSTACK_LINK_KEY_DB_MEMORYS 2
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#define MAX_NO_BNEP_SERVICES 0
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#define MAX_NO_BNEP_CHANNELS 0
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#define MAX_NO_HFP_CONNECTIONS 0
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#define MAX_NO_WHITELIST_ENTRIES 1
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#define MAX_NO_SM_LOOKUP_ENTRIES 3
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#define MAX_NO_SERVICE_RECORD_ITEMS 1
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#endif
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432
port/nrf5x/config/uart_pca10028/nrf_drv_config.h
Executable file
432
port/nrf5x/config/uart_pca10028/nrf_drv_config.h
Executable file
@ -0,0 +1,432 @@
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/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
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*
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* The information contained herein is property of Nordic Semiconductor ASA.
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* Terms and conditions of usage are described in detail in NORDIC
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* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
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*
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* Licensees are granted free, non-transferable use of the information. NO
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* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
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* the file.
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*
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*/
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#ifndef NRF_DRV_CONFIG_H
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#define NRF_DRV_CONFIG_H
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/**
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* Provide a non-zero value here in applications that need to use several
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* peripherals with the same ID that are sharing certain resources
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* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
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* simultaneously. Therefore, this definition allows to initialize the driver
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* for another peripheral from a given group only after the previously used one
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* is uninitialized. Normally, this is not possible, because interrupt handlers
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* are implemented in individual drivers.
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* This functionality requires a more complicated interrupt handling and driver
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* initialization, hence it is not always desirable to use it.
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*/
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#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
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/* CLOCK */
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#define CLOCK_ENABLED 0
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#if (CLOCK_ENABLED == 1)
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#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
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#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LF_SRC_Xtal
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#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#endif
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/* GPIOTE */
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#define GPIOTE_ENABLED 0
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#if (GPIOTE_ENABLED == 1)
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#define GPIOTE_CONFIG_USE_SWI_EGU false
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#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
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#endif
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/* TIMER */
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#define TIMER0_ENABLED 0
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#if (TIMER0_ENABLED == 1)
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#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
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#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
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#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
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#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER0_INSTANCE_INDEX 0
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#endif
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#define TIMER1_ENABLED 0
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#if (TIMER1_ENABLED == 1)
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#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
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#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
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#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
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#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
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#endif
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#define TIMER2_ENABLED 0
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#if (TIMER2_ENABLED == 1)
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#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
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#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
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#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
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#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
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#endif
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#define TIMER3_ENABLED 0
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#if (TIMER3_ENABLED == 1)
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#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
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#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
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#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
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#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
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#endif
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#define TIMER4_ENABLED 0
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#if (TIMER4_ENABLED == 1)
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#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
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#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
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#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
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#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
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#endif
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#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
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/* RTC */
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#define RTC0_ENABLED 0
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#if (RTC0_ENABLED == 1)
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#define RTC0_CONFIG_FREQUENCY 32678
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#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define RTC0_CONFIG_RELIABLE false
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#define RTC0_INSTANCE_INDEX 0
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#endif
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#define RTC1_ENABLED 0
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#if (RTC1_ENABLED == 1)
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#define RTC1_CONFIG_FREQUENCY 32768
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#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define RTC1_CONFIG_RELIABLE false
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#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
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#endif
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#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED)
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#define NRF_MAXIMUM_LATENCY_US 2000
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/* RNG */
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#define RNG_ENABLED 0
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#if (RNG_ENABLED == 1)
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#define RNG_CONFIG_ERROR_CORRECTION true
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#define RNG_CONFIG_POOL_SIZE 8
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#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#endif
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/* PWM */
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#define PWM0_ENABLED 0
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#if (PWM0_ENABLED == 1)
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#define PWM0_CONFIG_OUT0_PIN 2
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#define PWM0_CONFIG_OUT1_PIN 3
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#define PWM0_CONFIG_OUT2_PIN 4
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#define PWM0_CONFIG_OUT3_PIN 5
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#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
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#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
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#define PWM0_CONFIG_TOP_VALUE 1000
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#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
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#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
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#define PWM0_INSTANCE_INDEX 0
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#endif
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#define PWM1_ENABLED 0
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#if (PWM1_ENABLED == 1)
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#define PWM1_CONFIG_OUT0_PIN 2
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#define PWM1_CONFIG_OUT1_PIN 3
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#define PWM1_CONFIG_OUT2_PIN 4
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#define PWM1_CONFIG_OUT3_PIN 5
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#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
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#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
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#define PWM1_CONFIG_TOP_VALUE 1000
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#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
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#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
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#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
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#endif
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#define PWM2_ENABLED 0
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#if (PWM2_ENABLED == 1)
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#define PWM2_CONFIG_OUT0_PIN 2
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#define PWM2_CONFIG_OUT1_PIN 3
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#define PWM2_CONFIG_OUT2_PIN 4
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#define PWM2_CONFIG_OUT3_PIN 5
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#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
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#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
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#define PWM2_CONFIG_TOP_VALUE 1000
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#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
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#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
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#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
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#endif
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#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
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/* SPI */
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#define SPI0_ENABLED 0
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#if (SPI0_ENABLED == 1)
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#define SPI0_USE_EASY_DMA 0
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#define SPI0_CONFIG_SCK_PIN 2
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#define SPI0_CONFIG_MOSI_PIN 3
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#define SPI0_CONFIG_MISO_PIN 4
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#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define SPI0_INSTANCE_INDEX 0
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#endif
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#define SPI1_ENABLED 0
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#if (SPI1_ENABLED == 1)
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#define SPI1_USE_EASY_DMA 0
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#define SPI1_CONFIG_SCK_PIN 2
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#define SPI1_CONFIG_MOSI_PIN 3
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#define SPI1_CONFIG_MISO_PIN 4
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#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
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#endif
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#define SPI2_ENABLED 0
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#if (SPI2_ENABLED == 1)
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#define SPI2_USE_EASY_DMA 0
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#define SPI2_CONFIG_SCK_PIN 2
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#define SPI2_CONFIG_MOSI_PIN 3
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#define SPI2_CONFIG_MISO_PIN 4
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#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
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#endif
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#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
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/* SPIS */
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#define SPIS0_ENABLED 0
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#if (SPIS0_ENABLED == 1)
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#define SPIS0_CONFIG_SCK_PIN 2
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#define SPIS0_CONFIG_MOSI_PIN 3
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#define SPIS0_CONFIG_MISO_PIN 4
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#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define SPIS0_INSTANCE_INDEX 0
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#endif
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#define SPIS1_ENABLED 0
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#if (SPIS1_ENABLED == 1)
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#define SPIS1_CONFIG_SCK_PIN 2
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#define SPIS1_CONFIG_MOSI_PIN 3
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#define SPIS1_CONFIG_MISO_PIN 4
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#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
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#endif
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#define SPIS2_ENABLED 0
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#if (SPIS2_ENABLED == 1)
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#define SPIS2_CONFIG_SCK_PIN 2
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#define SPIS2_CONFIG_MOSI_PIN 3
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#define SPIS2_CONFIG_MISO_PIN 4
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#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
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#endif
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#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
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/* UART */
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#define UART0_ENABLED 1
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#if (UART0_ENABLED == 1)
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#define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED
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#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
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#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_38400
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#define UART0_CONFIG_PSEL_TXD 9
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#define UART0_CONFIG_PSEL_RXD 11
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#define UART0_CONFIG_PSEL_CTS 10
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#define UART0_CONFIG_PSEL_RTS 8
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#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#ifdef NRF52
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#define UART0_CONFIG_USE_EASY_DMA false
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//Compile time flag
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#define UART_EASY_DMA_SUPPORT 1
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#define UART_LEGACY_SUPPORT 1
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#endif //NRF52
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#endif
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#define TWI0_ENABLED 0
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#if (TWI0_ENABLED == 1)
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#define TWI0_USE_EASY_DMA 0
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#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
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#define TWI0_CONFIG_SCL 0
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#define TWI0_CONFIG_SDA 1
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#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TWI0_INSTANCE_INDEX 0
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#endif
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#define TWI1_ENABLED 0
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#if (TWI1_ENABLED == 1)
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#define TWI1_USE_EASY_DMA 0
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#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
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#define TWI1_CONFIG_SCL 0
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#define TWI1_CONFIG_SDA 1
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#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
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#endif
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#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
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/* TWIS */
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#define TWIS0_ENABLED 0
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#if (TWIS0_ENABLED == 1)
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#define TWIS0_CONFIG_ADDR0 0
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#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
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#define TWIS0_CONFIG_SCL 0
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#define TWIS0_CONFIG_SDA 1
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#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TWIS0_INSTANCE_INDEX 0
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#endif
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#define TWIS1_ENABLED 0
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#if (TWIS1_ENABLED == 1)
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#define TWIS1_CONFIG_ADDR0 0
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#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
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#define TWIS1_CONFIG_SCL 0
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#define TWIS1_CONFIG_SDA 1
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#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
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#endif
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#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
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/* For more documentation see nrf_drv_twis.h file */
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#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
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/* For more documentation see nrf_drv_twis.h file */
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#define TWIS_NO_SYNC_MODE 0
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/* QDEC */
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#define QDEC_ENABLED 0
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#if (QDEC_ENABLED == 1)
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#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
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#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
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#define QDEC_CONFIG_PIO_A 1
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#define QDEC_CONFIG_PIO_B 2
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#define QDEC_CONFIG_PIO_LED 3
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#define QDEC_CONFIG_LEDPRE 511
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#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
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#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#define QDEC_CONFIG_DBFEN false
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#define QDEC_CONFIG_SAMPLE_INTEN false
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#endif
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/* SAADC */
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#define SAADC_ENABLED 0
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#if (SAADC_ENABLED == 1)
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#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
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#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
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#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
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#endif
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/* PDM */
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#define PDM_ENABLED 0
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#if (PDM_ENABLED == 1)
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#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
|
||||
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
|
||||
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
|
||||
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* LPCOMP */
|
||||
#define LPCOMP_ENABLED 0
|
||||
|
||||
#if (LPCOMP_ENABLED == 1)
|
||||
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
|
||||
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
|
||||
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
|
||||
#endif
|
||||
|
||||
/* WDT */
|
||||
#define WDT_ENABLED 0
|
||||
|
||||
#if (WDT_ENABLED == 1)
|
||||
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
|
||||
#define WDT_CONFIG_RELOAD_VALUE 2000
|
||||
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
|
||||
#endif
|
||||
|
||||
/* SWI EGU */
|
||||
#ifdef NRF52
|
||||
#define EGU_ENABLED 0
|
||||
#endif
|
||||
|
||||
/* I2S */
|
||||
#define I2S_ENABLED 0
|
||||
|
||||
#if (I2S_ENABLED == 1)
|
||||
#define I2S_CONFIG_SCK_PIN 22
|
||||
#define I2S_CONFIG_LRCK_PIN 23
|
||||
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
|
||||
#define I2S_CONFIG_SDOUT_PIN 24
|
||||
#define I2S_CONFIG_SDIN_PIN 25
|
||||
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
|
||||
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
|
||||
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
|
||||
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
|
||||
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
|
||||
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
|
||||
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
|
||||
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
|
||||
#endif
|
||||
|
||||
#include "nrf_drv_config_validation.h"
|
||||
|
||||
#endif // NRF_DRV_CONFIG_H
|
||||
432
port/nrf5x/config/uart_pca10036/nrf_drv_config.h
Executable file
432
port/nrf5x/config/uart_pca10036/nrf_drv_config.h
Executable file
@ -0,0 +1,432 @@
|
||||
/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
|
||||
*
|
||||
* The information contained herein is property of Nordic Semiconductor ASA.
|
||||
* Terms and conditions of usage are described in detail in NORDIC
|
||||
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
|
||||
*
|
||||
* Licensees are granted free, non-transferable use of the information. NO
|
||||
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
|
||||
* the file.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef NRF_DRV_CONFIG_H
|
||||
#define NRF_DRV_CONFIG_H
|
||||
|
||||
/**
|
||||
* Provide a non-zero value here in applications that need to use several
|
||||
* peripherals with the same ID that are sharing certain resources
|
||||
* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
|
||||
* simultaneously. Therefore, this definition allows to initialize the driver
|
||||
* for another peripheral from a given group only after the previously used one
|
||||
* is uninitialized. Normally, this is not possible, because interrupt handlers
|
||||
* are implemented in individual drivers.
|
||||
* This functionality requires a more complicated interrupt handling and driver
|
||||
* initialization, hence it is not always desirable to use it.
|
||||
*/
|
||||
#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
|
||||
|
||||
/* CLOCK */
|
||||
#define CLOCK_ENABLED 0
|
||||
|
||||
#if (CLOCK_ENABLED == 1)
|
||||
#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
|
||||
#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LF_SRC_Xtal
|
||||
#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* GPIOTE */
|
||||
#define GPIOTE_ENABLED 0
|
||||
|
||||
#if (GPIOTE_ENABLED == 1)
|
||||
#define GPIOTE_CONFIG_USE_SWI_EGU false
|
||||
#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
|
||||
#endif
|
||||
|
||||
/* TIMER */
|
||||
#define TIMER0_ENABLED 0
|
||||
|
||||
#if (TIMER0_ENABLED == 1)
|
||||
#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
|
||||
#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define TIMER1_ENABLED 0
|
||||
|
||||
#if (TIMER1_ENABLED == 1)
|
||||
#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TIMER2_ENABLED 0
|
||||
|
||||
#if (TIMER2_ENABLED == 1)
|
||||
#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TIMER3_ENABLED 0
|
||||
|
||||
#if (TIMER3_ENABLED == 1)
|
||||
#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TIMER4_ENABLED 0
|
||||
|
||||
#if (TIMER4_ENABLED == 1)
|
||||
#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
|
||||
#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
|
||||
|
||||
/* RTC */
|
||||
#define RTC0_ENABLED 0
|
||||
|
||||
#if (RTC0_ENABLED == 1)
|
||||
#define RTC0_CONFIG_FREQUENCY 32678
|
||||
#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define RTC0_CONFIG_RELIABLE false
|
||||
|
||||
#define RTC0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define RTC1_ENABLED 0
|
||||
|
||||
#if (RTC1_ENABLED == 1)
|
||||
#define RTC1_CONFIG_FREQUENCY 32768
|
||||
#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define RTC1_CONFIG_RELIABLE false
|
||||
|
||||
#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED)
|
||||
|
||||
#define NRF_MAXIMUM_LATENCY_US 2000
|
||||
|
||||
/* RNG */
|
||||
#define RNG_ENABLED 0
|
||||
|
||||
#if (RNG_ENABLED == 1)
|
||||
#define RNG_CONFIG_ERROR_CORRECTION true
|
||||
#define RNG_CONFIG_POOL_SIZE 8
|
||||
#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* PWM */
|
||||
|
||||
#define PWM0_ENABLED 0
|
||||
|
||||
#if (PWM0_ENABLED == 1)
|
||||
#define PWM0_CONFIG_OUT0_PIN 2
|
||||
#define PWM0_CONFIG_OUT1_PIN 3
|
||||
#define PWM0_CONFIG_OUT2_PIN 4
|
||||
#define PWM0_CONFIG_OUT3_PIN 5
|
||||
#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
|
||||
#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
|
||||
#define PWM0_CONFIG_TOP_VALUE 1000
|
||||
#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
|
||||
#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
|
||||
|
||||
#define PWM0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define PWM1_ENABLED 0
|
||||
|
||||
#if (PWM1_ENABLED == 1)
|
||||
#define PWM1_CONFIG_OUT0_PIN 2
|
||||
#define PWM1_CONFIG_OUT1_PIN 3
|
||||
#define PWM1_CONFIG_OUT2_PIN 4
|
||||
#define PWM1_CONFIG_OUT3_PIN 5
|
||||
#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
|
||||
#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
|
||||
#define PWM1_CONFIG_TOP_VALUE 1000
|
||||
#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
|
||||
#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
|
||||
|
||||
#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define PWM2_ENABLED 0
|
||||
|
||||
#if (PWM2_ENABLED == 1)
|
||||
#define PWM2_CONFIG_OUT0_PIN 2
|
||||
#define PWM2_CONFIG_OUT1_PIN 3
|
||||
#define PWM2_CONFIG_OUT2_PIN 4
|
||||
#define PWM2_CONFIG_OUT3_PIN 5
|
||||
#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
|
||||
#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
|
||||
#define PWM2_CONFIG_TOP_VALUE 1000
|
||||
#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
|
||||
#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
|
||||
|
||||
#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
|
||||
#endif
|
||||
|
||||
#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
|
||||
|
||||
/* SPI */
|
||||
#define SPI0_ENABLED 0
|
||||
|
||||
#if (SPI0_ENABLED == 1)
|
||||
#define SPI0_USE_EASY_DMA 0
|
||||
|
||||
#define SPI0_CONFIG_SCK_PIN 2
|
||||
#define SPI0_CONFIG_MOSI_PIN 3
|
||||
#define SPI0_CONFIG_MISO_PIN 4
|
||||
#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPI0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define SPI1_ENABLED 0
|
||||
|
||||
#if (SPI1_ENABLED == 1)
|
||||
#define SPI1_USE_EASY_DMA 0
|
||||
|
||||
#define SPI1_CONFIG_SCK_PIN 2
|
||||
#define SPI1_CONFIG_MOSI_PIN 3
|
||||
#define SPI1_CONFIG_MISO_PIN 4
|
||||
#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define SPI2_ENABLED 0
|
||||
|
||||
#if (SPI2_ENABLED == 1)
|
||||
#define SPI2_USE_EASY_DMA 0
|
||||
|
||||
#define SPI2_CONFIG_SCK_PIN 2
|
||||
#define SPI2_CONFIG_MOSI_PIN 3
|
||||
#define SPI2_CONFIG_MISO_PIN 4
|
||||
#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
|
||||
#endif
|
||||
|
||||
#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
|
||||
|
||||
/* SPIS */
|
||||
#define SPIS0_ENABLED 0
|
||||
|
||||
#if (SPIS0_ENABLED == 1)
|
||||
#define SPIS0_CONFIG_SCK_PIN 2
|
||||
#define SPIS0_CONFIG_MOSI_PIN 3
|
||||
#define SPIS0_CONFIG_MISO_PIN 4
|
||||
#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPIS0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define SPIS1_ENABLED 0
|
||||
|
||||
#if (SPIS1_ENABLED == 1)
|
||||
#define SPIS1_CONFIG_SCK_PIN 2
|
||||
#define SPIS1_CONFIG_MOSI_PIN 3
|
||||
#define SPIS1_CONFIG_MISO_PIN 4
|
||||
#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
|
||||
#endif
|
||||
|
||||
#define SPIS2_ENABLED 0
|
||||
|
||||
#if (SPIS2_ENABLED == 1)
|
||||
#define SPIS2_CONFIG_SCK_PIN 2
|
||||
#define SPIS2_CONFIG_MOSI_PIN 3
|
||||
#define SPIS2_CONFIG_MISO_PIN 4
|
||||
#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
|
||||
#endif
|
||||
|
||||
#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
|
||||
|
||||
/* UART */
|
||||
#define UART0_ENABLED 1
|
||||
|
||||
#if (UART0_ENABLED == 1)
|
||||
#define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED
|
||||
#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
|
||||
#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_38400
|
||||
#define UART0_CONFIG_PSEL_TXD 6
|
||||
#define UART0_CONFIG_PSEL_RXD 8
|
||||
#define UART0_CONFIG_PSEL_CTS 7
|
||||
#define UART0_CONFIG_PSEL_RTS 5
|
||||
#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#ifdef NRF52
|
||||
#define UART0_CONFIG_USE_EASY_DMA false
|
||||
//Compile time flag
|
||||
#define UART_EASY_DMA_SUPPORT 1
|
||||
#define UART_LEGACY_SUPPORT 1
|
||||
#endif //NRF52
|
||||
#endif
|
||||
|
||||
#define TWI0_ENABLED 0
|
||||
|
||||
#if (TWI0_ENABLED == 1)
|
||||
#define TWI0_USE_EASY_DMA 0
|
||||
|
||||
#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
|
||||
#define TWI0_CONFIG_SCL 0
|
||||
#define TWI0_CONFIG_SDA 1
|
||||
#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWI0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define TWI1_ENABLED 0
|
||||
|
||||
#if (TWI1_ENABLED == 1)
|
||||
#define TWI1_USE_EASY_DMA 0
|
||||
|
||||
#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
|
||||
#define TWI1_CONFIG_SCL 0
|
||||
#define TWI1_CONFIG_SDA 1
|
||||
#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
|
||||
|
||||
/* TWIS */
|
||||
#define TWIS0_ENABLED 0
|
||||
|
||||
#if (TWIS0_ENABLED == 1)
|
||||
#define TWIS0_CONFIG_ADDR0 0
|
||||
#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
|
||||
#define TWIS0_CONFIG_SCL 0
|
||||
#define TWIS0_CONFIG_SDA 1
|
||||
#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWIS0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define TWIS1_ENABLED 0
|
||||
|
||||
#if (TWIS1_ENABLED == 1)
|
||||
#define TWIS1_CONFIG_ADDR0 0
|
||||
#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
|
||||
#define TWIS1_CONFIG_SCL 0
|
||||
#define TWIS1_CONFIG_SDA 1
|
||||
#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
|
||||
/* For more documentation see nrf_drv_twis.h file */
|
||||
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
|
||||
/* For more documentation see nrf_drv_twis.h file */
|
||||
#define TWIS_NO_SYNC_MODE 0
|
||||
|
||||
/* QDEC */
|
||||
#define QDEC_ENABLED 0
|
||||
|
||||
#if (QDEC_ENABLED == 1)
|
||||
#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
|
||||
#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
|
||||
#define QDEC_CONFIG_PIO_A 1
|
||||
#define QDEC_CONFIG_PIO_B 2
|
||||
#define QDEC_CONFIG_PIO_LED 3
|
||||
#define QDEC_CONFIG_LEDPRE 511
|
||||
#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
|
||||
#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define QDEC_CONFIG_DBFEN false
|
||||
#define QDEC_CONFIG_SAMPLE_INTEN false
|
||||
#endif
|
||||
|
||||
/* SAADC */
|
||||
#define SAADC_ENABLED 0
|
||||
|
||||
#if (SAADC_ENABLED == 1)
|
||||
#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
|
||||
#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
|
||||
#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* PDM */
|
||||
#define PDM_ENABLED 0
|
||||
|
||||
#if (PDM_ENABLED == 1)
|
||||
#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
|
||||
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
|
||||
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
|
||||
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* LPCOMP */
|
||||
#define LPCOMP_ENABLED 0
|
||||
|
||||
#if (LPCOMP_ENABLED == 1)
|
||||
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
|
||||
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
|
||||
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
|
||||
#endif
|
||||
|
||||
/* WDT */
|
||||
#define WDT_ENABLED 0
|
||||
|
||||
#if (WDT_ENABLED == 1)
|
||||
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
|
||||
#define WDT_CONFIG_RELOAD_VALUE 2000
|
||||
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
|
||||
#endif
|
||||
|
||||
/* SWI EGU */
|
||||
#ifdef NRF52
|
||||
#define EGU_ENABLED 0
|
||||
#endif
|
||||
|
||||
/* I2S */
|
||||
#define I2S_ENABLED 0
|
||||
|
||||
#if (I2S_ENABLED == 1)
|
||||
#define I2S_CONFIG_SCK_PIN 22
|
||||
#define I2S_CONFIG_LRCK_PIN 23
|
||||
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
|
||||
#define I2S_CONFIG_SDOUT_PIN 24
|
||||
#define I2S_CONFIG_SDIN_PIN 25
|
||||
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
|
||||
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
|
||||
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
|
||||
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
|
||||
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
|
||||
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
|
||||
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
|
||||
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
|
||||
#endif
|
||||
|
||||
#include "nrf_drv_config_validation.h"
|
||||
|
||||
#endif // NRF_DRV_CONFIG_H
|
||||
432
port/nrf5x/config/uart_pca10040/nrf_drv_config.h
Executable file
432
port/nrf5x/config/uart_pca10040/nrf_drv_config.h
Executable file
@ -0,0 +1,432 @@
|
||||
/* Copyright (c) 2015 Nordic Semiconductor. All Rights Reserved.
|
||||
*
|
||||
* The information contained herein is property of Nordic Semiconductor ASA.
|
||||
* Terms and conditions of usage are described in detail in NORDIC
|
||||
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
|
||||
*
|
||||
* Licensees are granted free, non-transferable use of the information. NO
|
||||
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
|
||||
* the file.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef NRF_DRV_CONFIG_H
|
||||
#define NRF_DRV_CONFIG_H
|
||||
|
||||
/**
|
||||
* Provide a non-zero value here in applications that need to use several
|
||||
* peripherals with the same ID that are sharing certain resources
|
||||
* (for example, SPI0 and TWI0). Obviously, such peripherals cannot be used
|
||||
* simultaneously. Therefore, this definition allows to initialize the driver
|
||||
* for another peripheral from a given group only after the previously used one
|
||||
* is uninitialized. Normally, this is not possible, because interrupt handlers
|
||||
* are implemented in individual drivers.
|
||||
* This functionality requires a more complicated interrupt handling and driver
|
||||
* initialization, hence it is not always desirable to use it.
|
||||
*/
|
||||
#define PERIPHERAL_RESOURCE_SHARING_ENABLED 0
|
||||
|
||||
/* CLOCK */
|
||||
#define CLOCK_ENABLED 0
|
||||
|
||||
#if (CLOCK_ENABLED == 1)
|
||||
#define CLOCK_CONFIG_XTAL_FREQ NRF_CLOCK_XTALFREQ_Default
|
||||
#define CLOCK_CONFIG_LF_SRC NRF_CLOCK_LF_SRC_Xtal
|
||||
#define CLOCK_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* GPIOTE */
|
||||
#define GPIOTE_ENABLED 0
|
||||
|
||||
#if (GPIOTE_ENABLED == 1)
|
||||
#define GPIOTE_CONFIG_USE_SWI_EGU false
|
||||
#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
|
||||
#endif
|
||||
|
||||
/* TIMER */
|
||||
#define TIMER0_ENABLED 0
|
||||
|
||||
#if (TIMER0_ENABLED == 1)
|
||||
#define TIMER0_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER0_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER0_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_32Bit
|
||||
#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define TIMER1_ENABLED 0
|
||||
|
||||
#if (TIMER1_ENABLED == 1)
|
||||
#define TIMER1_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER1_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER1_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER1_INSTANCE_INDEX (TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TIMER2_ENABLED 0
|
||||
|
||||
#if (TIMER2_ENABLED == 1)
|
||||
#define TIMER2_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER2_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER2_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER2_INSTANCE_INDEX (TIMER1_ENABLED+TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TIMER3_ENABLED 0
|
||||
|
||||
#if (TIMER3_ENABLED == 1)
|
||||
#define TIMER3_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER3_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER3_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER3_INSTANCE_INDEX (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TIMER4_ENABLED 0
|
||||
|
||||
#if (TIMER4_ENABLED == 1)
|
||||
#define TIMER4_CONFIG_FREQUENCY NRF_TIMER_FREQ_16MHz
|
||||
#define TIMER4_CONFIG_MODE TIMER_MODE_MODE_Timer
|
||||
#define TIMER4_CONFIG_BIT_WIDTH TIMER_BITMODE_BITMODE_16Bit
|
||||
#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TIMER4_INSTANCE_INDEX (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
|
||||
#endif
|
||||
|
||||
|
||||
#define TIMER_COUNT (TIMER0_ENABLED + TIMER1_ENABLED + TIMER2_ENABLED + TIMER3_ENABLED + TIMER4_ENABLED)
|
||||
|
||||
/* RTC */
|
||||
#define RTC0_ENABLED 0
|
||||
|
||||
#if (RTC0_ENABLED == 1)
|
||||
#define RTC0_CONFIG_FREQUENCY 32678
|
||||
#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define RTC0_CONFIG_RELIABLE false
|
||||
|
||||
#define RTC0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define RTC1_ENABLED 0
|
||||
|
||||
#if (RTC1_ENABLED == 1)
|
||||
#define RTC1_CONFIG_FREQUENCY 32768
|
||||
#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define RTC1_CONFIG_RELIABLE false
|
||||
|
||||
#define RTC1_INSTANCE_INDEX (RTC0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define RTC_COUNT (RTC0_ENABLED+RTC1_ENABLED)
|
||||
|
||||
#define NRF_MAXIMUM_LATENCY_US 2000
|
||||
|
||||
/* RNG */
|
||||
#define RNG_ENABLED 0
|
||||
|
||||
#if (RNG_ENABLED == 1)
|
||||
#define RNG_CONFIG_ERROR_CORRECTION true
|
||||
#define RNG_CONFIG_POOL_SIZE 8
|
||||
#define RNG_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* PWM */
|
||||
|
||||
#define PWM0_ENABLED 0
|
||||
|
||||
#if (PWM0_ENABLED == 1)
|
||||
#define PWM0_CONFIG_OUT0_PIN 2
|
||||
#define PWM0_CONFIG_OUT1_PIN 3
|
||||
#define PWM0_CONFIG_OUT2_PIN 4
|
||||
#define PWM0_CONFIG_OUT3_PIN 5
|
||||
#define PWM0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define PWM0_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
|
||||
#define PWM0_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
|
||||
#define PWM0_CONFIG_TOP_VALUE 1000
|
||||
#define PWM0_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
|
||||
#define PWM0_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
|
||||
|
||||
#define PWM0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define PWM1_ENABLED 0
|
||||
|
||||
#if (PWM1_ENABLED == 1)
|
||||
#define PWM1_CONFIG_OUT0_PIN 2
|
||||
#define PWM1_CONFIG_OUT1_PIN 3
|
||||
#define PWM1_CONFIG_OUT2_PIN 4
|
||||
#define PWM1_CONFIG_OUT3_PIN 5
|
||||
#define PWM1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define PWM1_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
|
||||
#define PWM1_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
|
||||
#define PWM1_CONFIG_TOP_VALUE 1000
|
||||
#define PWM1_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
|
||||
#define PWM1_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
|
||||
|
||||
#define PWM1_INSTANCE_INDEX (PWM0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define PWM2_ENABLED 0
|
||||
|
||||
#if (PWM2_ENABLED == 1)
|
||||
#define PWM2_CONFIG_OUT0_PIN 2
|
||||
#define PWM2_CONFIG_OUT1_PIN 3
|
||||
#define PWM2_CONFIG_OUT2_PIN 4
|
||||
#define PWM2_CONFIG_OUT3_PIN 5
|
||||
#define PWM2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define PWM2_CONFIG_BASE_CLOCK NRF_PWM_CLK_1MHz
|
||||
#define PWM2_CONFIG_COUNT_MODE NRF_PWM_MODE_UP
|
||||
#define PWM2_CONFIG_TOP_VALUE 1000
|
||||
#define PWM2_CONFIG_LOAD_MODE NRF_PWM_LOAD_COMMON
|
||||
#define PWM2_CONFIG_STEP_MODE NRF_PWM_STEP_AUTO
|
||||
|
||||
#define PWM2_INSTANCE_INDEX (PWM0_ENABLED + PWM1_ENABLED)
|
||||
#endif
|
||||
|
||||
#define PWM_COUNT (PWM0_ENABLED + PWM1_ENABLED + PWM2_ENABLED)
|
||||
|
||||
/* SPI */
|
||||
#define SPI0_ENABLED 0
|
||||
|
||||
#if (SPI0_ENABLED == 1)
|
||||
#define SPI0_USE_EASY_DMA 0
|
||||
|
||||
#define SPI0_CONFIG_SCK_PIN 2
|
||||
#define SPI0_CONFIG_MOSI_PIN 3
|
||||
#define SPI0_CONFIG_MISO_PIN 4
|
||||
#define SPI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPI0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define SPI1_ENABLED 0
|
||||
|
||||
#if (SPI1_ENABLED == 1)
|
||||
#define SPI1_USE_EASY_DMA 0
|
||||
|
||||
#define SPI1_CONFIG_SCK_PIN 2
|
||||
#define SPI1_CONFIG_MOSI_PIN 3
|
||||
#define SPI1_CONFIG_MISO_PIN 4
|
||||
#define SPI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define SPI2_ENABLED 0
|
||||
|
||||
#if (SPI2_ENABLED == 1)
|
||||
#define SPI2_USE_EASY_DMA 0
|
||||
|
||||
#define SPI2_CONFIG_SCK_PIN 2
|
||||
#define SPI2_CONFIG_MOSI_PIN 3
|
||||
#define SPI2_CONFIG_MISO_PIN 4
|
||||
#define SPI2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
|
||||
#endif
|
||||
|
||||
#define SPI_COUNT (SPI0_ENABLED + SPI1_ENABLED + SPI2_ENABLED)
|
||||
|
||||
/* SPIS */
|
||||
#define SPIS0_ENABLED 0
|
||||
|
||||
#if (SPIS0_ENABLED == 1)
|
||||
#define SPIS0_CONFIG_SCK_PIN 2
|
||||
#define SPIS0_CONFIG_MOSI_PIN 3
|
||||
#define SPIS0_CONFIG_MISO_PIN 4
|
||||
#define SPIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPIS0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define SPIS1_ENABLED 0
|
||||
|
||||
#if (SPIS1_ENABLED == 1)
|
||||
#define SPIS1_CONFIG_SCK_PIN 2
|
||||
#define SPIS1_CONFIG_MOSI_PIN 3
|
||||
#define SPIS1_CONFIG_MISO_PIN 4
|
||||
#define SPIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
|
||||
#endif
|
||||
|
||||
#define SPIS2_ENABLED 0
|
||||
|
||||
#if (SPIS2_ENABLED == 1)
|
||||
#define SPIS2_CONFIG_SCK_PIN 2
|
||||
#define SPIS2_CONFIG_MOSI_PIN 3
|
||||
#define SPIS2_CONFIG_MISO_PIN 4
|
||||
#define SPIS2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
|
||||
#endif
|
||||
|
||||
#define SPIS_COUNT (SPIS0_ENABLED + SPIS1_ENABLED + SPIS2_ENABLED)
|
||||
|
||||
/* UART */
|
||||
#define UART0_ENABLED 1
|
||||
|
||||
#if (UART0_ENABLED == 1)
|
||||
#define UART0_CONFIG_HWFC NRF_UART_HWFC_DISABLED
|
||||
#define UART0_CONFIG_PARITY NRF_UART_PARITY_EXCLUDED
|
||||
#define UART0_CONFIG_BAUDRATE NRF_UART_BAUDRATE_38400
|
||||
#define UART0_CONFIG_PSEL_TXD 6
|
||||
#define UART0_CONFIG_PSEL_RXD 8
|
||||
#define UART0_CONFIG_PSEL_CTS 7
|
||||
#define UART0_CONFIG_PSEL_RTS 5
|
||||
#define UART0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#ifdef NRF52
|
||||
#define UART0_CONFIG_USE_EASY_DMA false
|
||||
//Compile time flag
|
||||
#define UART_EASY_DMA_SUPPORT 1
|
||||
#define UART_LEGACY_SUPPORT 1
|
||||
#endif //NRF52
|
||||
#endif
|
||||
|
||||
#define TWI0_ENABLED 0
|
||||
|
||||
#if (TWI0_ENABLED == 1)
|
||||
#define TWI0_USE_EASY_DMA 0
|
||||
|
||||
#define TWI0_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
|
||||
#define TWI0_CONFIG_SCL 0
|
||||
#define TWI0_CONFIG_SDA 1
|
||||
#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWI0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define TWI1_ENABLED 0
|
||||
|
||||
#if (TWI1_ENABLED == 1)
|
||||
#define TWI1_USE_EASY_DMA 0
|
||||
|
||||
#define TWI1_CONFIG_FREQUENCY NRF_TWI_FREQ_100K
|
||||
#define TWI1_CONFIG_SCL 0
|
||||
#define TWI1_CONFIG_SDA 1
|
||||
#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWI1_INSTANCE_INDEX (TWI0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TWI_COUNT (TWI0_ENABLED + TWI1_ENABLED)
|
||||
|
||||
/* TWIS */
|
||||
#define TWIS0_ENABLED 0
|
||||
|
||||
#if (TWIS0_ENABLED == 1)
|
||||
#define TWIS0_CONFIG_ADDR0 0
|
||||
#define TWIS0_CONFIG_ADDR1 0 /* 0: Disabled */
|
||||
#define TWIS0_CONFIG_SCL 0
|
||||
#define TWIS0_CONFIG_SDA 1
|
||||
#define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWIS0_INSTANCE_INDEX 0
|
||||
#endif
|
||||
|
||||
#define TWIS1_ENABLED 0
|
||||
|
||||
#if (TWIS1_ENABLED == 1)
|
||||
#define TWIS1_CONFIG_ADDR0 0
|
||||
#define TWIS1_CONFIG_ADDR1 0 /* 0: Disabled */
|
||||
#define TWIS1_CONFIG_SCL 0
|
||||
#define TWIS1_CONFIG_SDA 1
|
||||
#define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
|
||||
#define TWIS1_INSTANCE_INDEX (TWIS0_ENABLED)
|
||||
#endif
|
||||
|
||||
#define TWIS_COUNT (TWIS0_ENABLED + TWIS1_ENABLED)
|
||||
/* For more documentation see nrf_drv_twis.h file */
|
||||
#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
|
||||
/* For more documentation see nrf_drv_twis.h file */
|
||||
#define TWIS_NO_SYNC_MODE 0
|
||||
|
||||
/* QDEC */
|
||||
#define QDEC_ENABLED 0
|
||||
|
||||
#if (QDEC_ENABLED == 1)
|
||||
#define QDEC_CONFIG_REPORTPER NRF_QDEC_REPORTPER_10
|
||||
#define QDEC_CONFIG_SAMPLEPER NRF_QDEC_SAMPLEPER_16384us
|
||||
#define QDEC_CONFIG_PIO_A 1
|
||||
#define QDEC_CONFIG_PIO_B 2
|
||||
#define QDEC_CONFIG_PIO_LED 3
|
||||
#define QDEC_CONFIG_LEDPRE 511
|
||||
#define QDEC_CONFIG_LEDPOL NRF_QDEC_LEPOL_ACTIVE_HIGH
|
||||
#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define QDEC_CONFIG_DBFEN false
|
||||
#define QDEC_CONFIG_SAMPLE_INTEN false
|
||||
#endif
|
||||
|
||||
/* SAADC */
|
||||
#define SAADC_ENABLED 0
|
||||
|
||||
#if (SAADC_ENABLED == 1)
|
||||
#define SAADC_CONFIG_RESOLUTION NRF_SAADC_RESOLUTION_10BIT
|
||||
#define SAADC_CONFIG_OVERSAMPLE NRF_SAADC_OVERSAMPLE_DISABLED
|
||||
#define SAADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* PDM */
|
||||
#define PDM_ENABLED 0
|
||||
|
||||
#if (PDM_ENABLED == 1)
|
||||
#define PDM_CONFIG_MODE NRF_PDM_MODE_MONO
|
||||
#define PDM_CONFIG_EDGE NRF_PDM_EDGE_LEFTFALLING
|
||||
#define PDM_CONFIG_CLOCK_FREQ NRF_PDM_FREQ_1032K
|
||||
#define PDM_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#endif
|
||||
|
||||
/* LPCOMP */
|
||||
#define LPCOMP_ENABLED 0
|
||||
|
||||
#if (LPCOMP_ENABLED == 1)
|
||||
#define LPCOMP_CONFIG_REFERENCE NRF_LPCOMP_REF_SUPPLY_4_8
|
||||
#define LPCOMP_CONFIG_DETECTION NRF_LPCOMP_DETECT_DOWN
|
||||
#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
|
||||
#define LPCOMP_CONFIG_INPUT NRF_LPCOMP_INPUT_0
|
||||
#endif
|
||||
|
||||
/* WDT */
|
||||
#define WDT_ENABLED 0
|
||||
|
||||
#if (WDT_ENABLED == 1)
|
||||
#define WDT_CONFIG_BEHAVIOUR NRF_WDT_BEHAVIOUR_RUN_SLEEP
|
||||
#define WDT_CONFIG_RELOAD_VALUE 2000
|
||||
#define WDT_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
|
||||
#endif
|
||||
|
||||
/* SWI EGU */
|
||||
#ifdef NRF52
|
||||
#define EGU_ENABLED 0
|
||||
#endif
|
||||
|
||||
/* I2S */
|
||||
#define I2S_ENABLED 0
|
||||
|
||||
#if (I2S_ENABLED == 1)
|
||||
#define I2S_CONFIG_SCK_PIN 22
|
||||
#define I2S_CONFIG_LRCK_PIN 23
|
||||
#define I2S_CONFIG_MCK_PIN NRF_DRV_I2S_PIN_NOT_USED
|
||||
#define I2S_CONFIG_SDOUT_PIN 24
|
||||
#define I2S_CONFIG_SDIN_PIN 25
|
||||
#define I2S_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_HIGH
|
||||
#define I2S_CONFIG_MASTER NRF_I2S_MODE_MASTER
|
||||
#define I2S_CONFIG_FORMAT NRF_I2S_FORMAT_I2S
|
||||
#define I2S_CONFIG_ALIGN NRF_I2S_ALIGN_LEFT
|
||||
#define I2S_CONFIG_SWIDTH NRF_I2S_SWIDTH_16BIT
|
||||
#define I2S_CONFIG_CHANNELS NRF_I2S_CHANNELS_STEREO
|
||||
#define I2S_CONFIG_MCK_SETUP NRF_I2S_MCK_32MDIV8
|
||||
#define I2S_CONFIG_RATIO NRF_I2S_RATIO_256X
|
||||
#endif
|
||||
|
||||
#include "nrf_drv_config_validation.h"
|
||||
|
||||
#endif // NRF_DRV_CONFIG_H
|
||||
100
port/nrf5x/create_examples.py
Executable file
100
port/nrf5x/create_examples.py
Executable file
@ -0,0 +1,100 @@
|
||||
#!/usr/bin/env python
|
||||
#
|
||||
# Create project files for all BTstack embedded examples in nRF5_X/examples/btstack
|
||||
|
||||
import os
|
||||
import shutil
|
||||
import sys
|
||||
import time
|
||||
import subprocess
|
||||
|
||||
mk_template = '''#
|
||||
# BTstack example 'EXAMPLE' for n RF5x port
|
||||
#
|
||||
# Generated by TOOL
|
||||
# On DATE
|
||||
|
||||
NAME := EXAMPLE
|
||||
|
||||
GLOBAL_INCLUDES += .
|
||||
|
||||
$(NAME)_SOURCES := ../../../libraries/btstack/example/EXAMPLE.c
|
||||
$(NAME)_COMPONENTS += btstack/port/wiced
|
||||
'''
|
||||
|
||||
gatt_update_template = '''#!/bin/sh
|
||||
DIR=`dirname $0`
|
||||
BTSTACK_ROOT=$DIR/../../../libraries/btstack
|
||||
echo "Creating EXAMPLE.h from EXAMPLE.gatt"
|
||||
$BTSTACK_ROOT/tool/compile-gatt.py $BTSTACK_ROOT/example/EXAMPLE.gatt $DIR/EXAMPLE.h
|
||||
'''
|
||||
|
||||
# get script path
|
||||
script_path = os.path.abspath(os.path.dirname(sys.argv[0]))
|
||||
|
||||
# validate nRF5x SDK root by reading version.txt
|
||||
nrf5x_root = script_path + "/../../../../"
|
||||
|
||||
nrf5x_index = ""
|
||||
try:
|
||||
with open(nrf5x_root + '/documentation/index.html', 'r') as fin:
|
||||
nrf5x_index = fin.read() # Read the contents of the file into memory.
|
||||
except:
|
||||
pass
|
||||
if not "nRF5 SDK Documentation" in nrf5x_index:
|
||||
print("Cannot find nRF5 root. Make sure BTstack is checked out in nRF5-SDK-X/components")
|
||||
sys.exit(1)
|
||||
|
||||
# show nRF5 version
|
||||
# print("Found %s" % nrf5x_version)
|
||||
|
||||
# path to examples
|
||||
examples_embedded = script_path + "/../../example/"
|
||||
|
||||
# path to WICED/apps/btstack
|
||||
apps_btstack = nrf5x_root + "/examples/btstack/"
|
||||
|
||||
print("Creating examples in examples/btstack:")
|
||||
|
||||
# iterate over btstack examples
|
||||
for file in os.listdir(examples_embedded):
|
||||
if not file.endswith(".c"):
|
||||
continue
|
||||
if not file == "gap_le_advertisements.c":
|
||||
continue
|
||||
|
||||
example = file[:-2]
|
||||
|
||||
# create folder
|
||||
apps_folder = apps_btstack + example + "/"
|
||||
if not os.path.exists(apps_folder):
|
||||
os.makedirs(apps_folder)
|
||||
|
||||
# just copy current makefiles and config over
|
||||
pca10028_folder = apps_folder+'/pca10028'
|
||||
if not os.path.exists(pca10028_folder):
|
||||
shutil.copytree(script_path + '/pca10028', pca10028_folder)
|
||||
config_folder = apps_folder+'config'
|
||||
if not os.path.exists(config_folder):
|
||||
shutil.copytree(script_path + '/config', config_folder)
|
||||
print("- %s" % example)
|
||||
continue
|
||||
|
||||
# will be used later... :)
|
||||
|
||||
# create .mk file
|
||||
with open(apps_folder + example + ".mk", "wt") as fout:
|
||||
fout.write(mk_template.replace("EXAMPLE", example).replace("TOOL", script_path).replace("DATE",time.strftime("%c")))
|
||||
|
||||
# create update_gatt.sh if .gatt file is present
|
||||
gatt_path = examples_embedded + example + ".gatt"
|
||||
if os.path.exists(gatt_path):
|
||||
update_gatt_script = apps_folder + "update_gatt_db.sh"
|
||||
with open(update_gatt_script, "wt") as fout:
|
||||
fout.write(gatt_update_template.replace("EXAMPLE", example))
|
||||
os.chmod(update_gatt_script, 0o755)
|
||||
subprocess.call(update_gatt_script + "> /dev/null", shell=True)
|
||||
print("- %s including compiled GATT DB" % example)
|
||||
else:
|
||||
print("- %s" % example)
|
||||
|
||||
531
port/nrf5x/main.c
Executable file
531
port/nrf5x/main.c
Executable file
@ -0,0 +1,531 @@
|
||||
/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
|
||||
*
|
||||
* The information contained herein is property of Nordic Semiconductor ASA.
|
||||
* Terms and conditions of usage are described in detail in NORDIC
|
||||
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
|
||||
*
|
||||
* Licensees are granted free, non-transferable use of the information. NO
|
||||
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
|
||||
* the file.
|
||||
*
|
||||
*/
|
||||
|
||||
/**
|
||||
* BTstack Link Layer implementation
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
#include "app_uart.h"
|
||||
#include "app_error.h"
|
||||
#include "nrf_delay.h"
|
||||
#include "nrf.h"
|
||||
#include "bsp.h"
|
||||
|
||||
#include "btstack_config.h"
|
||||
#include "btstack_memory.h"
|
||||
#include "btstack_run_loop.h"
|
||||
#include "btstack_run_loop_embedded.h"
|
||||
#include "hci_transport.h"
|
||||
#include "hci_dump.h"
|
||||
#include "hal_cpu.h"
|
||||
#include "hal_time_ms.h"
|
||||
|
||||
// bluetooth.h
|
||||
#define ADVERTISING_RADIO_ACCESS_ADDRESS 0x8E89BED6
|
||||
#define ADVERTISING_CRC_INIT 0x555555
|
||||
|
||||
typedef enum {
|
||||
LL_STATE_STANDBY,
|
||||
LL_STATE_SCANNING,
|
||||
LL_STATE_ADVERTISING,
|
||||
LL_STATE_INITIATING,
|
||||
LL_STATE_CONNECTED
|
||||
} ll_state_t;
|
||||
|
||||
// from SDK UART exzmple
|
||||
#define UART_TX_BUF_SIZE 128 /**< UART TX buffer size. */
|
||||
#define UART_RX_BUF_SIZE 1 /**< UART RX buffer size. */
|
||||
|
||||
// packet receive buffer
|
||||
#define MAXLEN 255
|
||||
static uint8_t rx_adv_buffer[2 + MAXLEN];
|
||||
|
||||
// hci transport
|
||||
static void (*packet_handler)(uint8_t packet_type, uint8_t *packet, uint16_t size);
|
||||
static hci_transport_t hci_transport;
|
||||
static uint8_t hci_outgoing_event[258];
|
||||
static uint8_t hci_outgoing_event_ready;
|
||||
static btstack_data_source_t hci_transport_data_source;
|
||||
|
||||
// Link Layer State
|
||||
static ll_state_t ll_state;
|
||||
static uint32_t ll_scan_interval_us;
|
||||
static uint32_t ll_scan_window_us;
|
||||
|
||||
|
||||
void uart_error_handle(app_uart_evt_t * p_event)
|
||||
{
|
||||
if (p_event->evt_type == APP_UART_COMMUNICATION_ERROR)
|
||||
{
|
||||
APP_ERROR_HANDLER(p_event->data.error_communication);
|
||||
}
|
||||
else if (p_event->evt_type == APP_UART_FIFO_ERROR)
|
||||
{
|
||||
APP_ERROR_HANDLER(p_event->data.error_code);
|
||||
}
|
||||
}
|
||||
|
||||
static void init_timer() {
|
||||
|
||||
#if 1
|
||||
// start high frequency clock source if not done yet
|
||||
if ( !NRF_CLOCK->EVENTS_HFCLKSTARTED ) {
|
||||
printf("1\n");
|
||||
NRF_CLOCK->TASKS_HFCLKSTART = 1;
|
||||
while ( !NRF_CLOCK->EVENTS_HFCLKSTARTED ){
|
||||
// just wait
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
NRF_TIMER0->MODE = TIMER_MODE_MODE_Timer << TIMER_MODE_MODE_Pos;
|
||||
NRF_TIMER0->BITMODE = TIMER_BITMODE_BITMODE_32Bit;
|
||||
NRF_TIMER0->PRESCALER = 4; // 16 Mhz / (2 ^ 4) = 1 Mhz == 1 us
|
||||
|
||||
NRF_TIMER0->TASKS_STOP = 1;
|
||||
NRF_TIMER0->TASKS_CLEAR = 1;
|
||||
#if 0
|
||||
NRF_TIMER0->EVENTS_COMPARE[ 0 ] = 0;
|
||||
NRF_TIMER0->EVENTS_COMPARE[ 1 ] = 0;
|
||||
NRF_TIMER0->EVENTS_COMPARE[ 2 ] = 0;
|
||||
NRF_TIMER0->EVENTS_COMPARE[ 3 ] = 0;
|
||||
NRF_TIMER0->INTENCLR = 0xffffffff;
|
||||
#endif
|
||||
NRF_TIMER0->TASKS_START = 1;
|
||||
}
|
||||
|
||||
static void radio_set_access_address(uint32_t access_address) {
|
||||
NRF_RADIO->BASE0 = ( access_address << 8 ) & 0xFFFFFF00;
|
||||
NRF_RADIO->PREFIX0 = ( access_address >> 24 ) & RADIO_PREFIX0_AP0_Msk;
|
||||
}
|
||||
|
||||
static void radio_set_crc_init(uint32_t crc_init){
|
||||
NRF_RADIO->CRCINIT = crc_init;
|
||||
}
|
||||
|
||||
// look up RF Center Frequency for data channels 0..36 and advertising channels 37..39
|
||||
static uint8_t radio_frequency_for_channel(uint8_t channel){
|
||||
if (channel <= 10){
|
||||
return 4 + 2 * channel;
|
||||
}
|
||||
if (channel <= 36){
|
||||
return 6 + 2 * channel;
|
||||
}
|
||||
if (channel == 37){
|
||||
return 2;
|
||||
}
|
||||
if (channel == 38){
|
||||
return 26;
|
||||
}
|
||||
return 80;
|
||||
}
|
||||
|
||||
static void radio_init(void){
|
||||
|
||||
#ifdef NRF51
|
||||
// Handle BLE Radio tuning parameters from production if required.
|
||||
// Does not exist on NRF52
|
||||
// See PCN-083.
|
||||
if (NRF_FICR->OVERRIDEEN & FICR_OVERRIDEEN_BLE_1MBIT_Msk){
|
||||
NRF_RADIO->OVERRIDE0 = NRF_FICR->BLE_1MBIT[0];
|
||||
NRF_RADIO->OVERRIDE1 = NRF_FICR->BLE_1MBIT[1];
|
||||
NRF_RADIO->OVERRIDE2 = NRF_FICR->BLE_1MBIT[2];
|
||||
NRF_RADIO->OVERRIDE3 = NRF_FICR->BLE_1MBIT[3];
|
||||
NRF_RADIO->OVERRIDE4 = NRF_FICR->BLE_1MBIT[4] | 0x80000000;
|
||||
}
|
||||
#endif // NRF51
|
||||
|
||||
// Mode: BLE 1 Mbps
|
||||
NRF_RADIO->MODE = RADIO_MODE_MODE_Ble_1Mbit << RADIO_MODE_MODE_Pos;
|
||||
|
||||
// PacketConfig 0:
|
||||
// ---
|
||||
// LENGTH field in bits = 8
|
||||
// S0 field in bytes = 1
|
||||
// S1 field not used
|
||||
// 8 bit preamble
|
||||
NRF_RADIO->PCNF0 =
|
||||
( 8 << RADIO_PCNF0_LFLEN_Pos ) |
|
||||
( 1 << RADIO_PCNF0_S0LEN_Pos ) |
|
||||
( 0 << RADIO_PCNF0_S1LEN_Pos );
|
||||
|
||||
// PacketConfig 1:
|
||||
// ---
|
||||
// Payload MAXLEN = MAXLEN
|
||||
// No additional bytes
|
||||
// 4 address bytes (1 + 3)
|
||||
// S0, LENGTH, S1, PAYLOAD in little endian
|
||||
// Packet whitening enabled
|
||||
NRF_RADIO->PCNF1 =
|
||||
( MAXLEN << RADIO_PCNF1_MAXLEN_Pos) |
|
||||
( 0 << RADIO_PCNF1_STATLEN_Pos ) |
|
||||
( 3 << RADIO_PCNF1_BALEN_Pos ) |
|
||||
( RADIO_PCNF1_ENDIAN_Little << RADIO_PCNF1_ENDIAN_Pos ) |
|
||||
( RADIO_PCNF1_WHITEEN_Enabled << RADIO_PCNF1_WHITEEN_Pos );
|
||||
|
||||
// Use logical address 0 for sending and receiving
|
||||
NRF_RADIO->TXADDRESS = 0;
|
||||
NRF_RADIO->RXADDRESSES = 1 << 0;
|
||||
|
||||
// 24 bit CRC, skip address field
|
||||
NRF_RADIO->CRCCNF =
|
||||
( RADIO_CRCCNF_SKIPADDR_Skip << RADIO_CRCCNF_SKIPADDR_Pos ) |
|
||||
( RADIO_CRCCNF_LEN_Three << RADIO_CRCCNF_LEN_Pos );
|
||||
|
||||
// The polynomial has the form of x^24 +x^10 +x^9 +x^6 +x^4 +x^3 +x+1
|
||||
NRF_RADIO->CRCPOLY = 0x100065B;
|
||||
|
||||
// Inter frame spacing 150 us
|
||||
NRF_RADIO->TIFS = 150;
|
||||
|
||||
// Shorts:
|
||||
// - READY->START
|
||||
NRF_RADIO->SHORTS = RADIO_SHORTS_READY_START_Enabled << RADIO_SHORTS_READY_START_Pos;
|
||||
}
|
||||
|
||||
|
||||
void radio_dump_state(void){
|
||||
printf("Radio state: %lx\n", NRF_RADIO->STATE);
|
||||
}
|
||||
|
||||
// static
|
||||
void radio_receive_on_channel(int channel){
|
||||
// set frequency based on channel
|
||||
NRF_RADIO->FREQUENCY = radio_frequency_for_channel( channel );
|
||||
|
||||
// initializes data whitening with channel index
|
||||
NRF_RADIO->DATAWHITEIV = channel & 0x3F;
|
||||
|
||||
// set receive buffer
|
||||
NRF_RADIO->PACKETPTR = (uintptr_t) rx_adv_buffer;
|
||||
|
||||
// set MAXLEN based on receive buffer size
|
||||
NRF_RADIO->PCNF1 = ( NRF_RADIO->PCNF1 & ~RADIO_PCNF1_MAXLEN_Msk ) | ( MAXLEN << RADIO_PCNF1_MAXLEN_Pos );
|
||||
|
||||
// clear events
|
||||
NRF_RADIO->EVENTS_END = 0;
|
||||
NRF_RADIO->EVENTS_DISABLED = 0;
|
||||
NRF_RADIO->EVENTS_READY = 0;
|
||||
NRF_RADIO->EVENTS_ADDRESS = 0;
|
||||
|
||||
radio_set_access_address(ADVERTISING_RADIO_ACCESS_ADDRESS);
|
||||
radio_set_crc_init(ADVERTISING_CRC_INIT);
|
||||
|
||||
// ramp up receiver
|
||||
NRF_RADIO->TASKS_RXEN = 1;
|
||||
}
|
||||
|
||||
// static
|
||||
void radio_disable(void){
|
||||
// testing
|
||||
NRF_RADIO->TASKS_DISABLE = 1;
|
||||
|
||||
// wait for ready
|
||||
while (!NRF_RADIO->EVENTS_DISABLED) {
|
||||
// just wait
|
||||
}
|
||||
}
|
||||
|
||||
// static
|
||||
void radio_dump_packet(void){
|
||||
// print data
|
||||
int len = rx_adv_buffer[1] & 0x3f;
|
||||
int i;
|
||||
for (i=0;i<len;i++){
|
||||
printf("%02x ", rx_adv_buffer[i]);
|
||||
}
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
void RADIO_IRQHandler(void){
|
||||
// packet received?
|
||||
}
|
||||
|
||||
static uint8_t random_generator_next(void){
|
||||
NRF_RNG->SHORTS = RNG_SHORTS_VALRDY_STOP_Enabled << RNG_SHORTS_VALRDY_STOP_Pos;
|
||||
NRF_RNG->TASKS_START = 1;
|
||||
while (!NRF_RNG->EVENTS_VALRDY){
|
||||
}
|
||||
return NRF_RNG->VALUE;
|
||||
}
|
||||
|
||||
static uint32_t get_time_us(void){
|
||||
NRF_TIMER0->TASKS_CAPTURE[0] = 1;
|
||||
return NRF_TIMER0->CC[0];
|
||||
}
|
||||
|
||||
// static
|
||||
void tick(void){
|
||||
uint32_t now = 0;
|
||||
while (1){
|
||||
uint8_t random = random_generator_next();
|
||||
printf("Tick %02x\n", random);
|
||||
now = get_time_us();
|
||||
uint32_t tick_at = now + 1000000;
|
||||
while (now < tick_at){
|
||||
now = get_time_us();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// static
|
||||
void ll_set_scan_params(uint8_t le_scan_type, uint16_t le_scan_interval, uint16_t le_scan_window, uint8_t own_address_type, uint8_t scanning_filter_policy){
|
||||
// TODO .. store other params
|
||||
ll_scan_interval_us = ((uint32_t) le_scan_interval) * 625;
|
||||
ll_scan_window_us = ((uint32_t) le_scan_window) * 625;
|
||||
}
|
||||
|
||||
static uint8_t ll_start_scanning(uint8_t filter_duplicates){
|
||||
// COMMAND DISALLOWED if wrong state.
|
||||
if (ll_state != LL_STATE_STANDBY) return 0x0c;
|
||||
|
||||
ll_state = LL_STATE_SCANNING;
|
||||
|
||||
// reset timer
|
||||
NRF_TIMER0->TASKS_CLEAR;
|
||||
|
||||
// set timer to disable radio after end of scan_window
|
||||
|
||||
// set timer to trigger IRQ for next scan interval
|
||||
|
||||
// start receive
|
||||
// ..
|
||||
|
||||
// TODO: use all channels
|
||||
radio_receive_on_channel(37);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static uint8_t ll_stop_scanning(void){
|
||||
// COMMAND DISALLOWED if wrong state.
|
||||
if (ll_state != LL_STATE_SCANNING) return 0x0c;
|
||||
|
||||
ll_state = LL_STATE_STANDBY;
|
||||
|
||||
// stop radio
|
||||
radio_disable();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
// static
|
||||
uint8_t ll_set_scan_enable(uint8_t le_scan_enable, uint8_t filter_duplicates){
|
||||
if (le_scan_enable){
|
||||
return ll_start_scanning(filter_duplicates);
|
||||
} else {
|
||||
return ll_stop_scanning();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
static int transport_run(btstack_data_source_t * ds){
|
||||
|
||||
// ad-hoc way to trigger stuff
|
||||
if (hci_outgoing_event_ready){
|
||||
hci_outgoing_event_ready = 0;
|
||||
packet_handler(HCI_EVENT_PACKET, hci_outgoing_event, hci_outgoing_event[1]+2);
|
||||
return 0;
|
||||
}
|
||||
|
||||
if (ll_state == LL_STATE_SCANNING && NRF_RADIO->EVENTS_END){
|
||||
// adv received
|
||||
int len = rx_adv_buffer[1] & 0x3f;
|
||||
hci_outgoing_event[0] = HCI_EVENT_LE_META;
|
||||
hci_outgoing_event[1] = 11 + len - 6;
|
||||
hci_outgoing_event[2] = HCI_SUBEVENT_LE_ADVERTISING_REPORT;
|
||||
hci_outgoing_event[3] = 1;
|
||||
hci_outgoing_event[4] = rx_adv_buffer[0] & 0x0f;
|
||||
hci_outgoing_event[5] = (rx_adv_buffer[0] & 0x40) ? 1 : 0;
|
||||
memcpy(&hci_outgoing_event[6], &rx_adv_buffer[2], 6);
|
||||
hci_outgoing_event[12] = len - 6; // rest after bd addr
|
||||
memcpy(&hci_outgoing_event[13], &rx_adv_buffer[8], len - 6);
|
||||
hci_outgoing_event[13 + len - 6] = 0; // TODO: measure RSSI and set here
|
||||
hci_outgoing_event_ready = 1;
|
||||
packet_handler(HCI_EVENT_PACKET, hci_outgoing_event, hci_outgoing_event[1]+2);
|
||||
// restart receiving
|
||||
NRF_RADIO->TASKS_START = 1;
|
||||
return 0;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* init transport
|
||||
* @param transport_config
|
||||
*/
|
||||
void transport_init(const void *transport_config){
|
||||
|
||||
}
|
||||
|
||||
/**
|
||||
* open transport connection
|
||||
*/
|
||||
static int transport_open(void){
|
||||
btstack_run_loop_set_data_source_handler(&hci_transport_data_source, &transport_run);
|
||||
btstack_run_loop_add_data_source(&hci_transport_data_source);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* close transport connection
|
||||
*/
|
||||
static int transport_close(void){
|
||||
btstack_run_loop_remove_data_source(&hci_transport_data_source);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* register packet handler for HCI packets: ACL, SCO, and Events
|
||||
*/
|
||||
static void transport_register_packet_handler(void (*handler)(uint8_t packet_type, uint8_t *packet, uint16_t size)){
|
||||
packet_handler = handler;
|
||||
}
|
||||
|
||||
// /**
|
||||
// * support async transport layers, e.g. IRQ driven without buffers
|
||||
// */
|
||||
// int transport_can_send_packet_now(uint8_t packet_type){
|
||||
// return 1;
|
||||
// }
|
||||
|
||||
// TODO: implement
|
||||
void hal_cpu_disable_irqs(void){}
|
||||
void hal_cpu_enable_irqs(void){}
|
||||
void hal_cpu_enable_irqs_and_sleep(void){}
|
||||
|
||||
|
||||
// TODO: get time from RTC
|
||||
uint32_t hal_time_ms(void){
|
||||
return 999;
|
||||
}
|
||||
|
||||
static void fake_command_complete(uint16_t opcode){
|
||||
hci_outgoing_event[0] = HCI_EVENT_COMMAND_COMPLETE;
|
||||
hci_outgoing_event[1] = 4;
|
||||
hci_outgoing_event[2] = 1;
|
||||
little_endian_store_16(hci_outgoing_event, 3, opcode);
|
||||
hci_outgoing_event[5] = 0;
|
||||
hci_outgoing_event_ready = 1;
|
||||
}
|
||||
|
||||
int transport_send_packet(uint8_t packet_type, uint8_t *packet, int size){
|
||||
// process packet
|
||||
uint16_t opcode = little_endian_read_16(packet, 0);
|
||||
if (opcode == hci_reset.opcode) {
|
||||
fake_command_complete(opcode);
|
||||
return 0;
|
||||
}
|
||||
if (opcode == hci_le_set_scan_enable.opcode){
|
||||
ll_set_scan_enable(packet[3], packet[4]);
|
||||
fake_command_complete(opcode);
|
||||
return 0;
|
||||
}
|
||||
// try with "OK"
|
||||
printf("CMD opcode %02x not handled yet\n", opcode);
|
||||
fake_command_complete(opcode);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int btstack_main(void);
|
||||
|
||||
/**
|
||||
* @brief Function for main application entry.
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
|
||||
LEDS_CONFIGURE(LEDS_MASK);
|
||||
LEDS_OFF(LEDS_MASK);
|
||||
uint32_t err_code;
|
||||
const app_uart_comm_params_t comm_params = {
|
||||
RX_PIN_NUMBER,
|
||||
TX_PIN_NUMBER,
|
||||
RTS_PIN_NUMBER,
|
||||
CTS_PIN_NUMBER,
|
||||
APP_UART_FLOW_CONTROL_ENABLED,
|
||||
false,
|
||||
UART_BAUDRATE_BAUDRATE_Baud115200
|
||||
};
|
||||
|
||||
APP_UART_FIFO_INIT(&comm_params,
|
||||
UART_RX_BUF_SIZE,
|
||||
UART_TX_BUF_SIZE,
|
||||
uart_error_handle,
|
||||
APP_IRQ_PRIORITY_LOW,
|
||||
err_code);
|
||||
|
||||
APP_ERROR_CHECK(err_code);
|
||||
|
||||
init_timer();
|
||||
radio_init();
|
||||
|
||||
// Bring up BTstack
|
||||
|
||||
printf("BTstack on Nordic nRF5 SDK\n");
|
||||
|
||||
btstack_memory_init();
|
||||
btstack_run_loop_init(btstack_run_loop_embedded_get_instance());
|
||||
|
||||
// setup hci transport wrapper
|
||||
hci_transport.name = "nRF5";
|
||||
hci_transport.init = transport_init;
|
||||
hci_transport.open = transport_open;
|
||||
hci_transport.close = transport_close;
|
||||
hci_transport.register_packet_handler = transport_register_packet_handler;
|
||||
hci_transport.can_send_packet_now = NULL;
|
||||
hci_transport.send_packet = transport_send_packet;
|
||||
hci_transport.set_baudrate = NULL;
|
||||
|
||||
// init HCI
|
||||
hci_init(&hci_transport, NULL);
|
||||
|
||||
// enable full log output while porting
|
||||
hci_dump_open(NULL, HCI_DUMP_STDOUT);
|
||||
|
||||
// hand over to btstack embedded code
|
||||
btstack_main();
|
||||
|
||||
// go
|
||||
btstack_run_loop_execute();
|
||||
|
||||
while (1){};
|
||||
|
||||
#if 0
|
||||
// enable Radio IRQs
|
||||
// NVIC_SetPriority( RADIO_IRQn, 0 );
|
||||
// NVIC_ClearPendingIRQ( RADIO_IRQn );
|
||||
// NVIC_EnableIRQ( RADIO_IRQn );
|
||||
|
||||
// start listening
|
||||
radio_receive_on_channel(37);
|
||||
|
||||
while (1){
|
||||
if (NRF_RADIO->EVENTS_END){
|
||||
NRF_RADIO->EVENTS_END = 0;
|
||||
// process packet
|
||||
radio_dump_packet();
|
||||
// receive next packet
|
||||
NRF_RADIO->TASKS_START = 1;
|
||||
}
|
||||
}
|
||||
|
||||
radio_disable();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
/** @} */
|
||||
219
port/nrf5x/pca10028/armgcc/Makefile
Executable file
219
port/nrf5x/pca10028/armgcc/Makefile
Executable file
@ -0,0 +1,219 @@
|
||||
PROJECT_NAME := uart_pca10028
|
||||
|
||||
export OUTPUT_FILENAME
|
||||
#MAKEFILE_NAME := $(CURDIR)/$(word $(words $(MAKEFILE_LIST)),$(MAKEFILE_LIST))
|
||||
MAKEFILE_NAME := $(MAKEFILE_LIST)
|
||||
MAKEFILE_DIR := $(dir $(MAKEFILE_NAME) )
|
||||
|
||||
TEMPLATE_PATH = ../../../../../components/toolchain/gcc
|
||||
ifeq ($(OS),Windows_NT)
|
||||
include $(TEMPLATE_PATH)/Makefile.windows
|
||||
else
|
||||
include $(TEMPLATE_PATH)/Makefile.posix
|
||||
endif
|
||||
|
||||
MK := mkdir
|
||||
RM := rm -rf
|
||||
|
||||
#echo suspend
|
||||
ifeq ("$(VERBOSE)","1")
|
||||
NO_ECHO :=
|
||||
else
|
||||
NO_ECHO := @
|
||||
endif
|
||||
|
||||
# Toolchain commands
|
||||
CC := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-gcc'
|
||||
AS := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-as'
|
||||
AR := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ar' -r
|
||||
LD := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-ld'
|
||||
NM := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-nm'
|
||||
OBJDUMP := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objdump'
|
||||
OBJCOPY := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-objcopy'
|
||||
SIZE := '$(GNU_INSTALL_ROOT)/bin/$(GNU_PREFIX)-size'
|
||||
|
||||
#function for removing duplicates in a list
|
||||
remduplicates = $(strip $(if $1,$(firstword $1) $(call remduplicates,$(filter-out $(firstword $1),$1))))
|
||||
|
||||
#source common to all targets
|
||||
C_SOURCE_FILES += \
|
||||
$(abspath ../../../../../components/toolchain/system_nrf51.c) \
|
||||
$(abspath ../../../../../components/libraries/util/app_error.c) \
|
||||
$(abspath ../../../../../components/libraries/fifo/app_fifo.c) \
|
||||
$(abspath ../../../../../components/libraries/util/app_util_platform.c) \
|
||||
$(abspath ../../../../../components/libraries/util/nrf_assert.c) \
|
||||
$(abspath ../../../../../components/libraries/uart/app_uart_fifo.c) \
|
||||
$(abspath ../../../../../components/drivers_nrf/delay/nrf_delay.c) \
|
||||
$(abspath ../../../../../components/drivers_nrf/common/nrf_drv_common.c) \
|
||||
$(abspath ../../../../../components/drivers_nrf/uart/nrf_drv_uart.c) \
|
||||
|
||||
#assembly files common to all targets
|
||||
ASM_SOURCE_FILES = $(abspath ../../../../../components/toolchain/gcc/gcc_startup_nrf51.s)
|
||||
|
||||
#includes common to all targets
|
||||
INC_PATHS = -I$(abspath ../../config/uart_pca10028)
|
||||
INC_PATHS += -I$(abspath ../../config)
|
||||
INC_PATHS += -I$(abspath ../../../../bsp)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/drivers_nrf/nrf_soc_nosd)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/device)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/libraries/uart)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/drivers_nrf/hal)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/drivers_nrf/delay)
|
||||
INC_PATHS += -I$(abspath ../..)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/libraries/util)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/drivers_nrf/uart)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/drivers_nrf/common)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/toolchain)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/drivers_nrf/config)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/libraries/fifo)
|
||||
INC_PATHS += -I$(abspath ../../../../../components/toolchain/gcc)
|
||||
|
||||
# BTstack territory
|
||||
BTSTACK_ROOT = ../../../../../components/btstack
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/port/nrf5x/main.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/port/retarget.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/platform/embedded/btstack_run_loop_embedded.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/ble/ad_parser.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/btstack_linked_list.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/btstack_memory.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/btstack_memory_pool.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/btstack_run_loop.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/btstack_util.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/hci.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/hci_cmd.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/src/hci_dump.c)
|
||||
C_SOURCE_FILES += $(abspath $(BTSTACK_ROOT)/example/gap_le_advertisements.c)
|
||||
INC_PATHS += -I$(abspath $(BTSTACK_ROOT)/src)
|
||||
INC_PATHS += -I$(abspath $(BTSTACK_ROOT)/port/nrf5x)
|
||||
INC_PATHS += -I$(abspath $(BTSTACK_ROOT)/platform/embedded)
|
||||
# End
|
||||
|
||||
|
||||
OBJECT_DIRECTORY = _build
|
||||
LISTING_DIRECTORY = $(OBJECT_DIRECTORY)
|
||||
OUTPUT_BINARY_DIRECTORY = $(OBJECT_DIRECTORY)
|
||||
|
||||
# Sorting removes duplicates
|
||||
BUILD_DIRECTORIES := $(sort $(OBJECT_DIRECTORY) $(OUTPUT_BINARY_DIRECTORY) $(LISTING_DIRECTORY) )
|
||||
|
||||
#flags common to all targets
|
||||
CFLAGS = -DNRF51
|
||||
CFLAGS += -DBOARD_PCA10028
|
||||
CFLAGS += -DBSP_DEFINES_ONLY
|
||||
CFLAGS += -mcpu=cortex-m0
|
||||
CFLAGS += -mthumb -mabi=aapcs --std=gnu99
|
||||
CFLAGS += -Wall -Werror -O3 -g3
|
||||
CFLAGS += -mfloat-abi=soft
|
||||
# keep every function in separate section. This will allow linker to dump unused functions
|
||||
CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing
|
||||
CFLAGS += -fno-builtin --short-enums
|
||||
|
||||
# keep every function in separate section. This will allow linker to dump unused functions
|
||||
LDFLAGS += -Xlinker -Map=$(LISTING_DIRECTORY)/$(OUTPUT_FILENAME).map
|
||||
LDFLAGS += -mthumb -mabi=aapcs -L $(TEMPLATE_PATH) -T$(LINKER_SCRIPT)
|
||||
LDFLAGS += -mcpu=cortex-m0
|
||||
# let linker to dump unused sections
|
||||
LDFLAGS += -Wl,--gc-sections
|
||||
# use newlib in nano version
|
||||
LDFLAGS += --specs=nano.specs -lc -lnosys
|
||||
|
||||
# Assembler flags
|
||||
ASMFLAGS += -x assembler-with-cpp
|
||||
ASMFLAGS += -DNRF51
|
||||
ASMFLAGS += -DBOARD_PCA10028
|
||||
ASMFLAGS += -DBSP_DEFINES_ONLY
|
||||
#default target - first one defined
|
||||
#default: clean nrf51422_xxac
|
||||
default: nrf51422_xxac
|
||||
|
||||
#building all targets
|
||||
all: clean
|
||||
$(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e cleanobj
|
||||
$(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e nrf51422_xxac
|
||||
|
||||
#target for printing all targets
|
||||
help:
|
||||
@echo following targets are available:
|
||||
@echo nrf51422_xxac
|
||||
|
||||
|
||||
C_SOURCE_FILE_NAMES = $(notdir $(C_SOURCE_FILES))
|
||||
C_PATHS = $(call remduplicates, $(dir $(C_SOURCE_FILES) ) )
|
||||
C_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(C_SOURCE_FILE_NAMES:.c=.o) )
|
||||
|
||||
ASM_SOURCE_FILE_NAMES = $(notdir $(ASM_SOURCE_FILES))
|
||||
ASM_PATHS = $(call remduplicates, $(dir $(ASM_SOURCE_FILES) ))
|
||||
ASM_OBJECTS = $(addprefix $(OBJECT_DIRECTORY)/, $(ASM_SOURCE_FILE_NAMES:.s=.o) )
|
||||
|
||||
vpath %.c $(C_PATHS)
|
||||
vpath %.s $(ASM_PATHS)
|
||||
|
||||
OBJECTS = $(C_OBJECTS) $(ASM_OBJECTS)
|
||||
|
||||
nrf51422_xxac: OUTPUT_FILENAME := nrf51422_xxac
|
||||
nrf51422_xxac: LINKER_SCRIPT=uart_gcc_nrf51.ld
|
||||
nrf51422_xxac: $(BUILD_DIRECTORIES) $(OBJECTS)
|
||||
@echo Linking target: $(OUTPUT_FILENAME).out
|
||||
$(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
|
||||
$(NO_ECHO)$(MAKE) -f $(MAKEFILE_NAME) -C $(MAKEFILE_DIR) -e finalize
|
||||
|
||||
## Create build directories
|
||||
$(BUILD_DIRECTORIES):
|
||||
echo $(MAKEFILE_NAME)
|
||||
$(MK) $@
|
||||
|
||||
# Create objects from C SRC files
|
||||
$(OBJECT_DIRECTORY)/%.o: %.c
|
||||
@echo Compiling file: $(notdir $<)
|
||||
$(NO_ECHO)$(CC) $(CFLAGS) $(INC_PATHS) -c -o $@ $<
|
||||
|
||||
# Assemble files
|
||||
$(OBJECT_DIRECTORY)/%.o: %.s
|
||||
@echo Compiling file: $(notdir $<)
|
||||
$(NO_ECHO)$(CC) $(ASMFLAGS) $(INC_PATHS) -c -o $@ $<
|
||||
|
||||
|
||||
# Link
|
||||
$(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out: $(BUILD_DIRECTORIES) $(OBJECTS)
|
||||
@echo Linking target: $(OUTPUT_FILENAME).out
|
||||
$(NO_ECHO)$(CC) $(LDFLAGS) $(OBJECTS) $(LIBS) -o $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
|
||||
|
||||
|
||||
## Create binary .bin file from the .out file
|
||||
$(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin: $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
|
||||
@echo Preparing: $(OUTPUT_FILENAME).bin
|
||||
$(NO_ECHO)$(OBJCOPY) -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin
|
||||
|
||||
## Create binary .hex file from the .out file
|
||||
$(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex: $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
|
||||
@echo Preparing: $(OUTPUT_FILENAME).hex
|
||||
$(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex
|
||||
|
||||
finalize: genbin genhex echosize
|
||||
|
||||
genbin:
|
||||
@echo Preparing: $(OUTPUT_FILENAME).bin
|
||||
$(NO_ECHO)$(OBJCOPY) -O binary $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).bin
|
||||
|
||||
## Create binary .hex file from the .out file
|
||||
genhex:
|
||||
@echo Preparing: $(OUTPUT_FILENAME).hex
|
||||
$(NO_ECHO)$(OBJCOPY) -O ihex $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).hex
|
||||
|
||||
echosize:
|
||||
-@echo ''
|
||||
$(NO_ECHO)$(SIZE) $(OUTPUT_BINARY_DIRECTORY)/$(OUTPUT_FILENAME).out
|
||||
-@echo ''
|
||||
|
||||
clean:
|
||||
$(RM) $(BUILD_DIRECTORIES)
|
||||
|
||||
cleanobj:
|
||||
$(RM) $(BUILD_DIRECTORIES)/*.o
|
||||
|
||||
flash: $(MAKECMDGOALS)
|
||||
@echo Flashing: $(OUTPUT_BINARY_DIRECTORY)/$<.hex
|
||||
nrfjprog --program $(OUTPUT_BINARY_DIRECTORY)/$<.hex -f nrf51 --chiperase
|
||||
nrfjprog --reset
|
||||
|
||||
## Flash softdevice
|
||||
22
port/nrf5x/pca10028/armgcc/uart_gcc_nrf51.ld
Executable file
22
port/nrf5x/pca10028/armgcc/uart_gcc_nrf51.ld
Executable file
@ -0,0 +1,22 @@
|
||||
/* Linker script to configure memory regions. */
|
||||
|
||||
SEARCH_DIR(.)
|
||||
GROUP(-lgcc -lc -lnosys)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x40000
|
||||
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x8000
|
||||
}
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
.fs_data_out ALIGN(4):
|
||||
{
|
||||
PROVIDE( __start_fs_data = .);
|
||||
KEEP(*(fs_data))
|
||||
PROVIDE( __stop_fs_data = .);
|
||||
} = 0
|
||||
}
|
||||
|
||||
INCLUDE "nrf5x_common.ld"
|
||||
30
port/nrf5x/readme.md
Normal file
30
port/nrf5x/readme.md
Normal file
@ -0,0 +1,30 @@
|
||||
# Experimental port for Nordic nRF5 Series
|
||||
|
||||
## Overview
|
||||
|
||||
This port targets the bare Nordic nRF5-Series chipsets without the proprietary SoftDevice implementations.
|
||||
|
||||
Instead of taking shortcuts within BTstack, the idea here is to provide a complete HCI Controller interface. This requires to implement an HCI Command parser, an LE Link Layer.
|
||||
|
||||
## Status
|
||||
|
||||
Only tested on the pca10028 dev board.
|
||||
|
||||
Only supports LE Scanning at the moment, e.g. with the gap_le_advertisements example.
|
||||
|
||||
## Getting Started
|
||||
|
||||
To integrate BTstack into the nRF5 SDK, please move the BTstack project into nRF5_SDK_X/components.
|
||||
Then create projects for the BTstack examples in nRF5_SDK_X/examples/btstack by running:
|
||||
|
||||
./create_examples.py
|
||||
|
||||
Now, the BTstack examples can be build from the nRF5_SDK_X examples folder in the same way as other examples, e.g.:
|
||||
|
||||
cd examples/btstack/gap_le_advertisements/pca10028/armgcc
|
||||
make
|
||||
|
||||
to build the gap_le_advertisements example for the pca10028 dev kit using the ARM GCC compiler.
|
||||
|
||||
See nRF5 SDK documentation about how to install it.
|
||||
|
||||
100
port/nrf5x/retarget.c
Executable file
100
port/nrf5x/retarget.c
Executable file
@ -0,0 +1,100 @@
|
||||
/* Copyright (c) 2014 Nordic Semiconductor. All Rights Reserved.
|
||||
*
|
||||
* The information contained herein is property of Nordic Semiconductor ASA.
|
||||
* Terms and conditions of usage are described in detail in NORDIC
|
||||
* SEMICONDUCTOR STANDARD SOFTWARE LICENSE AGREEMENT.
|
||||
*
|
||||
* Licensees are granted free, non-transferable use of the information. NO
|
||||
* WARRANTY of ANY KIND is provided. This heading must NOT be removed from
|
||||
* the file.
|
||||
*
|
||||
*/
|
||||
|
||||
#if !defined(NRF_LOG_USES_RTT) || NRF_LOG_USES_RTT != 1
|
||||
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include "app_uart.h"
|
||||
#include "nordic_common.h"
|
||||
#include "nrf_error.h"
|
||||
|
||||
#if !defined(__ICCARM__)
|
||||
struct __FILE
|
||||
{
|
||||
int handle;
|
||||
};
|
||||
#endif
|
||||
|
||||
FILE __stdout;
|
||||
FILE __stdin;
|
||||
|
||||
|
||||
#if defined(__CC_ARM) || defined(__ICCARM__)
|
||||
int fgetc(FILE * p_file)
|
||||
{
|
||||
uint8_t input;
|
||||
while (app_uart_get(&input) == NRF_ERROR_NOT_FOUND)
|
||||
{
|
||||
// No implementation needed.
|
||||
}
|
||||
return input;
|
||||
}
|
||||
|
||||
|
||||
int fputc(int ch, FILE * p_file)
|
||||
{
|
||||
UNUSED_PARAMETER(p_file);
|
||||
|
||||
UNUSED_VARIABLE(app_uart_put((uint8_t)ch));
|
||||
return ch;
|
||||
}
|
||||
|
||||
#elif defined(__GNUC__)
|
||||
|
||||
|
||||
int _write(int file, const char * p_char, int len)
|
||||
{
|
||||
int i;
|
||||
|
||||
UNUSED_PARAMETER(file);
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
{
|
||||
UNUSED_VARIABLE(app_uart_put(*p_char++));
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
|
||||
int _read(int file, char * p_char, int len)
|
||||
{
|
||||
UNUSED_PARAMETER(file);
|
||||
while (app_uart_get((uint8_t *)p_char) == NRF_ERROR_NOT_FOUND)
|
||||
{
|
||||
// No implementation needed.
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(__ICCARM__)
|
||||
|
||||
__ATTRIBUTES size_t __write(int file, const unsigned char * p_char, size_t len)
|
||||
{
|
||||
int i;
|
||||
|
||||
UNUSED_PARAMETER(file);
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
{
|
||||
UNUSED_VARIABLE(app_uart_put(*p_char++));
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
#endif // NRF_LOG_USES_RTT != 1
|
||||
Loading…
x
Reference in New Issue
Block a user