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84 lines
3.5 KiB
Markdown
84 lines
3.5 KiB
Markdown
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# BTstack port for Renesas Target Board TB-S1JA with CC256x
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This port uses the Renesas TB-S1JA with TI's CC256XEM ST Adapter Kit that allows to plug in a CC256xB or CC256xC Bluetooth module.
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Renesas e2 Studio (Eclise-based) was used with the SSP HAL and without an RTOS.
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For easy debugging, Ozone project files are generated as well.
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## Hardware
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Renesas Target Board TB-S1JA:
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- [TB-S1JA Target Board Kit](https://www.renesas.com/eu/en/products/synergy/hardware/kits/tb-s1ja.html)
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- CC2564B Bluetooth Controller:
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1. The best option is to get it as a BoostPack
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- Info: BOOST-CC2564MODA: http://www.ti.com/tool/BOOST-CC2564MODA
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2. Alternatively, get the evaluation module together with the EM Wireless Booster pack and a 32.768 kHz oscillator
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- EM Wireless Booster Pack:
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- [Info](http://www.ti.com/tool/BOOST-CCEMADAPTER)
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- [User Guide](http://www.ti.com/lit/pdf/swru338)
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- CC256x Bluetooth module:
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- [CC2564B Dual-mode Bluetooth® Controller Evaluation Module](https://store.ti.com/cc2564modnem.aspx)
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- [CC2564C Dual-mode Bluetooth® Controller Evaluation Module](https://store.ti.com/CC256XCQFN-EM-CC2564C-Dual-Mode-Bluetooth-Controller-Evaluation-Module-P51277.aspx)
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- The module with the older CC2564B is around USD 20, while the one with the new CC2564C costs around USD 60
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The projects are configured for the CC2564C. When using the CC2564B, *bluetooth_init_cc2564B_1.8_BT_Spec_4.1.c* should be used as cc256x_init_script. You can update this in the create_examples.py script.
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Connct the Target Board to the TI Boosterpack, see Booster Pack Pinout: http://www.ti.com/ww/en/launchpad/dl/boosterpack-pinout-v2.pdf
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J2 PIN | S1JA PORT | S1JA Signal | Boosterpack
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-------|-----------|-------------|------------
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2 | P301 | RXD0 | 3 (LP1)
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4 | P302 | TXD0 | 4 (LP1)
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6 | P304 | CTS0 | 36 (LP2)
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8 | P303 | RTS0 | 37 (LP2)
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10 | VCC | VCC | 1 (LP1)
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12 | VSS | GND | 20 (LP2)
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14 | P112 | nShutdown | 19 (LP1)
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## Software
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Generate example projects
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$ ./create_examples.py
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This will generate an e2 Studio project for each example.
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## Build, Flash And Run The Examples in e2 Studio
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Open the e2 Studio project and press the 'Debug' button. Debug output is only available via SEGGER RTT. You can run SEGGER's JLinkRTTViewer or use Ozone as described below.
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## Run Example Project using Ozone
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After compiling the project with e2 Studio, the genereated .elf file can be used with Ozone. In Ozone, the debug output is readily available. A .jdebug file is provided in the project folder.
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## Debug output
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All debug output is send via SEGGER RTT.
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In src/btstack_config.h resp. in example/btstack_config.h of the generated projects, additional debug information can be enabled by uncommenting ENABLE_LOG_INFO.
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Also, the full packet log can be enabled in src/port.c The console output can then be converted into .pklg files for OS X PacketLogger or WireShark by running tool/create_packet_log.py
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## GATT Database
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In BTstack, the GATT Database is defined via the .gatt file in the example folder. The Makefile contains rules to update the .h file when the .gatt was modified.
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Note: In theory, this can be integrated into the Eclipse project, in fact, it's easy to configure it as an Eclipse Builder, but it got tricky to get it working with templates.
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## ToDo
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- Implement hal_flash_bank_renesas_ssp
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## Notes
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- HCI UART is set to 2 mbps. Using 3 or 4 mbps causes hang during startup
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## Nice to have
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- Allow compilation using Makefile/CMake on macOS
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