From 405ff378275aa7c66301806ea17c563d6b70d515 Mon Sep 17 00:00:00 2001 From: spacemeowx2 Date: Fri, 1 Jan 2021 01:34:22 +0800 Subject: [PATCH] feat: add dtb options --- blflash/src/chip/bl602/mod.rs | 3 ++- blflash/src/chip/mod.rs | 1 + blflash/src/main.rs | 13 ++++++++++--- 3 files changed, 13 insertions(+), 4 deletions(-) diff --git a/blflash/src/chip/bl602/mod.rs b/blflash/src/chip/bl602/mod.rs index e6f0fb6..5bd582f 100644 --- a/blflash/src/chip/bl602/mod.rs +++ b/blflash/src/chip/bl602/mod.rs @@ -43,6 +43,7 @@ impl Chip for Bl602 { &self, mut partition_cfg: PartitionCfg, mut bootheader_cfg: BootHeaderCfg, + ro_params: Vec, bin: &[u8], ) -> Result, Error> { partition_cfg.update()?; @@ -57,7 +58,7 @@ impl Chip for Bl602 { RomSegment::from_vec(0xf000, partition_cfg), RomSegment::from_vec(0x10000, fw_image), // TODO: generate from dts - RomSegment::from_slice(0x1f8000, RO_PARAMS), + RomSegment::from_vec(0x1f8000, ro_params), ]; Ok(segments) diff --git a/blflash/src/chip/mod.rs b/blflash/src/chip/mod.rs index a6dae97..3e782da 100644 --- a/blflash/src/chip/mod.rs +++ b/blflash/src/chip/mod.rs @@ -11,6 +11,7 @@ pub trait Chip { &self, partition_cfg: PartitionCfg, bootheader_cfg: BootHeaderCfg, + ro_params: Vec, bin: &[u8], ) -> Result, Error>; } diff --git a/blflash/src/main.rs b/blflash/src/main.rs index 7bdedf2..ef97ced 100644 --- a/blflash/src/main.rs +++ b/blflash/src/main.rs @@ -33,11 +33,14 @@ struct Connection { #[derive(StructOpt)] struct Boot2Opt { /// Path to partition_cfg.toml, default to be partition/partition_cfg_2M.toml - #[structopt(parse(from_os_str))] + #[structopt(long, parse(from_os_str))] partition_cfg: Option, /// Path to efuse_bootheader_cfg.conf - #[structopt(parse(from_os_str))] + #[structopt(long, parse(from_os_str))] boot_header_cfg: Option, + /// Path to ro_params.dtb + #[structopt(long, parse(from_os_str))] + dtb: Option, /// Without boot2 #[structopt(short, long)] without_boot2: bool, @@ -132,8 +135,12 @@ impl Boot2Opt { .unwrap_or_else(|| Ok(bl602::DEFAULT_BOOTHEADER_CFG.to_vec()))?; let partition_cfg = toml::from_slice(&partition_cfg)?; let BootHeaderCfgFile { boot_header_cfg } = toml::from_slice(&boot_header_cfg)?; + let ro_params = self + .dtb + .map(read) + .unwrap_or_else(|| Ok(bl602::RO_PARAMS.to_vec()))?; - let segments = chip.with_boot2(partition_cfg, boot_header_cfg, image)?; + let segments = chip.with_boot2(partition_cfg, boot_header_cfg, ro_params, image)?; Ok(segments) }