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This file contains various notes that compile and synthesize information about the BL602's hardware features, gathered from this repository and elsewhere on the internet.
123 lines
7.5 KiB
ReStructuredText
Executable File
123 lines
7.5 KiB
ReStructuredText
Executable File
BLE602 SDK
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==========
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`Discord <https://discord.gg/89VWQVH>`_, `Telegram <https://t.me/joinchat/Kmi2S0nOsT240emHk-aO6g>`_
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Bouffalolab bl_iot_sdk. Support BL602 Wi-Fi/BLE Combo RISC-V based Chip.
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Check ``docs/html`` for more detail.
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File an issue, if you have any issue or need any support.
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Quick Start
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===========
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In order to build one of the sample apps, you need to set a few environment
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variables::
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export BL60X_SDK_PATH=/path/to/this/repo
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export CONFIG_CHIP_NAME=bl602
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Then go to the sample directory of interest and call `make`, for example::
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cd customer_app/bl602_boot2
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make
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Call ::
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make CONFIG_TOOLPREFIX=riscv64-linux-gnu-
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for bypassing the bundled cross-compiler and using your distribution's own
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cross-compiler.
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There is a linker script (written in python) at `image_conf/flash_build.py`.
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To run this, you need to specify the application and the target, for example::
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python3 flash_build.py bl602_boot2 bl602
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Hardware
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=========
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BL602 is a 32-bit RISC-V based combo chipset supporting Wi-Fi and BLE (Bluetooth
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Low Energy). The chip is made by `Nanjing-based Bouffalo Lab <https://www.bouffalolab.com/bl602>`_
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for ultra-low-power applications. In terms of price range and feature set, the
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chip is competing against `Espressif ESP8266 <https://www.espressif.com/en/products/socs/esp8266>`_
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- `BL602/604 Datasheet <docs/BL602_BL604_DS_Datasheet.pdf>`_
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(34 pages): Includes pinout, memory map, and general peripheral descriptions
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but no detailed functional specification or register listings. Sipeed, a board
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vendor that plans to use the BL602, `claims <https://twitter.com/SipeedIO/status/1321658609990725633>`_
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that full register documentation will be available sometime in November 2020.
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- `soc602_reg.svd <components/bl602/bl602_std/bl602_std/Device/Bouffalo/BL602/Peripherals/soc602_reg.svd>`_:
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Contains a seemingly-complete register listing, with names but no descriptions,
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for the BL602.
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- `Hardware Notes <docs/hardware_notes.md>`_: Additional information gathered
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from this repository and elsewhere on the internet.
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Comparison with ESP8266
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=======================
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+-------------------+-----------------------------+----------------------------------+
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| | Bouffalo Lab BL602 | Espressif ESP8266 |
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+===================+=============================+==================================+
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| Architecture | 32-bit RISC-V | 32-bit Xtensa |
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| | | |
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| | @192MHz (dynamic @1-192MHz) | @80MHz (and 160MHz) |
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| | | |
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| | L1 cache | |
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| | FPU | |
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+-------------------+-----------------------------+----------------------------------+
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| Memory | 276KB SRAM | 32 KiB instruction RAM |
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| | | |
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| | 128KB ROM | 32 KiB instruction cache RAM |
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| | 1 Kb eFuse | 80 KiB user-data RAM |
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| | optional embdedded flash | 16 KiB ETS system-data RAM |
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| | XIP QSPI flash support | No programmable ROM |
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| | | |
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| | | QSPI flash support |
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| | | (up to 16 MB) |
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+-------------------+-----------------------------+----------------------------------+
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| Wi-Fi | 802.11 b/g/n @2.4GHz | 802.11 b/g/n @2.4GHz |
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| | | |
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| | WPS/WEP/WPA/WPA2/WPA3 | WEP/WPA/WPA2 |
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+-------------------+-----------------------------+----------------------------------+
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| Bluetooth | LE 5.0 | NONE |
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+-------------------+-----------------------------+----------------------------------+
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| GPIO | x16 | x16 |
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+-------------------+-----------------------------+----------------------------------+
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| SDIO | x1 2.0 slave | x1 v2.0 slave |
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+-------------------+-----------------------------+----------------------------------+
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| SPI | x1 | x2 |
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+-------------------+-----------------------------+----------------------------------+
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| UART | x2 | x1.5 |
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| | | (One Tx only) |
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+-------------------+-----------------------------+----------------------------------+
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| I2C | x1 | x1 (software implemented) |
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+-------------------+-----------------------------+----------------------------------+
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| I2S | NONE | x1 (with DMA) |
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+-------------------+-----------------------------+----------------------------------+
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| PWM channels | x5 | x4 |
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+-------------------+-----------------------------+----------------------------------+
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| ADC | 12-bit | 10-bit (SAR) |
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+-------------------+-----------------------------+----------------------------------+
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| DAC | 10-bit | NONE |
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+-------------------+-----------------------------+----------------------------------+
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| Analog Comparator | x2 | NONE |
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+-------------------+-----------------------------+----------------------------------+
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| DMA | x4 | with I2S |
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+-------------------+-----------------------------+----------------------------------+
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| Timer | RTC (up to 1 year) | x1 hardware |
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| | x2 32-bit general-purpose | x1 software |
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| | | (no interrupt gen. on sw. timer) |
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+-------------------+-----------------------------+----------------------------------+
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| IR Remote Control | x1 | x1 |
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+-------------------+-----------------------------+----------------------------------+
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| Debug | JTAG support | ? |
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+-------------------+-----------------------------+----------------------------------+
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