mirror of
https://github.com/pine64/bl_iot_sdk.git
synced 2024-09-04 14:09:18 +00:00
192 lines
3.6 KiB
Plaintext
192 lines
3.6 KiB
Plaintext
[EFUSE_CFG]
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########################################################################
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#2bits
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ef_sf_aes_mode = 0
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#2bits
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ef_sboot_sign_mode = 0
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#2bits
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ef_sboot_en = 0
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#2bits
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ef_dbg_jtag_dis = 0
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#4bits
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ef_dbg_mode = 0
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#32bits
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ef_dbg_pwd_low = 0
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#32bits
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ef_dbg_pwd_high = 0
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###################################################################
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ef_key_slot_2_w0 = 0
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ef_key_slot_2_w1 = 0
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ef_key_slot_2_w2 = 0
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ef_key_slot_2_w3 = 0
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ef_key_slot_3_w0 = 0
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ef_key_slot_3_w1 = 0
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ef_key_slot_3_w2 = 0
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ef_key_slot_3_w3 = 0
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ef_key_slot_4_w0 = 0
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ef_key_slot_4_w1 = 0
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ef_key_slot_4_w2 = 0
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ef_key_slot_4_w3 = 0
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wr_lock_key_slot_4_l = 0
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wr_lock_dbg_pwd = 0
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wr_lock_key_slot_2 = 0
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wr_lock_key_slot_3 = 0
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wr_lock_key_slot_4_h = 0
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rd_lock_dbg_pwd = 0
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rd_lock_key_slot_2 = 0
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rd_lock_key_slot_3 = 0
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rd_lock_key_slot_4 = 0
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[BOOTHEADER_CFG]
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magic_code = 0x504e4642
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revision = 0x01
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#########################flash cfg#############################
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flashcfg_magic_code = 0x47464346
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#flashcfg_magic_code=0
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io_mode = 4
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cont_read_support = 1
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sfctrl_clk_delay = 0
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sfctrl_clk_invert = 0x03
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reset_en_cmd = 0x66
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reset_cmd = 0x99
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exit_contread_cmd = 0xff
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exit_contread_cmd_size = 3
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jedecid_cmd = 0x9f
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jedecid_cmd_dmy_clk = 0
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qpi_jedecid_cmd = 0x9f
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qpi_jedecid_dmy_clk = 0
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sector_size = 4
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mfg_id = 0xc8
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page_size = 256
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chip_erase_cmd = 0xc7
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sector_erase_cmd = 0x20
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blk32k_erase_cmd = 0x52
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blk64k_erase_cmd = 0xd8
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write_enable_cmd = 0x06
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page_prog_cmd = 0x02
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qpage_prog_cmd = 0x32
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qual_page_prog_addr_mode = 0
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fast_read_cmd = 0x0b
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fast_read_dmy_clk = 1
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qpi_fast_read_cmd = 0x0b
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qpi_fast_read_dmy_clk = 1
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fast_read_do_cmd = 0x3b
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fast_read_do_dmy_clk = 1
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fast_read_dio_cmd = 0xbb
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fast_read_dio_dmy_clk = 0
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fast_read_qo_cmd = 0x6b
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fast_read_qo_dmy_clk = 1
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fast_read_qio_cmd = 0xeb
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fast_read_qio_dmy_clk = 2
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qpi_fast_read_qio_cmd = 0xeb
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qpi_fast_read_qio_dmy_clk = 2
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qpi_page_prog_cmd = 0x02
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write_vreg_enable_cmd = 0x50
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wel_reg_index = 0
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qe_reg_index = 1
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busy_reg_index = 0
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wel_bit_pos = 1
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qe_bit_pos = 1
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busy_bit_pos = 0
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wel_reg_write_len = 2
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wel_reg_read_len = 1
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qe_reg_write_len = 2
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qe_reg_read_len = 1
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release_power_down = 0xab
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busy_reg_read_len = 1
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reg_read_cmd0 = 0x05
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reg_read_cmd1 = 0x35
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reg_write_cmd0 = 0x01
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reg_write_cmd1 = 0x01
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enter_qpi_cmd = 0x38
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exit_qpi_cmd = 0xff
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cont_read_code = 0xa0
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cont_read_exit_code = 0xff
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burst_wrap_cmd = 0x77
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burst_wrap_dmy_clk = 0x03
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burst_wrap_data_mode = 2
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burst_wrap_code = 0x40
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de_burst_wrap_cmd = 0x77
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de_burst_wrap_cmd_dmy_clk = 0x03
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de_burst_wrap_code_mode = 2
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de_burst_wrap_code = 0xF0
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sector_erase_time = 300
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blk32k_erase_time = 1200
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blk64k_erase_time = 1200
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page_prog_time = 5
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chip_erase_time = 200000
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power_down_delay = 20
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qe_data = 0
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flashcfg_crc32 = 0
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#########################clk cfg####################################
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clkcfg_magic_code = 0x47464350
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#clkcfg_magic_code=0
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#0:Not use XTAL to set PLL,1:XTAL is 24M ,2:XTAL is 32M ,3:XTAL is 38.4M
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#4:XTAL is 40M,5:XTAL is 26M,6:XTAL is RC32M
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xtal_type = 4
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#0:RC32M,1:XTAL,2:PLL 48M,3:PLL 120M,4:PLL 160M,5:PLL 192M
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pll_clk = 4
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hclk_div = 0
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bclk_div = 1
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#0:120M,1:XCLK(RC32M or XTAL),2:48M,3:80M,4:HCLK,5:96M
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flash_clk_type = 3
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flash_clk_div = 1
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clkcfg_crc32 = 0
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########################boot cfg####################################
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#1:ECC
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sign = 0
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#1:AES128,2:AES256,3:AES192
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encrypt_type = 0
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key_sel = 0
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no_segment = 1
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cache_enable = 1
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notload_in_bootrom = 0
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aes_region_lock = 0
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cache_way_disable = 0x03
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crc_ignore = 0
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hash_ignore = 0
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########################image cfg####################################
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#total image len or segment count
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img_len = 0x100
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bootentry = 0
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#img RAM address or flash offset
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img_start = 0x2000
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#img hash
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hash_0 = 0xdeadbeef
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hash_1 = 0
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hash_2 = 0
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hash_3 = 0
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hash_4 = 0
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hash_5 = 0
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hash_6 = 0
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hash_7 = 0
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crc32 = 0xdeadbeef
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