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109 lines
4.4 KiB
C
109 lines
4.4 KiB
C
// See LICENSE for license details.
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#ifndef _RISCV_MISALIGNED_H
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#define _RISCV_MISALIGNED_H
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#include "encoding.h"
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#include "bits.h"
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#include <stdint.h>
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#define DECLARE_UNPRIVILEGED_LOAD_FUNCTION(type, insn) \
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static inline type load_##type(const type* addr, uintptr_t mepc) \
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{ \
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register uintptr_t __mstatus_adjust asm ("a1") = MSTATUS_MPRV; \
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register uintptr_t __mepc asm ("a2") = mepc; \
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register uintptr_t __mstatus asm ("a3"); \
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type val; \
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asm ("csrrs %0, mstatus, %3\n" \
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#insn " %1, %2\n" \
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"csrw mstatus, %0" \
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: "+&r" (__mstatus), "=&r" (val) \
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: "m" (*addr), "r" (__mstatus_adjust), "r" (__mepc)); \
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return val; \
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}
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#define DECLARE_UNPRIVILEGED_STORE_FUNCTION(type, insn) \
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static inline void store_##type(type* addr, type val, uintptr_t mepc) \
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{ \
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register uintptr_t __mstatus_adjust asm ("a1") = MSTATUS_MPRV; \
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register uintptr_t __mepc asm ("a2") = mepc; \
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register uintptr_t __mstatus asm ("a3"); \
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asm volatile ("csrrs %0, mstatus, %3\n" \
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#insn " %1, %2\n" \
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"csrw mstatus, %0" \
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: "+&r" (__mstatus) \
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: "r" (val), "m" (*addr), "r" (__mstatus_adjust), \
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"r" (__mepc)); \
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}
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint8_t, lbu)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint16_t, lhu)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(int8_t, lb)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(int16_t, lh)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(int32_t, lw)
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DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint8_t, sb)
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DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint16_t, sh)
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DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint32_t, sw)
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#if __riscv_xlen == 64
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint32_t, lwu)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint64_t, ld)
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DECLARE_UNPRIVILEGED_STORE_FUNCTION(uint64_t, sd)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uintptr_t, ld)
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#else
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uint32_t, lw)
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DECLARE_UNPRIVILEGED_LOAD_FUNCTION(uintptr_t, lw)
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static inline uint64_t load_uint64_t(const uint64_t* addr, uintptr_t mepc)
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{
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return load_uint32_t((uint32_t*)addr, mepc)
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+ ((uint64_t)load_uint32_t((uint32_t*)addr + 1, mepc) << 32);
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}
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static inline void store_uint64_t(uint64_t* addr, uint64_t val, uintptr_t mepc)
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{
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store_uint32_t((uint32_t*)addr, val, mepc);
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store_uint32_t((uint32_t*)addr + 1, val >> 32, mepc);
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}
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#endif
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static uintptr_t inline __attribute__((always_inline)) get_insn(uintptr_t mepc, uintptr_t* mstatus)
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{
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register uintptr_t __mstatus_adjust asm ("a1") = MSTATUS_MPRV | MSTATUS_MXR;
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register uintptr_t __mepc asm ("a2") = mepc;
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register uintptr_t __mstatus asm ("a3");
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uintptr_t val;
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#ifndef __riscv_compressed
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asm ("csrrs %[mstatus], mstatus, %[mprv]\n"
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STR(LWU) " %[insn], (%[addr])\n"
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"csrw mstatus, %[mstatus]"
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: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val)
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: [mprv] "r" (__mstatus_adjust), [addr] "r" (__mepc));
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#else
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uintptr_t rvc_mask = 3, tmp;
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asm ("csrrs %[mstatus], mstatus, %[mprv]\n"
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"and %[tmp], %[addr], 2\n"
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"bnez %[tmp], 1f\n"
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STR(LWU) " %[insn], (%[addr])\n"
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"and %[tmp], %[insn], %[rvc_mask]\n"
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"beq %[tmp], %[rvc_mask], 2f\n"
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"sll %[insn], %[insn], %[xlen_minus_16]\n"
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"srl %[insn], %[insn], %[xlen_minus_16]\n"
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"j 2f\n"
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"1:\n"
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"lhu %[insn], (%[addr])\n"
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"and %[tmp], %[insn], %[rvc_mask]\n"
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"bne %[tmp], %[rvc_mask], 2f\n"
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"lhu %[tmp], 2(%[addr])\n"
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"sll %[tmp], %[tmp], 16\n"
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"add %[insn], %[insn], %[tmp]\n"
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"2: csrw mstatus, %[mstatus]"
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: [mstatus] "+&r" (__mstatus), [insn] "=&r" (val), [tmp] "=&r" (tmp)
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: [mprv] "r" (__mstatus_adjust), [addr] "r" (__mepc),
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[rvc_mask] "r" (rvc_mask), [xlen_minus_16] "i" (__riscv_xlen - 16));
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#endif
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*mstatus = __mstatus;
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return val;
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}
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#endif
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