release_bl_iot_sdk_1.6.32-104-g52434dce6

This commit is contained in:
Rujun Wang 2021-11-12 14:17:43 +08:00
parent 01a8e9f3a8
commit 4d9ff4a160
1215 changed files with 2371 additions and 32072 deletions

View File

@ -317,31 +317,9 @@ int uart_ioctl_cmd_waimode(vfs_uart_dev_t *uart_dev, int cmd, unsigned long arg)
return ret;
}
int uart_ioctl_cmd_setconfig(vfs_uart_dev_t *uart_dev, unsigned long arg)
{
uart_ioc_config_t *config = (uart_ioc_config_t *)arg;
hosal_uart_parity_t parity;
if (NULL == config) {
return -EINVAL;
}
if (config->parity == IO_UART_PARITY_ODD) {
parity = HOSAL_ODD_PARITY;
} else if (config->parity == IO_UART_PARITY_EVEN) {
parity = HOSAL_EVEN_PARITY;
} else {
parity = HOSAL_NO_PARITY;
}
hosal_uart_ioctl(&uart_dev->uart, config->baud, (void *)parity);
return 0;
}
int vfs_uart_ioctl(file_t *fp, int cmd, unsigned long arg)
{
int ret = -1;
int ret = 0;
vfs_uart_dev_t *uart_dev = NULL;
/* check empty pointer. */
@ -374,11 +352,6 @@ int vfs_uart_ioctl(file_t *fp, int cmd, unsigned long arg)
hosal_uart_ioctl(&uart_dev->uart, HOSAL_UART_BAUD_SET, (void *)arg);
}
break;
case IOCTL_UART_IOC_CONFIG_MODE:
{
ret = uart_ioctl_cmd_setconfig(uart_dev, arg);
}
break;
case IOCTL_UART_IOC_READ_BLOCK:
{
uart_dev->read_block_flag = UART_READ_CFG_BLOCK;
@ -389,6 +362,29 @@ int vfs_uart_ioctl(file_t *fp, int cmd, unsigned long arg)
uart_dev->read_block_flag = UART_READ_CFG_NOBLOCK;
}
break;
case IOCTL_UART_IOC_STOPBITS_SET:
{
hosal_uart_ioctl(&uart_dev->uart, HOSAL_UART_STOP_BITS_SET, (void *)arg);
}
break;
case IOCTL_UART_IOC_PARITY_SET:
{
hosal_uart_ioctl(&uart_dev->uart, HOSAL_UART_PARITY_SET, (void *)arg);
}
break;
case IOCTL_UART_IOC_HWFC_SET:
{
hosal_uart_ioctl(&uart_dev->uart, HOSAL_UART_FLOWMODE_SET, (void *)arg);
}
break;
case IOCTL_UART_IOC_DATABITS_SET:
{
hosal_uart_ioctl(&uart_dev->uart, HOSAL_UART_DATA_WIDTH_SET, (void *)arg);
}
break;
default:
{
ret = -EINVAL;

View File

@ -11,7 +11,6 @@ extern "C" {
#include "vfs_inode.h"
/*section for SPI IOCTRL*/
#define IOCTL_UART_IOC_CLEAN_MODE 1 /* clean rx ringbuf */
#define IOCTL_UART_IOC_FLUSH_MODE 2 /* flush */
#define IOCTL_UART_IOC_BAUD_MODE 3 /* baud */
@ -19,7 +18,14 @@ extern "C" {
#define IOCTL_UART_IOC_WAITRDFULL_MODE 5 /* waitread full */
#define IOCTL_UART_IOC_READ_BLOCK 6 /* read block */
#define IOCTL_UART_IOC_READ_NOBLOCK 7 /* read noblock */
#define IOCTL_UART_IOC_CONFIG_MODE 8 /* config baud parity */
#define IOCTL_UART_IOC_PARITY_SET 8 /* set parity */
#define IOCTL_UART_IOC_PARITY_GET 9 /* get parity */
#define IOCTL_UART_IOC_STOPBITS_SET 10 /* set stop bits */
#define IOCTL_UART_IOC_STOPBITS_GET 11 /* get stop bits */
#define IOCTL_UART_IOC_HWFC_SET 12 /* set hwfc */
#define IOCTL_UART_IOC_HWFC_GET 13 /* get hwfc */
#define IOCTL_UART_IOC_DATABITS_SET 14 /* set data bits */
#define IOCTL_UART_IOC_DATABITS_GET 15 /* set data bits */
#define UART_READ_CFG_BLOCK 1
#define UART_READ_CFG_NOBLOCK 2
@ -30,11 +36,6 @@ typedef enum {
IO_UART_PARITY_EVEN,
} ioc_uart_parity_t;
typedef struct _uart_ioctrl_config {
uint32_t baud;
ioc_uart_parity_t parity;
} uart_ioc_config_t;
typedef struct _uart_ioctrl_wait_read {
char *buf;
int read_size;

View File

@ -58,7 +58,7 @@
#define CONFIG_BT_MESH_RX_SDU_MAX 108
#endif
#ifndef CONFIG_BT_MESH_SEG_BUFS
#define CONFIG_BT_MESH_SEG_BUFS (12) //TODO
#define CONFIG_BT_MESH_SEG_BUFS (CONFIG_BT_MESH_TX_SEG_MAX*2)
#endif

View File

@ -105,144 +105,125 @@ static void blecli_hog_srv_notify(char *pcWriteBuffer, int xWriteBufferLen, int
#endif
const struct cli_command btStackCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
#if 0
#if 1
/*1.The cmd string to type, 2.Cmd description, 3.The function to run, 4.Number of parameters*/
{"ble_init", "\r\nble_init:[Initialize]\r\n Parameter[Null]\r\n", blecli_init},
{"ble_get_device_name", "\r\nble_get_device_name:[Read local device name]\r\n Parameter[Null]\r\n", blecli_get_device_name},
{"ble_set_device_name", "\r\nble_set_device_name:\r\n\[Lenth of name]\r\n\[name]\r\n", blecli_set_device_name},
{"ble_init", "ble Initialize\r\nParameter [Null]\r\n", blecli_init},
{"ble_get_device_name", "ble get device name\r\nParameter [Null]\r\n", blecli_get_device_name},
{"ble_set_device_name", "ble set device name\r\nParameter [Lenth of name] [name]\r\n", blecli_set_device_name},
#if defined(CONFIG_BLE_TP_SERVER)
{"ble_tp_start", "\r\nble_tp_start:\r\n\
[TP test,1:enable, 0:disable]\r\n", blecli_tp_start},
{"ble_tp_start", "throughput start\r\nParameter [TP test,1:enable, 0:disable]\r\n", blecli_tp_start},
#endif
#if defined(BL702)
{"ble_set_default_phy", "ble set default phy\r\nParameter [defualt phys]\r\n", blecli_set_default_phy},
{"ble_set_2M_Phy", "ble set 2M Phy\r\nParameter [defualt phys]\r\n", blecli_set_2M_phy},
{"ble_set_coded_phy", "ble set coded phy\r\nParameter [all phys] [coded option]\r\n", blecli_set_coded_phy},
#endif
#if defined(BL702) || defined(BL602)
{"ble_scan_filter_size", "ble scan filter sizer\nParameter [filter table size]\r\n", blecli_scan_filter_size},
#endif
#if defined(BFLB_DISABLE_BT)
{"ble_disable", "ble disable\r\nParameter [Null]\r\n", blecli_disable},
#endif
#if defined(CONFIG_BT_OBSERVER)
{"ble_start_scan", "\r\nble_start_scan:\r\n\
[Scan type, 0:passive scan, 1:active scan]\r\n\
[Duplicate filtering, 0:Disable duplicate filtering, 1:Enable duplicate filtering]\r\n\
{"ble_start_scan", " ble start scan\r\n\
Parameter [Scan type, 0:passive scan, 1:active scan]\r\n\
[filtering, 0:Disable duplicate, 1:Enable duplicate]\r\n\
[Scan interval, 0x0004-4000,e.g.0080]\r\n\
[Scan window, 0x0004-4000,e.g.0050]\r\n", blecli_start_scan},
{"ble_stop_scan", "\r\nble_stop_scan:[Stop scan]\r\nParameter[Null]\r\n", blecli_stop_scan},
{"ble_stop_scan", "ble stop scan\r\nParameter [Null]\r\n", blecli_stop_scan},
#endif
#if defined(CONFIG_BT_PERIPHERAL)
{"ble_start_adv", "\r\nble_start_adv:\r\n\
[Adv type,0:adv_ind,1:adv_scan_ind,2:adv_nonconn_ind]\r\n\
{"ble_set_adv_channel", "ble set adv channel\r\nParameter [adv channel]\r\n", blecli_set_adv_channel},
{"ble_start_adv", "ble start adv\r\n\
Parameter [Adv type, 0:adv_ind, 1:adv_scan_ind, 2:adv_nonconn_ind]\r\n\
[Mode, 0:discov, 1:non-discov]\r\n\
[Adv Interval Min,0x0020-4000,e.g.0030]\r\n\
[Adv Interval Max,0x0020-4000,e.g.0060]\r\n", blecli_start_advertise},
{"ble_stop_adv", "\r\nble_stop_adv:[Stop advertising]\r\nParameter[Null]\r\n", blecli_stop_advertise},
{"ble_read_local_address", "\r\nble_read_local_address:[Read local address]\r\n", blecli_read_local_address},
{"ble_stop_adv", "ble stop adv\r\nParameter [Null]\r\n", blecli_stop_advertise},
#if defined(CONFIG_BLE_MULTI_ADV)
{"ble_start_multi_adv", "ble start multi adv\r\nParameter [Null]\r\n", blecli_start_multi_advertise},
{"ble_stop_multi_adv", "ble stop multi adv\r\nParameter [instant id]\r\n", blecli_stop_multi_advertise},
#endif
{"ble_read_local_address", "ble read local address\r\nParameter [Null]\r\n", blecli_read_local_address},
#endif
#if defined(CONFIG_BT_CONN)
#if defined(CONFIG_BT_CENTRAL)
{"ble_connect", "\r\nble_connect:[Connect remote device]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
{"ble_connect", "ble Connect remote device\r\n\
Parameter [Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, e.g.112233AABBCC]\r\n", blecli_connect},
#endif //CONFIG_BT_CENTRAL
{"ble_disconnect", "\r\nble_disconnect:[Disconnect remote device]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
#endif
{"ble_disconnect", "Disconnect remote device\r\n\
Parameter [Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value,e.g.112233AABBCC]\r\n", blecli_disconnect},
{"ble_select_conn", "\r\nble_select_conn:[Select a specific connection]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
{"ble_select_conn", "Select a specific connection\r\n\
Parameter [Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, e.g.112233AABBCC]\r\n", blecli_select_conn},
{"ble_unpair", "\r\nble_unpair:[Unpair connection]\r\n\
[Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
{"ble_unpair", "bleUnpair connection]\r\n\
Parameter [Address type, 0:ADDR_PUBLIC, 1:ADDR_RAND, 2:ADDR_RPA_OR_PUBLIC, 3:ADDR_RPA_OR_RAND]\r\n\
[Address value, all 0: unpair all connection, otherwise:unpair specific connection]\r\n", blecli_unpair},
{"ble_conn_update", "\r\nble_conn_update:\r\n\
[Conn Interval Min,0x0006-0C80,e.g.0030]\r\n\
{"ble_conn_update", "ble conn update\r\n\
Parameter [Conn Interval Min,0x0006-0C80,e.g.0030]\r\n\
[Conn Interval Max,0x0006-0C80,e.g.0030]\r\n\
[Conn Latency,0x0000-01f3,e.g.0004]\r\n\
[Supervision Timeout,0x000A-0C80,e.g.0010]\r\n", blecli_conn_update},
#endif //CONFIG_BT_CONN
#if defined(CONFIG_BT_SMP)
{"ble_security", "\r\nble_security:[Start security]\r\n\
[Security level, Default value 4, 2:BT_SECURITY_MEDIUM, 3:BT_SECURITY_HIGH, 4:BT_SECURITY_FIPS]\r\n", blecli_security},
{"ble_auth", "\r\nble_auth:[Register auth callback]\r\n", blecli_auth},
{"ble_auth_cancel", "\r\nble_auth_cancel:[Register auth callback]\r\n", blecli_auth_cancel},
{"ble_auth_passkey_confirm", "\r\nble_auth_passkey_confirm:[Confirm passkey]\r\n", blecli_auth_passkey_confirm},
{"ble_auth_pairing_confirm", "\r\nble_auth_pairing_confirm:[Confirm pairing in secure connection]\r\n", blecli_auth_pairing_confirm},
{"ble_auth_passkey", "\r\nble_auth_passkey:[Input passkey]\r\n[Passkey, 00000000-000F423F]", blecli_auth_passkey},
#endif //CONFIG_BT_SMP
{"ble_read_rssi", "ble read rssi\r\nParameter [Null]\r\n", blecli_read_rssi},
#endif
#if defined(CONFIG_BT_SMP)
{"ble_security", "Start security\r\n\
Parameter [Security level, Default value 4, 2:BT_SECURITY_MEDIUM, 3:BT_SECURITY_HIGH, 4:BT_SECURITY_FIPS]\r\n", blecli_security},
{"ble_auth", "Register auth callback\r\nParameter [Null]\r\n", blecli_auth},
{"ble_auth_cancel", "Cancel register auth callback\r\nParameter [Null]]\r\n", blecli_auth_cancel},
{"ble_auth_passkey_confirm", "Confirm passkey]\r\nParameter [Null]]\r\n", blecli_auth_passkey_confirm},
{"ble_auth_pairing_confirm", "Confirm pairing in secure connection\r\nParameter [Null]\r\n", blecli_auth_pairing_confirm},
{"ble_auth_passkey", "Input passkey\r\nParameter [Passkey, 00000000-000F423F]\r\n", blecli_auth_passkey},
#endif
#if defined(CONFIG_BT_GATT_CLIENT)
{"ble_exchange_mtu", "\r\nble_exchange_mtu:[Exchange mtu]\r\n Parameter[Null]\r\n", blecli_exchange_mtu},
{"ble_discover", "\r\nble_discover:[Gatt discovery]\r\n\
[Discovery type, 0:Primary, 1:Secondary, 2:Include, 3:Characteristic, 4:Descriptor]\r\n\
{"ble_exchange_mtu", "Exchange mtu\r\nParameter [Null]\r\n", blecli_exchange_mtu},
{"ble_discover", "Gatt discovery\r\n\
Parameter [Discovery type, 0:Primary, 1:Secondary, 2:Include, 3:Characteristic, 4:Descriptor]\r\n\
[Uuid value, 2 Octets, e.g.1800]\r\n\
[Start handle, 2 Octets, e.g.0001]\r\n\
[End handle, 2 Octets, e.g.ffff]\r\n", blecli_discover},
{"ble_read", "\r\nble_read:[Gatt Read]\r\n\
[Attribute handle, 2 Octets]\r\n\
{"ble_read", "Gatt Read\r\n\
Parameter [Attribute handle, 2 Octets]\r\n\
[Value offset, 2 Octets]\r\n", blecli_read},
{"ble_write", "\r\nble_write:[Gatt write]\r\n\
[Attribute handle, 2 Octets]\r\n\
{"ble_write", "Gatt write\r\n\
Parameter [Attribute handle, 2 Octets]\r\n\
[Value offset, 2 Octets]\r\n\
[Value length, 2 Octets]\r\n\
[Value data]\r\n", blecli_write},
{"ble_write_without_rsp", "\r\nble_write_without_rsp:[Gatt write without response]\r\n\
[Sign, 0: No need signed, 1:Signed write cmd if no smp]\r\n\
{"ble_write_without_rsp", "Gatt write without response\r\n\
Parameter [Sign, 0: No need signed, 1:Signed write cmd if no smp]\r\n\
[Attribute handle, 2 Octets]\r\n\
[Value length, 2 Octets]\r\n\
[Value data]\r\n", blecli_write_without_rsp},
{"ble_subscribe", "\r\nble_subscribe:[Gatt subscribe]\r\n\
[CCC handle, 2 Octets]\r\n\
{"ble_subscribe", "Gatt subscribe\r\n\
Parameter [CCC handle, 2 Octets]\r\n\
[Value handle, 2 Octets]\r\n\
[Value, 1:notify, 2:indicate]\r\n", blecli_subscribe},
{"ble_unsubscribe", "\r\nble_unsubscribe:[Gatt unsubscribe]\r\n Parameter[Null]\r\n", blecli_unsubscribe},
#endif /*CONFIG_BT_GATT_CLIENT*/
{"ble_set_data_len",
"\r\nble_set_data_len:[LE Set Data Length]\r\n\
[tx octets, 2 octets]\r\n\
[tx time, 2 octets]\r\n",
blecli_set_data_len},
{"ble_conn_info", "\r\nble_conn_info:[LE get all connection devices info]\r\n", blecli_get_all_conn_info},
{"ble_unsubscribe", "Gatt unsubscribe\r\nParameter [Null]\r\n", blecli_unsubscribe},
#endif
{"ble_set_data_len","LE Set Data Length\r\n\
Parameter [tx octets, 2 octets] [tx time, 2 octets]\r\n", blecli_set_data_len},
{"ble_conn_info", "LE get all connection devices info\r\nParameter [Null]\r\n", blecli_get_all_conn_info},
#if defined(CONFIG_SET_TX_PWR)
{"ble_set_tx_pwr",
"\r\nble_set_tx_pwr:[Set tx power mode]\r\n\
[mode, 1 octet, value:5,6,7]\r\n",
blecli_set_tx_pwr},
{"ble_set_tx_pwr","Set tx power mode\r\nParameter [mode, 1 octet, value:5,6,7]\r\n", blecli_set_tx_pwr},
#endif
#if defined(CONFIG_HOGP_SERVER)
{"ble_hog_srv_notify", "HOG srv notify\r\nParameter [hid usage] [press]\r\n", blecli_hog_srv_notify},
#endif
#else
{"ble_init", "", blecli_init},
#if defined(CONFIG_BLE_TP_SERVER)
{"ble_tp_start", "", blecli_tp_start},
#endif
#if defined(BL702)
#if defined(BL702)
{"ble_set_2M_Phy", "", blecli_set_2M_phy},
{"ble_set_coded_phy", "", blecli_set_coded_phy},
{"ble_set_default_phy", "", blecli_set_default_phy},
#endif
#endif
#if defined(BFLB_DISABLE_BT)
{"ble_disable", "", blecli_disable},
#endif
@ -253,7 +234,7 @@ const struct cli_command btStackCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
{"ble_stop_scan", "", blecli_stop_scan},
#if defined(BL702) || defined(BL602)
{"ble_scan_filter_size", "", blecli_scan_filter_size},
#endif /* BL702 || BL602*/
#endif
#endif
#if defined(CONFIG_BT_PERIPHERAL)
{"ble_set_adv_channel", "", blecli_set_adv_channel},
@ -268,13 +249,13 @@ const struct cli_command btStackCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
#if defined(CONFIG_BT_CONN)
#if defined(CONFIG_BT_CENTRAL)
{"ble_connect", "", blecli_connect},
#endif //CONFIG_BT_CENTRAL
#endif
{"ble_disconnect", "", blecli_disconnect},
{"ble_select_conn", "", blecli_select_conn},
{"ble_unpair", "", blecli_unpair},
{"ble_conn_update", "", blecli_conn_update},
{"ble_read_rssi", "", blecli_read_rssi},
#endif //CONFIG_BT_CONN
#endif
#if defined(CONFIG_BT_SMP)
{"ble_security", "", blecli_security},
{"ble_auth", "", blecli_auth},
@ -282,7 +263,7 @@ const struct cli_command btStackCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
{"ble_auth_passkey_confirm", "", blecli_auth_passkey_confirm},
{"ble_auth_pairing_confirm", "", blecli_auth_pairing_confirm},
{"ble_auth_passkey", "", blecli_auth_passkey},
#endif //CONFIG_BT_SMP
#endif
#if defined(CONFIG_BT_GATT_CLIENT)
{"ble_exchange_mtu", "", blecli_exchange_mtu},
{"ble_discover", "", blecli_discover},
@ -291,7 +272,7 @@ const struct cli_command btStackCmdSet[] STATIC_CLI_CMD_ATTRIBUTE = {
{"ble_write_without_rsp", "", blecli_write_without_rsp},
{"ble_subscribe", "", blecli_subscribe},
{"ble_unsubscribe", "", blecli_unsubscribe},
#endif /*CONFIG_BT_GATT_CLIENT*/
#endif
{"ble_set_data_len", "", blecli_set_data_len},
{"ble_conn_info", "", blecli_get_all_conn_info},
#if defined(CONFIG_SET_TX_PWR)

View File

@ -394,7 +394,9 @@ static u8_t att_handle_rsp(struct bt_att *att, void *pdu, u16_t len, u8_t err)
func = att->req->func;
att->req->func = NULL;
if (func) {
func(att->chan.chan.conn, err, pdu, len, att->req);
}
/* Don't destroy if callback had reused the request */
if (!att->req->func) {

View File

@ -165,7 +165,7 @@ static void notify_connected(struct bt_conn *conn)
}
}
static void notify_disconnected(struct bt_conn *conn)
void notify_disconnected(struct bt_conn *conn)
{
struct bt_conn_cb *cb;
@ -347,7 +347,9 @@ static void conn_update_timeout(struct k_work *work)
if (conn->state == BT_CONN_DISCONNECTED) {
bt_l2cap_disconnected(conn);
#if !defined(BFLB_BLE)
notify_disconnected(conn);
#endif
/* Release the reference we took for the very first
* state transition.

View File

@ -45,6 +45,7 @@
#include "settings.h"
#if defined(BFLB_BLE)
#include "bl_hci_wrapper.h"
#include "ble_lib_api.h"
#if defined(BL602)
#include "bl602_hbn.h"
#elif defined(BL702)
@ -1130,8 +1131,12 @@ static void hci_disconn_complete(struct net_buf *buf)
hci_release_conn_related_cmd();
#endif
#if defined(BFLB_BLE)
notify_disconnected(conn);
#endif
#if defined(CONFIG_BLE_RECONNECT_TEST)
if (conn->role == BT_CONN_ROLE_MASTER) {
if (conn->role == BT_CONN_ROLE_MASTER) {
struct bt_le_conn_param param = {
.interval_min = BT_GAP_INIT_CONN_INT_MIN,
.interval_max = BT_GAP_INIT_CONN_INT_MAX,
@ -1140,11 +1145,11 @@ if (conn->role == BT_CONN_ROLE_MASTER) {
};
if(bt_conn_create_le(&conn->le.dst, &param)) {
printf("Reconnecting. \n");
BT_DBG("Reconnecting. \n");
} else {
printf("Reconnect fail. \n");
BT_DBG("Reconnect fail. \n");
}
}
}
#endif
advertise:
@ -5816,11 +5821,6 @@ int bt_disable_action(void)
bt_gatt_deinit();
//delete task
k_thread_delete(&tx_thread_data);
k_thread_delete(&recv_thread_data);
k_thread_delete(&work_q_thread);
//delete queue, not delete hci_cmd_pool.free/hci_rx_pool.free/acl_tx_pool.free which store released buffers.
bt_delete_queue(&recv_fifo);
bt_delete_queue(&g_work_queue_main.fifo);
@ -5867,8 +5867,11 @@ int bt_disable_action(void)
bl_onchiphci_interface_deinit();
extern void ble_controller_deinit(void);
//delete task
ble_controller_deinit();
k_thread_delete(&tx_thread_data);
k_thread_delete(&work_q_thread);
k_thread_delete(&recv_thread_data);
return 0;
}

View File

@ -106,6 +106,7 @@ struct bt_conn *bt_conn_lookup_addr_le(u8_t id, const bt_addr_le_t *peer);
#if defined(BFLB_BLE)
bool le_check_valid_conn(void);
void notify_disconnected(struct bt_conn *conn);
#if defined(BFLB_HOST_ASSISTANT)
void bt_notify_disconnected(void);
#endif

View File

@ -149,21 +149,16 @@ static const struct ieee80211_channel *channels_default;
static int cfg80211_get_channel_list(const char *code, int *channel_num, const struct ieee80211_channel **channels)
{
int i, j;
int i;
for (i = 0; i < sizeof(country_list)/sizeof(country_list[0]); i++) {
if (0 == strcmp(country_list[i].code, code)) {
if(channel_num){
*channel_num = country_list[i].channel_num;
struct ieee80211_channel *channels_tmp = NULL;
channels_tmp = (struct ieee80211_channel *)os_malloc(*channel_num * sizeof(struct ieee80211_channel));
if (NULL == channels_tmp) {
os_printf("%s: channels_tmp allocation failed\n", __func__);
return -1;
}
for(j = 0; j < *channel_num; j++){
channels_tmp[j] = country_list[i].channels[j];
if (channels) {
*channels = country_list[i].channels;
}
*channels = channels_tmp;
return 0;
}
}

View File

@ -90,7 +90,7 @@ static const struct reason_code sm_reason_list[] = {
static const struct reason_code apm_reason_list[] = {
{WLAN_FW_APM_SUCCESSFUL, "apm connect ind ok"},
{WLAN_FW_APM_DELETESTA_BY_USER, "User delete STA"},
{WLAN_FW_APM_DEATUH_BY_STA, "STA send auth to AP"},
{WLAN_FW_APM_DEATUH_BY_STA, "STA send deauth to AP"},
{WLAN_FW_APM_DISASSOCIATE_BY_STA, "STA send disassociate to AP"},
{WLAN_FW_APM_DELETECONNECTION_TIMEOUT, "timeout and delete connection"},
{WLAN_FW_APM_DELETESTA_FOR_NEW_CONNECTION, "Delete STA for new connection"},

View File

@ -735,7 +735,19 @@ static void wifi_denoise_disable_cmd(char *buf, int len, int argc, char **argv)
static void wifi_power_saving_on_cmd(char *buf, int len, int argc, char **argv)
{
uint8_t mode;
if (1 == argc) {
/*default mode:MESH*/
wifi_mgmr_sta_ps_enter(WIFI_COEX_PM_STA_MESH);
} else if(2 == argc) {
mode = atoi(argv[1]);
if (mode >= WIFI_COEX_PM_MAX) {
return;
}
blog_debug("set ps mode:%d\r\n", mode);
wifi_mgmr_sta_ps_enter(mode);
}
}
static void wifi_power_saving_off_cmd(char *buf, int len, int argc, char **argv)
@ -977,6 +989,19 @@ static void cmd_wifi_coex_pta_force_off(char *buf, int len, int argc, char **arg
coex_wifi_pta_forece_enable(0);
}
static void cmd_wifi_coex_pta_set(char *buf, int len, int argc, char **argv)
{
uint32_t i = 0;
if (2 != argc) {
printf("[USAGE]: %s wifi_coex_pta_set \r\n", argv[0]);
return;
}
i = atoi(argv[1]);
int coex_pta_force_autocontrol_set(void *arg);
coex_pta_force_autocontrol_set((void *)i);
}
static void cmd_wifi_state_get(char *buf, int len, int argc, char **argv)
{
int state = WIFI_STATE_UNKNOWN;
@ -1082,6 +1107,7 @@ const static struct cli_command cmds_user[] STATIC_CLI_CMD_ATTRIBUTE = {
{ "wifi_coex_pti_force_off", "wifi coex PTI forece off", cmd_wifi_coex_pti_force_off},
{ "wifi_coex_pta_force_on", "wifi coex PTA forece on", cmd_wifi_coex_pta_force_on},
{ "wifi_coex_pta_force_off", "wifi coex PTA forece off", cmd_wifi_coex_pta_force_off},
{ "wifi_coex_pta_set", "wifi coex PTA set", cmd_wifi_coex_pta_set},
{ "wifi_sta_list", "get sta list in AP mode", wifi_ap_sta_list_get_cmd},
{ "wifi_sta_del", "delete one sta in AP mode", wifi_ap_sta_delete_cmd},
{ "wifi_edca_dump", "dump EDCA data", wifi_edca_dump_cmd},

View File

@ -366,8 +366,11 @@ int wifi_mgmr_sta_ps_enter(uint32_t ps_level)
{
int retval = 0;
bl_pm_capacity_set(ps_level);
if (!bl_pm_capacity_set(ps_level)) {
retval = pm_post_event(WLAN_PM_EVENT_CONTROL, CODE_PM_NOTIFY_START, NULL);
} else {
os_printf("----- Error PS Mode\r\n");
}
return retval;
}

View File

@ -167,7 +167,7 @@ void bl_irq_unregister(int irqnum, void *handler)
_irq_num_check(irqnum);
if (handler_list[0][irqnum] != handler) {
}
handler_list[0][irqnum] = handler;
handler_list[0][irqnum] = NULL;
}
void interrupt_entry(uint32_t mcause)

View File

@ -391,6 +391,7 @@ int bl_pm_capacity_set(enum PM_LEVEL level)
switch (level) {
case PM_MODE_STA_NONE:
{
return -1;
}
break;
@ -437,7 +438,7 @@ int bl_pm_capacity_set(enum PM_LEVEL level)
default:
{
return -1;
}
}

View File

@ -156,6 +156,14 @@ void bl_irq_ctx_get(int irqnum, void **ctx)
return;
}
void bl_irq_handler_get(int irqnum, void **handler)
{
_irq_num_check(irqnum);
*handler = handler_list[0][irqnum];
return;
}
void bl_irq_register(int irqnum, void *handler)
{
bl_irq_register_with_ctx(irqnum, handler, NULL);
@ -166,7 +174,7 @@ void bl_irq_unregister(int irqnum, void *handler)
_irq_num_check(irqnum);
if (handler_list[0][irqnum] != handler) {
}
handler_list[0][irqnum] = handler;
handler_list[0][irqnum] = NULL;
}
void interrupt_entry(uint32_t mcause)

View File

@ -31,6 +31,8 @@
#define __BL_IRQ_H__
void bl_irq_enable(unsigned int source);
void bl_irq_disable(unsigned int source);
void bl_irq_pending_set(unsigned int source);
void bl_irq_pending_clear(unsigned int source);
typedef enum {
BL_IRQ_EXCEPTION_TYPE_LOAD_MISALIGN,
BL_IRQ_EXCEPTION_TYPE_STORE_MISALIGN,
@ -51,6 +53,7 @@ void bl_irq_register_with_ctx(int irqnum, void *handler, void *ctx);
void bl_irq_register(int irqnum, void *handler);
void bl_irq_unregister(int irqnum, void *handler);
void bl_irq_ctx_get(int irqnum, void **ctx);
void bl_irq_handler_get(int irqnum, void **handler);
int bl_irq_save(void);
void bl_irq_restore(int flags);

View File

@ -48,6 +48,7 @@ typedef __PACKED_STRUCT
#define CLK_CFG_OFFSET (8+(4+sizeof(SPI_Flash_Cfg_Type)+4)+4)
#if !(defined(CFG_BLE_PDS) || defined(CFG_ZIGBEE_PDS))
/* PDS0 Configuration */
static const PDS_DEFAULT_LV_CFG_Type pdsCfgLevel0 = {
.pdsCtl = {
@ -759,6 +760,7 @@ static const PDS_DEFAULT_LV_CFG_Type pdsCfgLevel7 = {
.MiscDigPwrOff = 1,
}
};
#endif
/* PDS31 Configuration */
static const PDS_DEFAULT_LV_CFG_Type pdsCfgLevel31 = {
@ -855,6 +857,9 @@ static uint8_t cacheWayDisable;
/* PSRAM IO Configuration, will get from glb register */
static uint32_t psramIoCfg;
/* EM Select, will get from glb register */
static uint32_t emSel;
/* Device Information, will get from efuse */
static Efuse_Device_Info_Type devInfo;
@ -909,6 +914,9 @@ void bl_pds_init(void)
// Get psram io configuration
psramIoCfg = *(volatile uint32_t *)(GLB_BASE + 0x88);
// Get em select
emSel = *(volatile uint32_t *)(GLB_BASE + 0x7C);
// Get device information from efuse
EF_Ctrl_Read_Device_Info(&devInfo);
devInfo.flash_cfg &= 0x03;
@ -932,6 +940,15 @@ void bl_pds_init(void)
HBN_32K_Sel(HBN_32K_RC);
#endif
// Disable GPIO9 pull up/down to reduce PDS current, 0x4000F014[16]=0
HBN_Hw_Pu_Pd_Cfg(DISABLE);
// Disable GPIO9 - GPIO13 IE/SMT, 0x4000F014[12:8]=5'b00000
HBN_Aon_Pad_IeSmt_Cfg(0);
// Disable GPIO9 - GPIO13 wakeup, 0x4000F014[7:3]=5'b11111
HBN_Pin_WakeUp_Mask(0x1F);
// Configure PDS_SLEEP_CNT as wakeup source
PDS_IntEn(PDS_INT_PDS_SLEEP_CNT, ENABLE);
PDS_IntEn(PDS_INT_HBN_IRQ_OUT0, DISABLE);
@ -1147,6 +1164,9 @@ static void ATTR_PDS_SECTION bl_pds_fastboot_entry(void)
// Patch: restore psram io configuration
*(volatile uint32_t *)(GLB_BASE + 0x88) = psramIoCfg;
// Restore em select
*(volatile uint32_t *)(GLB_BASE + 0x7C) = emSel;
// Restore cpu registers
bl_pds_restore_cpu_reg();
}
@ -1156,10 +1176,33 @@ static void bl_pds_IRQHandler(void)
PDS_IntClear();
}
// can be placed in flash, here placed in pds section to reduce fast boot time
static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_set_gpio_high_z(void)
{
uint32_t pin;
// Set all gpio pads in High-Z state (GPIO0 - GPIO22, jtag & uart pads excluded)
for(pin=0; pin<=22; pin++){
if(pin == 0 || pin == 1 || pin == 2 || pin == 9){
continue;
}
if(pin == 14 || pin == 15){
continue;
}
GLB_GPIO_Set_HZ(pin);
}
// Set all psram pads in High-Z state
GLB_Set_Psram_Pad_HZ();
}
// can be placed in flash, here placed in pds section to reduce fast boot time
static int ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_1(uint32_t pdsLevel, PDS_DEFAULT_LV_CFG_Type *pdsCfg, uint32_t *pdFlash, uint32_t *store)
{
if(pdsLevel == 0){
if(pdsLevel == 31){
ARCH_MemCpy_Fast(pdsCfg, &pdsCfgLevel31, sizeof(PDS_DEFAULT_LV_CFG_Type));
#if !(defined(CFG_BLE_PDS) || defined(CFG_ZIGBEE_PDS))
}else if(pdsLevel == 0){
ARCH_MemCpy_Fast(pdsCfg, &pdsCfgLevel0, sizeof(PDS_DEFAULT_LV_CFG_Type));
}else if(pdsLevel == 1){
ARCH_MemCpy_Fast(pdsCfg, &pdsCfgLevel1, sizeof(PDS_DEFAULT_LV_CFG_Type));
@ -1175,8 +1218,7 @@ static int ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_1(uint32_t pdsLevel
ARCH_MemCpy_Fast(pdsCfg, &pdsCfgLevel6, sizeof(PDS_DEFAULT_LV_CFG_Type));
}else if(pdsLevel == 7){
ARCH_MemCpy_Fast(pdsCfg, &pdsCfgLevel7, sizeof(PDS_DEFAULT_LV_CFG_Type));
}else if(pdsLevel == 31){
ARCH_MemCpy_Fast(pdsCfg, &pdsCfgLevel31, sizeof(PDS_DEFAULT_LV_CFG_Type));
#endif
}else{
return -1;
}
@ -1221,6 +1263,7 @@ static int ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_1(uint32_t pdsLevel
// Disable global interrupt
__disable_irq();
#if 0
// Disable GPIO9 pull up/down to reduce PDS current, 0x4000F014[16]=0
HBN_Hw_Pu_Pd_Cfg(DISABLE);
@ -1229,6 +1272,11 @@ static int ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_1(uint32_t pdsLevel
// Disable GPIO9 - GPIO13 wakeup, 0x4000F014[7:3]=5'b11111
HBN_Pin_WakeUp_Mask(0x1F);
#endif
#if !(defined(CFG_BLE_PDS) || defined(CFG_ZIGBEE_PDS))
bl_pds_set_gpio_high_z();
#endif
return 0;
}
@ -1236,8 +1284,6 @@ static int ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_1(uint32_t pdsLevel
// can be placed in tcm section, here placed in pds section to reduce fast boot time
static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_2(uint32_t pdFlash)
{
uint32_t pin;
// Power down flash
if(pdFlash){
SF_Ctrl_Set_Owner(SF_CTRL_OWNER_SAHB);
@ -1257,25 +1303,11 @@ static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_pre_process_2(uint32_t pdFlash
// Do nothing
}
// Set all gpio pads in High-Z state (GPIO0 - GPIO22, jtag & uart pads excluded)
for(pin=0; pin<=22; pin++){
if(pin == 0 || pin == 1 || pin == 2 || pin == 9){
continue;
}
if(pin == 14 || pin == 15){
continue;
}
GLB_GPIO_Set_HZ(pin);
}
// Set all flash pads in High-Z state
if(pdFlash){
GLB_Set_Flash_Pad_HZ();
}
// Set all psram pads in High-Z state
GLB_Set_Psram_Pad_HZ();
// Select RC32M
HBN_Set_ROOT_CLK_Sel(HBN_ROOT_CLK_RC32M);
GLB_Power_Off_DLL();
@ -1301,6 +1333,7 @@ static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_enter_do(PDS_DEFAULT_LV_CFG_Ty
// can be placed in tcm section, here placed in pds section to reduce fast boot time
static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_post_process_1(uint32_t pdsLevel, uint32_t pdFlash)
{
#if !(defined(CFG_BLE_PDS) || defined(CFG_ZIGBEE_PDS))
// For pdsLevel >=4, clock and flash will be configured in fast boot entry
if(pdsLevel < 4){
// Select DLL or XTAL32M
@ -1322,11 +1355,17 @@ static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_post_process_1(uint32_t pdsLev
SFlash_Restore_From_Powerdown(flashCfgPtr, flashCfgPtr->cReadSupport);
}
}
#endif
}
// can be placed in flash, here placed in pds section to reduce fast boot time
static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_post_process_2(void)
{
#if (defined(CFG_BLE_PDS) || defined(CFG_ZIGBEE_PDS))
bl_pds_set_gpio_high_z();
#endif
#if 0
// Enable GPIO9 pull up/down, 0x4000F014[16]=1
HBN_Hw_Pu_Pd_Cfg(ENABLE);
@ -1335,6 +1374,7 @@ static void ATTR_NOINLINE ATTR_PDS_SECTION bl_pds_post_process_2(void)
// Enable GPIO9 - GPIO13 wakeup, 0x4000F014[7:3]=5'b00000
HBN_Pin_WakeUp_Mask(0);
#endif
// Enable global interrupt
__enable_irq();

View File

@ -88,7 +88,7 @@ int8_t bl_wireless_power_offset_ble_get(uint8_t ch)
if(ch > 39){
return wireless_env.power_offset_ble[39];
}else{
return wireless_env.power_offset_zigbee[ch];
return wireless_env.power_offset_ble[ch];
}
}

View File

@ -95,7 +95,7 @@ typedef void (*hosal_adc_irq_t)(void *parg);
* @brief Define ADC dev hosal handle
*/
typedef struct {
uint8_t *port; /**< @brief adc port */
uint8_t port; /**< @brief adc port */
hosal_adc_config_t config; /**< @brief adc config */
hosal_dma_chan_t dma_chan; /**< @brief adc dma channel */
hosal_adc_irq_t cb; /**< @brief adc callback */

View File

@ -241,8 +241,9 @@ static void aos_loop_proc(void *pvParameters)
app_stack,
&app_task);
#ifdef SYS_AOS_LOOP_ENABLE
aos_loop_run();
#endif
puts("------------------------------------------\r\n");
puts("+++++++++Critical Exit From AOS LOOP entry++++++++++\r\n");
puts("******************************************\r\n");

View File

@ -7,9 +7,7 @@ __EM_SIZE = DEFINED(ble_controller_init) ? 8K : 0K;
MEMORY
{
flash (rxai!w) : ORIGIN = 0x23000000, LENGTH = (2M)
ram_1 (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 32K)
ram_rsvd (wxa) : ORIGIN = 0x42028000, LENGTH = (1K)
ram_2 (wxa) : ORIGIN = 0x42028400, LENGTH = (31K - __EM_SIZE)
tcm_ocram (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 64K - __EM_SIZE)
hbnram (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
}
@ -91,7 +89,16 @@ SECTIONS
.bleromrw (NOLOAD) :
{
KEEP(*(.bleromrw))
} >ram_1
} >tcm_ocram
.rsvd (NOLOAD) :
{
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
@ -103,7 +110,7 @@ SECTIONS
*(.tcm_const)
*(.sclock_rlt_code)
*(.sclock_rlt_const)
} >ram_1 AT > flash
} >tcm_ocram AT > flash
.data : ALIGN(4)
{
@ -111,6 +118,15 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
PROVIDE ( _rf_data_end = . );
ASSERT ((_rf_data_end <= 0x42024000), "Error: _rf_data_end > 0x42024000");
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -142,17 +158,7 @@ SECTIONS
_bt_l2cap_fixed_chan_list_start = .;
KEEP(*(SORT_BY_NAME("._bt_l2cap_fixed_chan.static.*")))
_bt_l2cap_fixed_chan_list_end = .;
} >ram_1 AT > flash
.rsvd (NOLOAD) :
{
*(.rsvd_data)
} >ram_rsvd
.ble_rsvd (NOLOAD) :
{
*(.ble_rsvd_mem)
} >hbnram
} >tcm_ocram AT > flash
.boot2 (NOLOAD) :
{
@ -163,7 +169,7 @@ SECTIONS
PROVIDE ( __boot2_flashCfg_start = . );
*(.bss.boot2_flashCfg)
PROVIDE ( __boot2_flashCfg_end = . );
} >ram_1
} >tcm_ocram
.bss (NOLOAD) :
{
@ -175,22 +181,22 @@ SECTIONS
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
} >ram_1
} >tcm_ocram
. = ALIGN(8);
PROVIDE( _heap_start = . );
PROVIDE( _heap_size = ORIGIN(ram_1) + LENGTH(ram_1) - _heap_start );
PROVIDE( _heap_size = ADDR(.stack) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ram_2) );
PROVIDE( _heap2_size = LENGTH(ram_2) );
PROVIDE( _heap2_start = 0 );
PROVIDE( _heap2_size = 0 );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(tcm_ocram) + LENGTH(tcm_ocram) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >tcm_ocram
/* camera driver */
@ -212,10 +218,10 @@ SECTIONS
/* ram information */
PROVIDE( _ld_ram_size0 = LENGTH(flash) );
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(ram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(ram_1) );
PROVIDE( _ld_ram_size2 = LENGTH(ram_2) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ram_2) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm_ocram) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm_ocram) );
PROVIDE( _ld_ram_size2 = LENGTH(hbnram) );
PROVIDE( _ld_ram_addr2 = ORIGIN(hbnram) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );
@ -224,7 +230,4 @@ SECTIONS
/* EM size */
PROVIDE(__LD_CONFIG_EM_SEL = __EM_SIZE);
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = 0x40010000 );
}

View File

@ -7,9 +7,7 @@ __EM_SIZE = DEFINED(ble_controller_init) ? 8K : 0K;
MEMORY
{
flash (rxai!w) : ORIGIN = 0x23000000, LENGTH = (2M)
ram_1 (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 32K)
ram_rsvd (wxa) : ORIGIN = 0x42028000, LENGTH = (1K)
ram_2 (wxa) : ORIGIN = 0x42028400, LENGTH = (31K - __EM_SIZE)
tcm_ocram (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 64K - __EM_SIZE)
hbnram (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
}
@ -86,7 +84,7 @@ SECTIONS
.bleromrw (NOLOAD) :
{
. = . + 0x84;
} >ram_1
} >tcm_ocram
.rtosromrw (NOLOAD) : ALIGN(16)
{
@ -95,7 +93,16 @@ SECTIONS
PROVIDE( __global_pointer_head$ = . );
PROVIDE( __global_pointer$ = . + 0x7E0 );
. = . + 0x4A0;
} >ram_1
} >tcm_ocram
.rsvd (NOLOAD) :
{
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
@ -107,7 +114,7 @@ SECTIONS
*(.tcm_const)
*(.sclock_rlt_code)
*(.sclock_rlt_const)
} >ram_1 AT > flash
} >tcm_ocram AT > flash
.data : ALIGN(4)
{
@ -115,6 +122,15 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
PROVIDE ( _rf_data_end = . );
ASSERT ((_rf_data_end <= 0x42024000), "Error: _rf_data_end > 0x42024000");
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -140,12 +156,7 @@ SECTIONS
_bt_l2cap_fixed_chan_list_start = .;
KEEP(*(SORT_BY_NAME("._bt_l2cap_fixed_chan.static.*")))
_bt_l2cap_fixed_chan_list_end = .;
} >ram_1 AT > flash
.rsvd (NOLOAD) :
{
*(.rsvd_data)
} >ram_rsvd
} >tcm_ocram AT > flash
.boot2 (NOLOAD) :
{
@ -156,7 +167,7 @@ SECTIONS
PROVIDE ( __boot2_flashCfg_start = . );
*(.bss.boot2_flashCfg)
PROVIDE ( __boot2_flashCfg_end = . );
} >ram_1
} >tcm_ocram
.bss (NOLOAD) :
{
@ -168,21 +179,22 @@ SECTIONS
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
} >ram_1
} >tcm_ocram
. = ALIGN(8);
PROVIDE( _heap_start = . );
PROVIDE( _heap_size = ORIGIN(ram_1) + LENGTH(ram_1) - _heap_start );
PROVIDE( _heap_size = ADDR(.stack) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ram_2) );
PROVIDE( _heap2_size = LENGTH(ram_2) );
PROVIDE( _heap2_start = 0 );
PROVIDE( _heap2_size = 0 );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(tcm_ocram) + LENGTH(tcm_ocram) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >tcm_ocram
/* camera driver */
@ -204,10 +216,10 @@ SECTIONS
/* ram information */
PROVIDE( _ld_ram_size0 = LENGTH(flash) );
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(ram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(ram_1) );
PROVIDE( _ld_ram_size2 = LENGTH(ram_2) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ram_2) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm_ocram) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm_ocram) );
PROVIDE( _ld_ram_size2 = LENGTH(hbnram) );
PROVIDE( _ld_ram_addr2 = ORIGIN(hbnram) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );
@ -217,9 +229,6 @@ SECTIONS
/* EM size */
PROVIDE(__LD_CONFIG_EM_SEL = __EM_SIZE);
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = 0x40010000 );
PROVIDE(xTaskGetTickCount = 0x0000000021022642);
PROVIDE(xTaskGetTickCountFromISR = 0x0000000021022658);
PROVIDE(pvPortMalloc = 0x0000000021024762);

View File

@ -7,9 +7,7 @@ __EM_SIZE = DEFINED(ble_controller_init) ? 8K : 0K;
MEMORY
{
flash (rxai!w) : ORIGIN = 0x23000000, LENGTH = (2M)
ram_1 (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 32K)
ram_rsvd (wxa) : ORIGIN = 0x42028000, LENGTH = (1K)
ram_2 (wxa) : ORIGIN = 0x42028400, LENGTH = (31K - __EM_SIZE)
tcm_ocram (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 64K - __EM_SIZE)
hbnram (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
psram (wxa) : ORIGIN = 0x26000000, LENGTH = (2M)
}
@ -92,7 +90,16 @@ SECTIONS
.bleromrw (NOLOAD) :
{
KEEP(*(.bleromrw))
} >ram_1
} >tcm_ocram
.rsvd (NOLOAD) :
{
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
@ -104,7 +111,7 @@ SECTIONS
*(.tcm_const)
*(.sclock_rlt_code)
*(.sclock_rlt_const)
} >ram_1 AT > flash
} >tcm_ocram AT > flash
.data : ALIGN(4)
{
@ -112,6 +119,15 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
PROVIDE ( _rf_data_end = . );
ASSERT ((_rf_data_end <= 0x42024000), "Error: _rf_data_end > 0x42024000");
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -143,17 +159,7 @@ SECTIONS
_bt_l2cap_fixed_chan_list_start = .;
KEEP(*(SORT_BY_NAME("._bt_l2cap_fixed_chan.static.*")))
_bt_l2cap_fixed_chan_list_end = .;
} >ram_1 AT > flash
.rsvd (NOLOAD) :
{
*(.rsvd_data)
} >ram_rsvd
.ble_rsvd (NOLOAD) :
{
*(.ble_rsvd_mem)
} >hbnram
} >tcm_ocram AT > flash
.boot2 (NOLOAD) :
{
@ -164,7 +170,7 @@ SECTIONS
PROVIDE ( __boot2_flashCfg_start = . );
*(.bss.boot2_flashCfg)
PROVIDE ( __boot2_flashCfg_end = . );
} >ram_1
} >tcm_ocram
.bss (NOLOAD) :
{
@ -176,14 +182,14 @@ SECTIONS
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
} >ram_1
} >tcm_ocram
. = ALIGN(8);
PROVIDE( _heap_start = . );
PROVIDE( _heap_size = ORIGIN(ram_1) + LENGTH(ram_1) - _heap_start );
PROVIDE( _heap_size = ADDR(.stack) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ram_2) );
PROVIDE( _heap2_size = LENGTH(ram_2) );
PROVIDE( _heap2_start = 0 );
PROVIDE( _heap2_size = 0 );
.psram (NOLOAD) :
{
@ -195,13 +201,13 @@ SECTIONS
PROVIDE( _heap3_start = .);
PROVIDE( _heap3_size = ORIGIN(psram) + LENGTH(psram) - _heap3_start );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(tcm_ocram) + LENGTH(tcm_ocram) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >tcm_ocram
/* camera driver */
@ -223,10 +229,10 @@ SECTIONS
/* ram information */
PROVIDE( _ld_ram_size0 = LENGTH(flash) );
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(ram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(ram_1) );
PROVIDE( _ld_ram_size2 = LENGTH(ram_2) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ram_2) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm_ocram) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm_ocram) );
PROVIDE( _ld_ram_size2 = LENGTH(hbnram) );
PROVIDE( _ld_ram_addr2 = ORIGIN(hbnram) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );
@ -235,7 +241,4 @@ SECTIONS
/* EM size */
PROVIDE(__LD_CONFIG_EM_SEL = __EM_SIZE);
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = 0x40010000 );
}

View File

@ -7,9 +7,7 @@ __EM_SIZE = DEFINED(ble_controller_init) ? 8K : 0K;
MEMORY
{
flash (wxa) : ORIGIN = 0x22030000, LENGTH = (2048K - 64K) /* we have 2MB ocram from 0x22020000 on fpga, use high ocram address as flash */
ram_1 (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 32K)
ram_rsvd (wxa) : ORIGIN = 0x42028000, LENGTH = (1K)
ram_2 (wxa) : ORIGIN = 0x42028400, LENGTH = (31K - __EM_SIZE)
tcm_ocram (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 64K - __EM_SIZE)
hbnram (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
}
@ -91,7 +89,16 @@ SECTIONS
.bleromrw (NOLOAD) :
{
KEEP(*(.bleromrw))
} >ram_1
} >tcm_ocram
.rsvd (NOLOAD) :
{
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
@ -111,6 +118,13 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -135,6 +149,7 @@ SECTIONS
. = ALIGN(8);
*(._k_queue.static.*)
*(._k_sem.static.*)
*(._k_mutex.static.*)
_bt_gatt_service_static_list_start = .;
KEEP(*(SORT_BY_NAME("._bt_gatt_service_static.static.*")))
_bt_gatt_service_static_list_end = .;
@ -143,11 +158,6 @@ SECTIONS
_bt_l2cap_fixed_chan_list_end = .;
} >flash
.rsvd (NOLOAD) :
{
*(.rsvd_data)
} >ram_rsvd
.boot2 (NOLOAD) :
{
PROVIDE ( __boot2_pt_addr_start = . );
@ -157,7 +167,7 @@ SECTIONS
PROVIDE ( __boot2_flashCfg_start = . );
*(.bss.boot2_flashCfg)
PROVIDE ( __boot2_flashCfg_end = . );
} >ram_1
} >tcm_ocram
.bss (NOLOAD) :
{
@ -169,21 +179,22 @@ SECTIONS
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
} >ram_1
} >tcm_ocram
. = ALIGN(8);
PROVIDE( _heap_start = . );
PROVIDE( _heap_size = ORIGIN(ram_1) + LENGTH(ram_1) - _heap_start );
PROVIDE( _heap_size = ADDR(.stack) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ram_2) );
PROVIDE( _heap2_size = LENGTH(ram_2) );
PROVIDE( _heap2_start = 0 );
PROVIDE( _heap2_size = 0 );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(tcm_ocram) + LENGTH(tcm_ocram) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >tcm_ocram
/* camera driver */
@ -205,10 +216,10 @@ SECTIONS
/* ram information */
PROVIDE( _ld_ram_size0 = LENGTH(flash) );
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(ram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(ram_1) );
PROVIDE( _ld_ram_size2 = LENGTH(ram_2) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ram_2) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm_ocram) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm_ocram) );
PROVIDE( _ld_ram_size2 = LENGTH(hbnram) );
PROVIDE( _ld_ram_addr2 = ORIGIN(hbnram) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );

View File

@ -7,9 +7,7 @@ __EM_SIZE = DEFINED(ble_controller_init) ? 8K : 0K;
MEMORY
{
flash (wxa) : ORIGIN = 0x22030000, LENGTH = (2048K - 64K) /* we have 2MB ocram from 0x22020000 on fpga, use high ocram address as flash */
ram_1 (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 32K)
ram_rsvd (wxa) : ORIGIN = 0x42028000, LENGTH = (1K)
ram_2 (wxa) : ORIGIN = 0x42028400, LENGTH = (31K - __EM_SIZE)
tcm_ocram (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 64K - __EM_SIZE)
hbnram (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
}
@ -86,7 +84,7 @@ SECTIONS
.bleromrw (NOLOAD) :
{
. = . + 0x84;
} >ram_1
} >tcm_ocram
.rtosromrw (NOLOAD) : ALIGN(16)
{
@ -95,7 +93,16 @@ SECTIONS
PROVIDE( __global_pointer_head$ = . );
PROVIDE( __global_pointer$ = . + 0x7E0 );
. = . + 0x4A0;
} >ram_1
} >tcm_ocram
.rsvd (NOLOAD) :
{
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
@ -115,6 +122,13 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -142,11 +156,6 @@ SECTIONS
_bt_l2cap_fixed_chan_list_end = .;
} >flash
.rsvd (NOLOAD) :
{
*(.rsvd_data)
} >ram_rsvd
.boot2 (NOLOAD) :
{
PROVIDE ( __boot2_pt_addr_start = . );
@ -156,7 +165,7 @@ SECTIONS
PROVIDE ( __boot2_flashCfg_start = . );
*(.bss.boot2_flashCfg)
PROVIDE ( __boot2_flashCfg_end = . );
} >ram_1
} >tcm_ocram
.bss (NOLOAD) :
{
@ -168,21 +177,22 @@ SECTIONS
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
} >ram_1
} >tcm_ocram
. = ALIGN(8);
PROVIDE( _heap_start = . );
PROVIDE( _heap_size = ORIGIN(ram_1) + LENGTH(ram_1) - _heap_start );
PROVIDE( _heap_size = ADDR(.stack) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ram_2) );
PROVIDE( _heap2_size = LENGTH(ram_2) );
PROVIDE( _heap2_start = 0 );
PROVIDE( _heap2_size = 0 );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(tcm_ocram) + LENGTH(tcm_ocram) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >tcm_ocram
/* camera driver */
@ -204,10 +214,10 @@ SECTIONS
/* ram information */
PROVIDE( _ld_ram_size0 = LENGTH(flash) );
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(ram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(ram_1) );
PROVIDE( _ld_ram_size2 = LENGTH(ram_2) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ram_2) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm_ocram) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm_ocram) );
PROVIDE( _ld_ram_size2 = LENGTH(hbnram) );
PROVIDE( _ld_ram_addr2 = ORIGIN(hbnram) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );

View File

@ -19,6 +19,10 @@ bl702_start:
.option pop
la sp, _sp_main
/*set em_sel to 0 before using sp*/
li a0, 0x4000007C
sw x0, (a0)
/*disable IRQ*/
li t0, MSTATUS_MIE
csrc mstatus, t0

View File

@ -5,3 +5,13 @@
# Iperf测试
如何使用此例程请参考目录app/bl602_demo_event下的[Iperf_User_Manual](Iperf_User_Manual.pdf)。
# Ble编译脚本说明
genblecontroller: build Wi-Fi and ble controller. Using uart hci cmd to communicate with ble controller.
genblehogp: build Wi-Fi and BLE. BLE as slave, and enable HOGP service.
genblem0s1: build Wi-Fi and BLE. 1 BLE connection is supported, BL602 can only be slave in this connection.
genblem0s1s: build Wi-Fi and BLE. based on genblem0s1, add BLE scan feature.
genblemesh: build Wi-Fi and BLE mesh. mesh application without mesh model code.
genblemeshmodel: build Wi-Fi and BLE mesh. mesh application with mesh model code.
genromap: build Wi-Fi and BLE. BLE support all roles, 2 BLE connection is supported, and enable tp service.

View File

@ -1,2 +0,0 @@
genblem0s1: 1 BLE connection is supported, BL602 can only be slave in this connection
genblem0s1s: based on genblem0s1, BLE scan is supported

View File

@ -0,0 +1,19 @@
# Build Script Description
genblehogp: BLE as slave, enable HOGP service.
genblem0s1: 1 BLE connection is supported, BL702 can only be slave in this connection.
genblem0s1p: based on genblem0s1, add BLE PDS(power down sleep) feature.
genblem0s1s: based on genblem0s1, add BLE scan feature.
genblem16s1: 16 BLE connections are suppprted, BL702 can be master or slave in each connection.
genblemesh: build mesh application without meshmodel code.
genblemeshmodel: build mesh application with meshmodel code.
genblestd 2 BLE connections are suppprted, BL702 can be master or slave in each connection.
geneth: build enthernet application.
genflashmap: build Zigbee and BLE. BLE support all roles, 2 BLE connection is supported, enable tp and OAD service.
genromap: Used to generate sdk.
genzb: build generic Zigbee image; after boot, if device haven't join a network, user need to use the "zb_set_role" CLI command to set device type, use the "zb_register_dev" CLI command to register endpoint and ZCL clusters, then use the "zb_start" or "zb_form" CLI command to join/form a network; if device already in a network, user need to use the "zb_register_dev" CLI command to register endpoint and ZCL clusters, then use the "zb_start" CLI command to restore network.
genzcstartup: build Zigbee Coordinator image; after boot, if haven't form a network, user can either use use the "zb_form" CLI command to form a nwk manually by specifying channel and panId, or use the "zb_start" CLI command to let stack select the channel and panId, if already in a network, restore network and resume opertion.
genzrstartup: build Zigbee Router image; after boot, device will scan and join a network automatically if haven't join a network, otherwise, restore network and resume operation.
genzedstartup: build Zigbee End Device image; after boot, device will scan and join a network automatically if haven't join a network, otherwise, restore network and resume operation.
genzsedstartup: build Zigbee Sleepy End Device image; after boot, device will scan and join a network automatically if haven't join a network, otherwise, restore network and resume operation.
For BouffaloLabDevCube version <= 1.5.3, please use partition table files (partition_cfg_*.toml) under this folder.

View File

@ -105,6 +105,21 @@ SECTIONS
KEEP(*(.bleromrw))
} >ocram_1
.rsvd (NOLOAD) :
{
*libutils.a:utils_log.o(.bss.log_buf)
*libcli.a:cli.o(.bss.argvall.*)
*libbl702_usb_cdc.a:usbd_cdc_if.o(COMMON)
*libbl702_usb_cdc.a:bl702_hal_pcd.o(.bss.*_data_buff)
*libbl702.a:debug.o(.bss.string)
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
PROVIDE( _tcm_load = LOADADDR(.tcmcode) );
@ -123,6 +138,15 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
PROVIDE ( _rf_data_end = . );
ASSERT ((_rf_data_end <= 0x42024000), "Error: _rf_data_end > 0x42024000");
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -148,8 +172,6 @@ SECTIONS
*(._k_queue.static.*)
*(._k_sem.static.*)
*(._k_mutex.static.*)
_net_buf_pool_list = .;
KEEP(*(SORT_BY_NAME("._net_buf_pool.static.*")))
_bt_gatt_service_static_list_start = .;
KEEP(*(SORT_BY_NAME("._bt_gatt_service_static.static.*")))
_bt_gatt_service_static_list_end = .;
@ -158,19 +180,6 @@ SECTIONS
_bt_l2cap_fixed_chan_list_end = .;
} >ocram_1 AT > flash
.rsvd (NOLOAD) :
{
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(COMMON)
*libutils.a:utils_log.o(.bss.log_buf)
*libcli.a:cli.o(.bss.argvall.*)
*libbl702_usb_cdc.a:usbd_cdc_if.o(COMMON)
*libbl702_usb_cdc.a:bl702_hal_pcd.o(.bss.*_data_buff)
*libbl702.a:debug.o(.bss.string)
*(.rsvd_data)
} >ocram_2
.boot2 (NOLOAD) :
{
PROVIDE ( __boot2_pt_addr_start = . );
@ -199,15 +208,15 @@ SECTIONS
PROVIDE( _heap_size = ORIGIN(ocram_1) + LENGTH(ocram_1) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ocram_3) );
PROVIDE( _heap2_size = LENGTH(ocram_3) );
PROVIDE( _heap2_size = LENGTH(ocram_3) - SIZEOF(.stack) );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(ocram_3) + LENGTH(ocram_3) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >ocram_3
/* camera driver */
@ -231,7 +240,7 @@ SECTIONS
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm) + LENGTH(ocram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm) );
PROVIDE( _ld_ram_size2 = LENGTH(ocram_3) );
PROVIDE( _ld_ram_size2 = LENGTH(ocram_3) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ocram_3) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );
@ -241,7 +250,4 @@ SECTIONS
/* EM size */
PROVIDE(__LD_CONFIG_EM_SEL = __EM_SIZE);
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = 0x40010000 );
}

View File

@ -7,9 +7,7 @@ __EM_SIZE = DEFINED(ble_controller_init) ? 16K : 0K;
MEMORY
{
flash (rxai!w) : ORIGIN = 0x23000000, LENGTH = (2M)
ram_1 (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 32K)
ram_rsvd (wxa) : ORIGIN = 0x42028000, LENGTH = (1K)
ram_2 (wxa) : ORIGIN = 0x42028400, LENGTH = (31K - __EM_SIZE)
tcm_ocram (wxa) : ORIGIN = 0x42014000, LENGTH = (48K + 64K - __EM_SIZE)
hbnram (wxa) : ORIGIN = 0x40010000, LENGTH = (4K)
}
@ -91,7 +89,16 @@ SECTIONS
.bleromrw (NOLOAD) :
{
KEEP(*(.bleromrw))
} >ram_1
} >tcm_ocram
.rsvd (NOLOAD) :
{
*(.rsvd_data)
*(.ble_rsvd_mem)
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = . );
} >hbnram
.tcmcode : ALIGN(4)
{
@ -103,7 +110,7 @@ SECTIONS
*(.tcm_const)
*(.sclock_rlt_code)
*(.sclock_rlt_const)
} >ram_1 AT > flash
} >tcm_ocram AT > flash
.data : ALIGN(4)
{
@ -111,6 +118,15 @@ SECTIONS
PROVIDE( _data_run = ADDR(.data) );
PROVIDE( _data_run_end = ADDR(.data) + SIZEOF(.data));
/* put bl702_rf_private.o at the top to avoid ocram conflict during rf calibration */
*libbl702_rf.a:bl702_rf_private.o(.sdata.*)
*libbl702_rf.a:bl702_rf_private.o(.srodata.*)
*libbl702_rf.a:bl702_rf_private.o(.sbss.*)
*libbl702_rf.a:bl702_rf_private.o(.bss.*)
*libbl702_rf.a:bl702_rf_private.o(COMMON)
PROVIDE ( _rf_data_end = . );
ASSERT ((_rf_data_end <= 0x42024000), "Error: _rf_data_end > 0x42024000");
*(.pds_code)
*(.data .data.*)
*(.gnu.linkonce.d.*)
@ -142,17 +158,7 @@ SECTIONS
_bt_l2cap_fixed_chan_list_start = .;
KEEP(*(SORT_BY_NAME("._bt_l2cap_fixed_chan.static.*")))
_bt_l2cap_fixed_chan_list_end = .;
} >ram_1 AT > flash
.rsvd (NOLOAD) :
{
*(.rsvd_data)
} >ram_rsvd
.ble_rsvd (NOLOAD) :
{
*(.ble_rsvd_mem)
} >hbnram
} >tcm_ocram AT > flash
.boot2 (NOLOAD) :
{
@ -163,7 +169,7 @@ SECTIONS
PROVIDE ( __boot2_flashCfg_start = . );
*(.bss.boot2_flashCfg)
PROVIDE ( __boot2_flashCfg_end = . );
} >ram_1
} >tcm_ocram
.bss (NOLOAD) :
{
@ -175,22 +181,22 @@ SECTIONS
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
} >ram_1
} >tcm_ocram
. = ALIGN(8);
PROVIDE( _heap_start = . );
PROVIDE( _heap_size = ORIGIN(ram_1) + LENGTH(ram_1) - _heap_start );
PROVIDE( _heap_size = ADDR(.stack) - _heap_start );
PROVIDE( _heap2_start = ORIGIN(ram_2) );
PROVIDE( _heap2_size = LENGTH(ram_2) );
PROVIDE( _heap2_start = 0 );
PROVIDE( _heap2_size = 0 );
.stack ORIGIN(hbnram) + LENGTH(hbnram) - __stack_size (NOLOAD) :
.stack ORIGIN(tcm_ocram) + LENGTH(tcm_ocram) - __stack_size (NOLOAD) :
{
PROVIDE ( _sp_base = . );
. = . + __stack_size;
PROVIDE( _sp_main = . );
__freertos_irq_stack_top = .;
} >hbnram
} >tcm_ocram
/* camera driver */
@ -212,10 +218,10 @@ SECTIONS
/* ram information */
PROVIDE( _ld_ram_size0 = LENGTH(flash) );
PROVIDE( _ld_ram_addr0 = ORIGIN(flash) );
PROVIDE( _ld_ram_size1 = LENGTH(ram_1) );
PROVIDE( _ld_ram_addr1 = ORIGIN(ram_1) );
PROVIDE( _ld_ram_size2 = LENGTH(ram_2) );
PROVIDE( _ld_ram_addr2 = ORIGIN(ram_2) );
PROVIDE( _ld_ram_size1 = LENGTH(tcm_ocram) - SIZEOF(.stack) );
PROVIDE( _ld_ram_addr1 = ORIGIN(tcm_ocram) );
PROVIDE( _ld_ram_size2 = LENGTH(hbnram) );
PROVIDE( _ld_ram_addr2 = ORIGIN(hbnram) );
PROVIDE( _ld_ram_size3 = SIZEOF(.stack) );
PROVIDE( _ld_ram_addr3 = ADDR(.stack) );
@ -224,7 +230,4 @@ SECTIONS
/* EM size */
PROVIDE(__LD_CONFIG_EM_SEL = __EM_SIZE);
/* PDS backup address */
PROVIDE ( __ld_pds_bak_addr = 0x40010000 );
}

View File

@ -47,6 +47,10 @@ ifeq ($(CONFIG_ZIGBEE_ACTIVE_END_DEVICE_STARTUP),1)
CPPFLAGS += -DCFG_ZIGBEE_ACTIVE_END_DEVICE_STARTUP
endif
ifeq ($(CONFIG_ZIGBEE_SLEEPY_END_DEVICE_STARTUP),1)
CPPFLAGS += -DCFG_ZIGBEE_SLEEPY_END_DEVICE_STARTUP
endif
ifeq ($(CONFIG_ZIGBEE_COORDINATOR_STARTUP),1)
CPPFLAGS += -DCFG_ZIGBEE_COORDINATOR_STARTUP
endif

View File

@ -628,84 +628,33 @@ void vApplicationSleep( TickType_t xExpectedIdleTime)
static void bl702_low_power_config(void)
{
uint8_t i;
#if !defined(CFG_USB_CDC_ENABLE)
// Power off DLL
GLB_Power_Off_DLL();
#endif
// Disable secure engine
Sec_Eng_Trng_Disable();
SEC_Eng_Turn_Off_Sec_Ring();
#if !defined(CFG_ZIGBEE_ENABLE)
#if !defined(CFG_BLE_ENABLE)
// if ble is not enabled, Disable BLE clock
GLB_Set_BLE_CLK(0);
#endif
#if !defined(CFG_ZIGBEE_ENABLE)
// if zigbee is not enabled, Disable Zigbee clock
GLB_Set_MAC154_ZIGBEE_CLK(0);
#endif
// Set all gpio pads to High-Z state
for(i=0; i<=22; i++){
// jtag pins
if((i == 0) || (i == 1) || (i == 2) || (i == 9)){
//continue;
}
// uart pins
if((i == 14) || (i == 15)){
continue;
}
GLB_GPIO_Set_HZ(i);
}
// Set all psram pads to High-Z state
GLB_Set_Psram_Pad_HZ();
#endif
// Gate peripheral clock
for(i=0; i<=31; i++){
if(i == BL_AHB_SLAVE1_GLB){
continue;
}
if(i == BL_AHB_SLAVE1_MIX){
continue;
}
if(i == BL_AHB_SLAVE1_EFUSE){
continue;
}
if(i == BL_AHB_SLAVE1_L1C){
continue;
}
if(i == BL_AHB_SLAVE1_SFC){
continue;
}
if(i == BL_AHB_SLAVE1_PDS_HBN_AON_HBNRAM){
continue;
}
if(i == BL_AHB_SLAVE1_UART0){
continue;
}
if(i == BL_AHB_SLAVE1_TMR){
continue;
}
GLB_AHB_Slave1_Clock_Gate(1, i);
}
BL_WR_REG(GLB_BASE, GLB_CGEN_CFG1, 0x00214BC3);
}
void bl_pds_restore(void)
{
bl_uart_init(0, 14, 15, 255, 255, 2 * 1000 * 1000);
bl_uart_int_enable(0);
#ifndef CFG_USB_CDC_ENABLE
//power off Dll
GLB_Power_Off_DLL();
#endif
bl702_low_power_config();
hosal_uart_init(&uart_stdio);
#if defined(CFG_USB_CDC_ENABLE)
extern void usb_cdc_restore(void);
usb_cdc_restore();
@ -810,30 +759,37 @@ void vApplicationSleep( TickType_t xExpectedIdleTime )
uint32_t sleepCycles;
#define PDS_TOLERANCE_TIME_MS 5
//in driver, it takes (sleep_cycles-PDS_WARMUP_LATENCY_CNT) as sleep cycles. Make sure pds sleep for at least 1 ms(about 31cycles).
#define PDS_MIN_TIME_MS (PDS_WARMUP_LATENCY_CNT + 30 + 31)/31
if(pds_start == 0){
return;
}
eSleepStatus = eTaskConfirmSleepModeStatus();
if(eSleepStatus == eAbortSleep){
printf("eSleepStatus == eAbortSleep\r\n");
return;
}else if(eSleepStatus == eStandardSleep){
if(xExpectedIdleTime <= PDS_TOLERANCE_TIME_MS + PDS_MIN_TIME_MS){
return;
}
}
#if defined(CFG_ZIGBEE_PDS)
if(!zb_stackIdle())
{
return;
}
xActualIdleTime = zb_zedGetIdleDuration() / 1000;
#endif
if(xActualIdleTime <= PDS_TOLERANCE_TIME_MS){
if(xActualIdleTime <= PDS_TOLERANCE_TIME_MS + PDS_MIN_TIME_MS){
return;
}
eSleepStatus = eTaskConfirmSleepModeStatus();
if(eSleepStatus == eAbortSleep){
return;
}else if(eSleepStatus == eStandardSleep){
if(xExpectedIdleTime <= PDS_TOLERANCE_TIME_MS){
return;
}else if(xExpectedIdleTime < xActualIdleTime){
if(eSleepStatus == eStandardSleep){
if(xExpectedIdleTime < xActualIdleTime){
sleepTime = xExpectedIdleTime - PDS_TOLERANCE_TIME_MS;
}else{
sleepTime = xActualIdleTime - PDS_TOLERANCE_TIME_MS;
@ -842,24 +798,25 @@ void vApplicationSleep( TickType_t xExpectedIdleTime )
sleepTime = xActualIdleTime - PDS_TOLERANCE_TIME_MS;
}
bl_irq_disable(M154_IRQn);
printf("[%lu] will sleep: %lu ms\r\n", (uint32_t)bl_rtc_get_timestamp_ms(), sleepTime);
#if defined(CFG_ZIGBEE_PDS)
zb_zedStoreRegs();
zb_zedStoreTime();
#endif
sleepCycles = (uint64_t)32768 * sleepTime / 1000;
sleepTime = hal_pds_enter_with_time_compensation(31, sleepCycles);
bl_pds_restore();
#if defined(CFG_ZIGBEE_PDS)
zb_zedRestoreTime(sleepTime * 1000);
zb_zedRestoreRegs();
zb_zedRestoreTime(sleepTime * 1000);
#endif
printf("[%lu] actually sleep: %lu ms\r\n", (uint32_t)bl_rtc_get_timestamp_ms(), sleepTime);
}
#else
void vApplicationSleep( TickType_t xExpectedIdleTime )
{

View File

@ -1,5 +0,0 @@
genblestd: 2 BLE connections are suppprted, BL702 can be master or slave in each connection
genblem0s1: 1 BLE connection is supported, BL702 can only be slave in this connection
genblem0s1p: based on genblem0s1, BLE PDS(power down sleep) is supported
genblem0s1s: based on genblem0s1, BLE scan is supported
genblem16s1: 16 BLE connections are suppprted, BL702 can be master or slave in each connection

View File

@ -0,0 +1,3 @@
#!/bin/sh
make CONFIG_ZIGBEE=1 CONFIG_FLASH_SIZE=0x100000 CONFIG_MANUFACTURER_ID=0x130D CONFIG_ZIGBEE_OTA_CURR_FILE_VER=0x00000001 CONFIG_ZIGBEE_IMAGE_TYPE=0x0000 CONFIG_PDS_CPU_PWROFF=1 CONFIG_ZIGBEE_PDS=1 CONFIG_USB_CDC=0 CONFIG_ZIGBEE_SLEEPY_END_DEVICE_STARTUP=1 -j
exit $?

View File

@ -1 +0,0 @@
For BouffaloLabDevCube version <= 1.5.3, please use partition table files (partition_cfg_*.toml) under this folder.

View File

@ -37,11 +37,6 @@ ifeq ($(CFG_BLE_PDS),1)
CONFIG_USE_XTAL32K := 1
endif
ifeq ($(CONFIG_ZIGBEE_PDS),1)
# use XTAL32K by default for pds31
CONFIG_USE_XTAL32K := 1
endif
# if CONFIG_PDS_CPU_PWROFF is defined, CONFIG_LINK_CUSTOMER must be defined to avoid linking the default .ld file
ifeq ($(CONFIG_PDS_CPU_PWROFF),1)
CONFIG_LINK_CUSTOMER := 1

View File

@ -8,7 +8,7 @@
<meta name="viewport" content="width=device-width, initial-scale=1.0">
<title>无法找到该网页 &mdash; BL IoT SDK release_bl_iot_sdk_1.6.22-838-geab3854c5 文档</title>
<title>无法找到该网页 &mdash; BL IoT SDK release_bl_iot_sdk_1.6.32-104-g52434dce6 文档</title>
@ -39,7 +39,7 @@
<link rel="index" title="索引"
href="genindex.html"/>
<link rel="search" title="搜索" href="search.html"/>
<link rel="top" title="BL IoT SDK release_bl_iot_sdk_1.6.22-838-geab3854c5 文档" href="index.html"/>
<link rel="top" title="BL IoT SDK release_bl_iot_sdk_1.6.32-104-g52434dce6 文档" href="index.html"/>
<script src="_static/js/modernizr.min.js"></script>
@ -71,7 +71,7 @@
<div class="version">
release_bl_iot_sdk_1.6.22-838-geab3854c5
release_bl_iot_sdk_1.6.32-104-g52434dce6
</div>
@ -93,13 +93,13 @@
<ul>
<li class="toctree-l1"><a class="reference internal" href="get-started/index_602.html">快速入门</a></li>
<li class="toctree-l1"><a class="reference internal" href="api-reference/index.html">API 参考</a></li>
<li class="toctree-l1"><a class="reference internal" href="get-started/index_602.html">BL602快速入门</a></li>
<li class="toctree-l1"><a class="reference internal" href="get-started/index_702.html">BL702快速入门</a></li>
<li class="toctree-l1"><a class="reference internal" href="api-reference/index.html">BL602 API 参考</a></li>
<li class="toctree-l1"><a class="reference internal" href="Examples/index.html">Example</a></li>
<li class="toctree-l1"><a class="reference internal" href="Components/index.html">Components</a></li>
<li class="toctree-l1"><a class="reference internal" href="QA/index.html">QA</a></li>
<li class="toctree-l1"><a class="reference internal" href="hw-reference/index.html">H/W 参考</a></li>
<li class="toctree-l1"><a class="reference internal" href="versions.html">版本</a></li>
<li class="toctree-l1"><a class="reference internal" href="resources.html">相关资源</a></li>
<li class="toctree-l1"><a class="reference internal" href="about.html">关于</a></li>
<li class="toctree-l1"><a class="reference internal" href="languages.html">Languages/语言</a></li>
@ -168,7 +168,7 @@
<div class="section" id="id1">
<h1>无法找到该网页<a class="headerlink" href="#id1" title="永久链接至标题"></a></h1>
<p><a class="reference external" href="../../en/release_bl_iot_sdk_1.6.22-838-geab3854c5/404.html">[English]</a></p>
<p><a class="reference external" href="../../en/release_bl_iot_sdk_1.6.22-874-g52434dce6/404.html">[English]</a></p>
<div class="admonition note">
<p class="first admonition-title">注解</p>
<p class="last">抱歉,无法找到您想访问的页面。</p>
@ -213,7 +213,7 @@
<script type="text/javascript">
var DOCUMENTATION_OPTIONS = {
URL_ROOT:'./',
VERSION:'release_bl_iot_sdk_1.6.22-838-geab3854c5',
VERSION:'release_bl_iot_sdk_1.6.32-104-g52434dce6',
COLLAPSE_INDEX:false,
FILE_SUFFIX:'.html',
HAS_SOURCE: true,

View File

@ -1,4 +0,0 @@
# Sphinx build info version 1
# This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
config: 68116045163554b2a2f687fe487a8e45
tags: 645f666f9bcd5a90fca523b33c5a78b7

Some files were not shown because too many files have changed in this diff Show More