mirror of
https://github.com/libretro/RetroArch
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166 lines
3.9 KiB
ArmAsm
166 lines
3.9 KiB
ArmAsm
/*-------------------------------------------------------------
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irq_handler.S -- Interrupt subsystem
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Copyright (C) 2004
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Michael Wiedenbauer (shagkur)
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Dave Murphy (WinterMute)
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any
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damages arising from the use of this software.
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Permission is granted to anyone to use this software for any
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purpose, including commercial applications, and to alter it and
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redistribute it freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you
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must not claim that you wrote the original software. If you use
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this software in a product, an acknowledgment in the product
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documentation would be appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and
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must not be misrepresented as being the original software.
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3. This notice may not be removed or altered from any source
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distribution.
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-------------------------------------------------------------*/
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#include <asm.h>
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#define EXCEPTION_PROLOG \
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mfspr r0,912; \
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stw r0,GQR0_OFFSET(sp); \
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mfspr r0,913; \
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stw r0,GQR1_OFFSET(sp); \
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mfspr r0,914; \
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stw r0,GQR2_OFFSET(sp); \
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mfspr r0,915; \
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stw r0,GQR3_OFFSET(sp); \
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mfspr r0,916; \
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stw r0,GQR4_OFFSET(sp); \
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mfspr r0,917; \
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stw r0,GQR5_OFFSET(sp); \
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mfspr r0,918; \
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stw r0,GQR6_OFFSET(sp); \
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mfspr r0,919; \
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stw r0,GQR7_OFFSET(sp); \
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stw r6,GPR6_OFFSET(sp); \
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stw r7,GPR7_OFFSET(sp); \
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stw r8,GPR8_OFFSET(sp); \
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stw r9,GPR9_OFFSET(sp); \
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stw r10,GPR10_OFFSET(sp); \
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stw r11,GPR11_OFFSET(sp); \
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stw r12,GPR12_OFFSET(sp); \
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stw r13,GPR13_OFFSET(sp); \
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stw r14,GPR14_OFFSET(sp); \
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stw r15,GPR15_OFFSET(sp)
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#define EXCEPTION_EPILOG \
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lwz r4,GQR0_OFFSET(sp); \
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mtspr 912,r4; \
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lwz r4,GQR1_OFFSET(sp); \
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mtspr 913,r4; \
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lwz r4,GQR2_OFFSET(sp); \
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mtspr 914,r4; \
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lwz r4,GQR3_OFFSET(sp); \
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mtspr 915,r4; \
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lwz r4,GQR4_OFFSET(sp); \
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mtspr 916,r4; \
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lwz r4,GQR5_OFFSET(sp); \
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mtspr 917,r4; \
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lwz r4,GQR6_OFFSET(sp); \
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mtspr 918,r4; \
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lwz r4,GQR7_OFFSET(sp); \
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mtspr 919,r4; \
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lwz r15,GPR15_OFFSET(sp); \
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lwz r14,GPR14_OFFSET(sp); \
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lwz r13,GPR13_OFFSET(sp); \
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lwz r12,GPR12_OFFSET(sp); \
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lwz r11,GPR11_OFFSET(sp); \
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lwz r10,GPR10_OFFSET(sp); \
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lwz r9,GPR9_OFFSET(sp); \
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lwz r8,GPR8_OFFSET(sp); \
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lwz r7,GPR7_OFFSET(sp); \
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lwz r6,GPR6_OFFSET(sp); \
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lwz r5,GPR5_OFFSET(sp)
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.extern c_irqdispatcher
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.globl irq_exceptionhandler
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irq_exceptionhandler:
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stwu sp,-EXCEPTION_FRAME_END(sp) //now we're able to adjust the stackpointer with it's cached address
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EXCEPTION_PROLOG
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mfmsr r3
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ori r3,r3,MSR_RI
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mtmsr r3
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isync
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addi r14,sp,0
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lis r15,_thread_dispatch_disable_level@ha
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mfspr r3,SPRG0
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cmpwi r3,0
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bne nested
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mfspr sp,SPRG1
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nested:
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addi r3,r3,1
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lwz r6,_thread_dispatch_disable_level@l(r15)
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mtspr SPRG0,r3
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addi r6,r6,1
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stw r6,_thread_dispatch_disable_level@l(r15)
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addi r3,r14,0x08
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bl c_irqdispatcher
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mfspr r4,SPRG0
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lwz r3,_thread_dispatch_disable_level@l(r15)
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addi r4,r4,-1
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addic. r3,r3,-1
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mtspr SPRG0,r4
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stw r3,_thread_dispatch_disable_level@l(r15)
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addi sp,r14,0
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bne easy_exit
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lis r4,_context_switch_want@ha
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lwz r5,_context_switch_want@l(r4)
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cmpwi r5,0
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beq easy_exit
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switch:
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bl __thread_dispatch
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easy_exit:
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lwz r4,CR_OFFSET(sp)
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mtcr r4
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lwz r4,LR_OFFSET(sp)
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mtlr r4
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lwz r4,CTR_OFFSET(sp)
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mtctr r4
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lwz r4,XER_OFFSET(sp)
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mtxer r4
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EXCEPTION_EPILOG
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mfmsr r4
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rlwinm r4,r4,0,31,29
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mtmsr r4
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isync
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lwz r0,GPR0_OFFSET(sp)
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lwz toc,GPR2_OFFSET(sp)
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lwz r4,SRR0_OFFSET(sp)
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mtsrr0 r4
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lwz r4,SRR1_OFFSET(sp)
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rlwinm r4, r4, 0, 19, 17
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mtsrr1 r4
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lwz r4,GPR4_OFFSET(sp)
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lwz r3,GPR3_OFFSET(sp)
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addi sp,sp,EXCEPTION_FRAME_END
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rfi
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