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kern: improve single-step around user-exception entry
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@ -109,13 +109,9 @@ namespace ams::kern::arch::arm64 {
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break;
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}
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/* If we should, clear the thread's state as single-step. */
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/* In the event that we return from this exception, we want SPSR.SS set so that we advance an instruction if single-stepping. */
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#if defined(MESOSPHERE_ENABLE_HARDWARE_SINGLE_STEP)
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if (AMS_UNLIKELY(GetCurrentThread().IsSingleStep())) {
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GetCurrentThread().ClearSingleStep();
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cpu::MonitorDebugSystemControlRegisterAccessor().SetSoftwareStep(false).Store();
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cpu::EnsureInstructionConsistency();
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}
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context->psr |= (1ul << 21);
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#endif
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/* If we should process the user exception (and it's not a breakpoint), try to enter. */
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@ -224,6 +220,15 @@ namespace ams::kern::arch::arm64 {
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}
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}
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/* If we should, clear the thread's state as single-step. */
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#if defined(MESOSPHERE_ENABLE_HARDWARE_SINGLE_STEP)
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if (AMS_UNLIKELY(GetCurrentThread().IsSingleStep())) {
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GetCurrentThread().ClearSingleStep();
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cpu::MonitorDebugSystemControlRegisterAccessor().SetSoftwareStep(false).Store();
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cpu::EnsureInstructionConsistency();
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}
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#endif
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{
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/* Collect additional information based on the ec. */
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ams::svc::DebugException exception;
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@ -217,11 +217,6 @@ _ZN3ams4kern4arch5arm6430EL0SynchronousExceptionHandlerEv:
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ldp x21, x22, [sp, #(EXCEPTION_CONTEXT_PC_PSR)]
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ldr x23, [sp, #(EXCEPTION_CONTEXT_TPIDR)]
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#if defined(MESOSPHERE_ENABLE_HARDWARE_SINGLE_STEP)
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/* Since we're returning from an exception, set SPSR.SS so that we advance an instruction if single-stepping. */
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orr x22, x22, #(1 << 21)
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#endif
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msr sp_el0, x20
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msr elr_el1, x21
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msr spsr_el1, x22
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